Lines Matching refs:bp
166 static inline unsigned long br32(const struct b44 *bp, unsigned long reg) in br32() argument
168 return ssb_read32(bp->sdev, reg); in br32()
171 static inline void bw32(const struct b44 *bp, in bw32() argument
174 ssb_write32(bp->sdev, reg, val); in bw32()
177 static int b44_wait_bit(struct b44 *bp, unsigned long reg, in b44_wait_bit() argument
183 u32 val = br32(bp, reg); in b44_wait_bit()
193 netdev_err(bp->dev, "BUG! Timeout waiting for bit %08x of register %lx to %s\n", in b44_wait_bit()
201 static inline void __b44_cam_read(struct b44 *bp, unsigned char *data, int index) in __b44_cam_read() argument
205 bw32(bp, B44_CAM_CTRL, (CAM_CTRL_READ | in __b44_cam_read()
208 b44_wait_bit(bp, B44_CAM_CTRL, CAM_CTRL_BUSY, 100, 1); in __b44_cam_read()
210 val = br32(bp, B44_CAM_DATA_LO); in __b44_cam_read()
217 val = br32(bp, B44_CAM_DATA_HI); in __b44_cam_read()
223 static inline void __b44_cam_write(struct b44 *bp, unsigned char *data, int index) in __b44_cam_write() argument
231 bw32(bp, B44_CAM_DATA_LO, val); in __b44_cam_write()
235 bw32(bp, B44_CAM_DATA_HI, val); in __b44_cam_write()
236 bw32(bp, B44_CAM_CTRL, (CAM_CTRL_WRITE | in __b44_cam_write()
238 b44_wait_bit(bp, B44_CAM_CTRL, CAM_CTRL_BUSY, 100, 1); in __b44_cam_write()
241 static inline void __b44_disable_ints(struct b44 *bp) in __b44_disable_ints() argument
243 bw32(bp, B44_IMASK, 0); in __b44_disable_ints()
246 static void b44_disable_ints(struct b44 *bp) in b44_disable_ints() argument
248 __b44_disable_ints(bp); in b44_disable_ints()
251 br32(bp, B44_IMASK); in b44_disable_ints()
254 static void b44_enable_ints(struct b44 *bp) in b44_enable_ints() argument
256 bw32(bp, B44_IMASK, bp->imask); in b44_enable_ints()
259 static int __b44_readphy(struct b44 *bp, int phy_addr, int reg, u32 *val) in __b44_readphy() argument
263 bw32(bp, B44_EMAC_ISTAT, EMAC_INT_MII); in __b44_readphy()
264 bw32(bp, B44_MDIO_DATA, (MDIO_DATA_SB_START | in __b44_readphy()
269 err = b44_wait_bit(bp, B44_EMAC_ISTAT, EMAC_INT_MII, 100, 0); in __b44_readphy()
270 *val = br32(bp, B44_MDIO_DATA) & MDIO_DATA_DATA; in __b44_readphy()
275 static int __b44_writephy(struct b44 *bp, int phy_addr, int reg, u32 val) in __b44_writephy() argument
277 bw32(bp, B44_EMAC_ISTAT, EMAC_INT_MII); in __b44_writephy()
278 bw32(bp, B44_MDIO_DATA, (MDIO_DATA_SB_START | in __b44_writephy()
284 return b44_wait_bit(bp, B44_EMAC_ISTAT, EMAC_INT_MII, 100, 0); in __b44_writephy()
287 static inline int b44_readphy(struct b44 *bp, int reg, u32 *val) in b44_readphy() argument
289 if (bp->flags & B44_FLAG_EXTERNAL_PHY) in b44_readphy()
292 return __b44_readphy(bp, bp->phy_addr, reg, val); in b44_readphy()
295 static inline int b44_writephy(struct b44 *bp, int reg, u32 val) in b44_writephy() argument
297 if (bp->flags & B44_FLAG_EXTERNAL_PHY) in b44_writephy()
300 return __b44_writephy(bp, bp->phy_addr, reg, val); in b44_writephy()
307 struct b44 *bp = netdev_priv(dev); in b44_mdio_read_mii() local
308 int rc = __b44_readphy(bp, phy_id, location, &val); in b44_mdio_read_mii()
317 struct b44 *bp = netdev_priv(dev); in b44_mdio_write_mii() local
318 __b44_writephy(bp, phy_id, location, val); in b44_mdio_write_mii()
324 struct b44 *bp = bus->priv; in b44_mdio_read_phylib() local
325 int rc = __b44_readphy(bp, phy_id, location, &val); in b44_mdio_read_phylib()
334 struct b44 *bp = bus->priv; in b44_mdio_write_phylib() local
335 return __b44_writephy(bp, phy_id, location, val); in b44_mdio_write_phylib()
338 static int b44_phy_reset(struct b44 *bp) in b44_phy_reset() argument
343 if (bp->flags & B44_FLAG_EXTERNAL_PHY) in b44_phy_reset()
345 err = b44_writephy(bp, MII_BMCR, BMCR_RESET); in b44_phy_reset()
349 err = b44_readphy(bp, MII_BMCR, &val); in b44_phy_reset()
352 netdev_err(bp->dev, "PHY Reset would not complete\n"); in b44_phy_reset()
360 static void __b44_set_flow_ctrl(struct b44 *bp, u32 pause_flags) in __b44_set_flow_ctrl() argument
364 bp->flags &= ~(B44_FLAG_TX_PAUSE | B44_FLAG_RX_PAUSE); in __b44_set_flow_ctrl()
365 bp->flags |= pause_flags; in __b44_set_flow_ctrl()
367 val = br32(bp, B44_RXCONFIG); in __b44_set_flow_ctrl()
372 bw32(bp, B44_RXCONFIG, val); in __b44_set_flow_ctrl()
374 val = br32(bp, B44_MAC_FLOW); in __b44_set_flow_ctrl()
380 bw32(bp, B44_MAC_FLOW, val); in __b44_set_flow_ctrl()
383 static void b44_set_flow_ctrl(struct b44 *bp, u32 local, u32 remote) in b44_set_flow_ctrl() argument
399 __b44_set_flow_ctrl(bp, pause_enab); in b44_set_flow_ctrl()
404 static void b44_wap54g10_workaround(struct b44 *bp) in b44_wap54g10_workaround() argument
418 err = __b44_readphy(bp, 0, MII_BMCR, &val); in b44_wap54g10_workaround()
424 err = __b44_writephy(bp, 0, MII_BMCR, val); in b44_wap54g10_workaround()
433 static inline void b44_wap54g10_workaround(struct b44 *bp) in b44_wap54g10_workaround() argument
438 static int b44_setup_phy(struct b44 *bp) in b44_setup_phy() argument
443 b44_wap54g10_workaround(bp); in b44_setup_phy()
445 if (bp->flags & B44_FLAG_EXTERNAL_PHY) in b44_setup_phy()
447 if ((err = b44_readphy(bp, B44_MII_ALEDCTRL, &val)) != 0) in b44_setup_phy()
449 if ((err = b44_writephy(bp, B44_MII_ALEDCTRL, in b44_setup_phy()
452 if ((err = b44_readphy(bp, B44_MII_TLEDCTRL, &val)) != 0) in b44_setup_phy()
454 if ((err = b44_writephy(bp, B44_MII_TLEDCTRL, in b44_setup_phy()
458 if (!(bp->flags & B44_FLAG_FORCE_LINK)) { in b44_setup_phy()
461 if (bp->flags & B44_FLAG_ADV_10HALF) in b44_setup_phy()
463 if (bp->flags & B44_FLAG_ADV_10FULL) in b44_setup_phy()
465 if (bp->flags & B44_FLAG_ADV_100HALF) in b44_setup_phy()
467 if (bp->flags & B44_FLAG_ADV_100FULL) in b44_setup_phy()
470 if (bp->flags & B44_FLAG_PAUSE_AUTO) in b44_setup_phy()
473 if ((err = b44_writephy(bp, MII_ADVERTISE, adv)) != 0) in b44_setup_phy()
475 if ((err = b44_writephy(bp, MII_BMCR, (BMCR_ANENABLE | in b44_setup_phy()
481 if ((err = b44_readphy(bp, MII_BMCR, &bmcr)) != 0) in b44_setup_phy()
484 if (bp->flags & B44_FLAG_100_BASE_T) in b44_setup_phy()
486 if (bp->flags & B44_FLAG_FULL_DUPLEX) in b44_setup_phy()
488 if ((err = b44_writephy(bp, MII_BMCR, bmcr)) != 0) in b44_setup_phy()
495 b44_set_flow_ctrl(bp, 0, 0); in b44_setup_phy()
502 static void b44_stats_update(struct b44 *bp) in b44_stats_update() argument
507 val = &bp->hw_stats.tx_good_octets; in b44_stats_update()
508 u64_stats_update_begin(&bp->hw_stats.syncp); in b44_stats_update()
511 *val++ += br32(bp, reg); in b44_stats_update()
518 *val++ += br32(bp, reg); in b44_stats_update()
521 u64_stats_update_end(&bp->hw_stats.syncp); in b44_stats_update()
524 static void b44_link_report(struct b44 *bp) in b44_link_report() argument
526 if (!netif_carrier_ok(bp->dev)) { in b44_link_report()
527 netdev_info(bp->dev, "Link is down\n"); in b44_link_report()
529 netdev_info(bp->dev, "Link is up at %d Mbps, %s duplex\n", in b44_link_report()
530 (bp->flags & B44_FLAG_100_BASE_T) ? 100 : 10, in b44_link_report()
531 (bp->flags & B44_FLAG_FULL_DUPLEX) ? "full" : "half"); in b44_link_report()
533 netdev_info(bp->dev, "Flow control is %s for TX and %s for RX\n", in b44_link_report()
534 (bp->flags & B44_FLAG_TX_PAUSE) ? "on" : "off", in b44_link_report()
535 (bp->flags & B44_FLAG_RX_PAUSE) ? "on" : "off"); in b44_link_report()
539 static void b44_check_phy(struct b44 *bp) in b44_check_phy() argument
543 if (bp->flags & B44_FLAG_EXTERNAL_PHY) { in b44_check_phy()
544 bp->flags |= B44_FLAG_100_BASE_T; in b44_check_phy()
545 if (!netif_carrier_ok(bp->dev)) { in b44_check_phy()
546 u32 val = br32(bp, B44_TX_CTRL); in b44_check_phy()
547 if (bp->flags & B44_FLAG_FULL_DUPLEX) in b44_check_phy()
551 bw32(bp, B44_TX_CTRL, val); in b44_check_phy()
552 netif_carrier_on(bp->dev); in b44_check_phy()
553 b44_link_report(bp); in b44_check_phy()
558 if (!b44_readphy(bp, MII_BMSR, &bmsr) && in b44_check_phy()
559 !b44_readphy(bp, B44_MII_AUXCTRL, &aux) && in b44_check_phy()
562 bp->flags |= B44_FLAG_100_BASE_T; in b44_check_phy()
564 bp->flags &= ~B44_FLAG_100_BASE_T; in b44_check_phy()
566 bp->flags |= B44_FLAG_FULL_DUPLEX; in b44_check_phy()
568 bp->flags &= ~B44_FLAG_FULL_DUPLEX; in b44_check_phy()
570 if (!netif_carrier_ok(bp->dev) && in b44_check_phy()
572 u32 val = br32(bp, B44_TX_CTRL); in b44_check_phy()
575 if (bp->flags & B44_FLAG_FULL_DUPLEX) in b44_check_phy()
579 bw32(bp, B44_TX_CTRL, val); in b44_check_phy()
581 if (!(bp->flags & B44_FLAG_FORCE_LINK) && in b44_check_phy()
582 !b44_readphy(bp, MII_ADVERTISE, &local_adv) && in b44_check_phy()
583 !b44_readphy(bp, MII_LPA, &remote_adv)) in b44_check_phy()
584 b44_set_flow_ctrl(bp, local_adv, remote_adv); in b44_check_phy()
587 netif_carrier_on(bp->dev); in b44_check_phy()
588 b44_link_report(bp); in b44_check_phy()
589 } else if (netif_carrier_ok(bp->dev) && !(bmsr & BMSR_LSTATUS)) { in b44_check_phy()
591 netif_carrier_off(bp->dev); in b44_check_phy()
592 b44_link_report(bp); in b44_check_phy()
596 netdev_warn(bp->dev, "Remote fault detected in PHY\n"); in b44_check_phy()
598 netdev_warn(bp->dev, "Jabber detected in PHY\n"); in b44_check_phy()
604 struct b44 *bp = from_timer(bp, t, timer); in b44_timer() local
606 spin_lock_irq(&bp->lock); in b44_timer()
608 b44_check_phy(bp); in b44_timer()
610 b44_stats_update(bp); in b44_timer()
612 spin_unlock_irq(&bp->lock); in b44_timer()
614 mod_timer(&bp->timer, round_jiffies(jiffies + HZ)); in b44_timer()
617 static void b44_tx(struct b44 *bp) in b44_tx() argument
622 cur = br32(bp, B44_DMATX_STAT) & DMATX_STAT_CDMASK; in b44_tx()
626 for (cons = bp->tx_cons; cons != cur; cons = NEXT_TX(cons)) { in b44_tx()
627 struct ring_info *rp = &bp->tx_buffers[cons]; in b44_tx()
632 dma_unmap_single(bp->sdev->dma_dev, in b44_tx()
644 netdev_completed_queue(bp->dev, pkts_compl, bytes_compl); in b44_tx()
645 bp->tx_cons = cons; in b44_tx()
646 if (netif_queue_stopped(bp->dev) && in b44_tx()
647 TX_BUFFS_AVAIL(bp) > B44_TX_WAKEUP_THRESH) in b44_tx()
648 netif_wake_queue(bp->dev); in b44_tx()
650 bw32(bp, B44_GPTIMER, 0); in b44_tx()
658 static int b44_alloc_rx_skb(struct b44 *bp, int src_idx, u32 dest_idx_unmasked) in b44_alloc_rx_skb() argument
670 src_map = &bp->rx_buffers[src_idx]; in b44_alloc_rx_skb()
672 map = &bp->rx_buffers[dest_idx]; in b44_alloc_rx_skb()
673 skb = netdev_alloc_skb(bp->dev, RX_PKT_BUF_SZ); in b44_alloc_rx_skb()
677 mapping = dma_map_single(bp->sdev->dma_dev, skb->data, in b44_alloc_rx_skb()
683 if (dma_mapping_error(bp->sdev->dma_dev, mapping) || in b44_alloc_rx_skb()
686 if (!dma_mapping_error(bp->sdev->dma_dev, mapping)) in b44_alloc_rx_skb()
687 dma_unmap_single(bp->sdev->dma_dev, mapping, in b44_alloc_rx_skb()
693 mapping = dma_map_single(bp->sdev->dma_dev, skb->data, in b44_alloc_rx_skb()
696 if (dma_mapping_error(bp->sdev->dma_dev, mapping) || in b44_alloc_rx_skb()
698 if (!dma_mapping_error(bp->sdev->dma_dev, mapping)) in b44_alloc_rx_skb()
699 dma_unmap_single(bp->sdev->dma_dev, mapping, RX_PKT_BUF_SZ,DMA_FROM_DEVICE); in b44_alloc_rx_skb()
703 bp->force_copybreak = 1; in b44_alloc_rx_skb()
721 dp = &bp->rx_ring[dest_idx]; in b44_alloc_rx_skb()
723 dp->addr = cpu_to_le32((u32) mapping + bp->dma_offset); in b44_alloc_rx_skb()
725 if (bp->flags & B44_FLAG_RX_RING_HACK) in b44_alloc_rx_skb()
726 b44_sync_dma_desc_for_device(bp->sdev, bp->rx_ring_dma, in b44_alloc_rx_skb()
733 static void b44_recycle_rx(struct b44 *bp, int src_idx, u32 dest_idx_unmasked) in b44_recycle_rx() argument
742 dest_desc = &bp->rx_ring[dest_idx]; in b44_recycle_rx()
743 dest_map = &bp->rx_buffers[dest_idx]; in b44_recycle_rx()
744 src_desc = &bp->rx_ring[src_idx]; in b44_recycle_rx()
745 src_map = &bp->rx_buffers[src_idx]; in b44_recycle_rx()
753 if (bp->flags & B44_FLAG_RX_RING_HACK) in b44_recycle_rx()
754 b44_sync_dma_desc_for_cpu(bp->sdev, bp->rx_ring_dma, in b44_recycle_rx()
769 if (bp->flags & B44_FLAG_RX_RING_HACK) in b44_recycle_rx()
770 b44_sync_dma_desc_for_device(bp->sdev, bp->rx_ring_dma, in b44_recycle_rx()
774 dma_sync_single_for_device(bp->sdev->dma_dev, dest_map->mapping, in b44_recycle_rx()
779 static int b44_rx(struct b44 *bp, int budget) in b44_rx() argument
785 prod = br32(bp, B44_DMARX_STAT) & DMARX_STAT_CDMASK; in b44_rx()
787 cons = bp->rx_cons; in b44_rx()
790 struct ring_info *rp = &bp->rx_buffers[cons]; in b44_rx()
796 dma_sync_single_for_cpu(bp->sdev->dma_dev, map, in b44_rx()
804 b44_recycle_rx(bp, cons, bp->rx_prod); in b44_rx()
806 bp->dev->stats.rx_dropped++; in b44_rx()
825 if (!bp->force_copybreak && len > RX_COPY_THRESHOLD) { in b44_rx()
827 skb_size = b44_alloc_rx_skb(bp, cons, bp->rx_prod); in b44_rx()
830 dma_unmap_single(bp->sdev->dma_dev, map, in b44_rx()
838 b44_recycle_rx(bp, cons, bp->rx_prod); in b44_rx()
839 copy_skb = napi_alloc_skb(&bp->napi, len); in b44_rx()
850 skb->protocol = eth_type_trans(skb, bp->dev); in b44_rx()
855 bp->rx_prod = (bp->rx_prod + 1) & in b44_rx()
860 bp->rx_cons = cons; in b44_rx()
861 bw32(bp, B44_DMARX_PTR, cons * sizeof(struct dma_desc)); in b44_rx()
868 struct b44 *bp = container_of(napi, struct b44, napi); in b44_poll() local
872 spin_lock_irqsave(&bp->lock, flags); in b44_poll()
874 if (bp->istat & (ISTAT_TX | ISTAT_TO)) { in b44_poll()
876 b44_tx(bp); in b44_poll()
879 if (bp->istat & ISTAT_RFO) { /* fast recovery, in ~20msec */ in b44_poll()
880 bp->istat &= ~ISTAT_RFO; in b44_poll()
881 b44_disable_ints(bp); in b44_poll()
882 ssb_device_enable(bp->sdev, 0); /* resets ISTAT_RFO */ in b44_poll()
883 b44_init_rings(bp); in b44_poll()
884 b44_init_hw(bp, B44_FULL_RESET_SKIP_PHY); in b44_poll()
885 netif_wake_queue(bp->dev); in b44_poll()
888 spin_unlock_irqrestore(&bp->lock, flags); in b44_poll()
891 if (bp->istat & ISTAT_RX) in b44_poll()
892 work_done += b44_rx(bp, budget); in b44_poll()
894 if (bp->istat & ISTAT_ERRORS) { in b44_poll()
895 spin_lock_irqsave(&bp->lock, flags); in b44_poll()
896 b44_halt(bp); in b44_poll()
897 b44_init_rings(bp); in b44_poll()
898 b44_init_hw(bp, B44_FULL_RESET_SKIP_PHY); in b44_poll()
899 netif_wake_queue(bp->dev); in b44_poll()
900 spin_unlock_irqrestore(&bp->lock, flags); in b44_poll()
906 b44_enable_ints(bp); in b44_poll()
915 struct b44 *bp = netdev_priv(dev); in b44_interrupt() local
919 spin_lock(&bp->lock); in b44_interrupt()
921 istat = br32(bp, B44_ISTAT); in b44_interrupt()
922 imask = br32(bp, B44_IMASK); in b44_interrupt()
937 if (napi_schedule_prep(&bp->napi)) { in b44_interrupt()
941 bp->istat = istat; in b44_interrupt()
942 __b44_disable_ints(bp); in b44_interrupt()
943 __napi_schedule(&bp->napi); in b44_interrupt()
947 bw32(bp, B44_ISTAT, istat); in b44_interrupt()
948 br32(bp, B44_ISTAT); in b44_interrupt()
950 spin_unlock(&bp->lock); in b44_interrupt()
956 struct b44 *bp = netdev_priv(dev); in b44_tx_timeout() local
960 spin_lock_irq(&bp->lock); in b44_tx_timeout()
962 b44_halt(bp); in b44_tx_timeout()
963 b44_init_rings(bp); in b44_tx_timeout()
964 b44_init_hw(bp, B44_FULL_RESET); in b44_tx_timeout()
966 spin_unlock_irq(&bp->lock); in b44_tx_timeout()
968 b44_enable_ints(bp); in b44_tx_timeout()
975 struct b44 *bp = netdev_priv(dev); in b44_start_xmit() local
982 spin_lock_irqsave(&bp->lock, flags); in b44_start_xmit()
985 if (unlikely(TX_BUFFS_AVAIL(bp) < 1)) { in b44_start_xmit()
991 mapping = dma_map_single(bp->sdev->dma_dev, skb->data, len, DMA_TO_DEVICE); in b44_start_xmit()
992 if (dma_mapping_error(bp->sdev->dma_dev, mapping) || mapping + len > DMA_BIT_MASK(30)) { in b44_start_xmit()
996 if (!dma_mapping_error(bp->sdev->dma_dev, mapping)) in b44_start_xmit()
997 dma_unmap_single(bp->sdev->dma_dev, mapping, len, in b44_start_xmit()
1004 mapping = dma_map_single(bp->sdev->dma_dev, bounce_skb->data, in b44_start_xmit()
1006 if (dma_mapping_error(bp->sdev->dma_dev, mapping) || mapping + len > DMA_BIT_MASK(30)) { in b44_start_xmit()
1007 if (!dma_mapping_error(bp->sdev->dma_dev, mapping)) in b44_start_xmit()
1008 dma_unmap_single(bp->sdev->dma_dev, mapping, in b44_start_xmit()
1019 entry = bp->tx_prod; in b44_start_xmit()
1020 bp->tx_buffers[entry].skb = skb; in b44_start_xmit()
1021 bp->tx_buffers[entry].mapping = mapping; in b44_start_xmit()
1028 bp->tx_ring[entry].ctrl = cpu_to_le32(ctrl); in b44_start_xmit()
1029 bp->tx_ring[entry].addr = cpu_to_le32((u32) mapping+bp->dma_offset); in b44_start_xmit()
1031 if (bp->flags & B44_FLAG_TX_RING_HACK) in b44_start_xmit()
1032 b44_sync_dma_desc_for_device(bp->sdev, bp->tx_ring_dma, in b44_start_xmit()
1033 entry * sizeof(bp->tx_ring[0]), in b44_start_xmit()
1038 bp->tx_prod = entry; in b44_start_xmit()
1042 bw32(bp, B44_DMATX_PTR, entry * sizeof(struct dma_desc)); in b44_start_xmit()
1043 if (bp->flags & B44_FLAG_BUGGY_TXPTR) in b44_start_xmit()
1044 bw32(bp, B44_DMATX_PTR, entry * sizeof(struct dma_desc)); in b44_start_xmit()
1045 if (bp->flags & B44_FLAG_REORDER_BUG) in b44_start_xmit()
1046 br32(bp, B44_DMATX_PTR); in b44_start_xmit()
1050 if (TX_BUFFS_AVAIL(bp) < 1) in b44_start_xmit()
1054 spin_unlock_irqrestore(&bp->lock, flags); in b44_start_xmit()
1065 struct b44 *bp = netdev_priv(dev); in b44_change_mtu() local
1075 spin_lock_irq(&bp->lock); in b44_change_mtu()
1076 b44_halt(bp); in b44_change_mtu()
1078 b44_init_rings(bp); in b44_change_mtu()
1079 b44_init_hw(bp, B44_FULL_RESET); in b44_change_mtu()
1080 spin_unlock_irq(&bp->lock); in b44_change_mtu()
1082 b44_enable_ints(bp); in b44_change_mtu()
1094 static void b44_free_rings(struct b44 *bp) in b44_free_rings() argument
1100 rp = &bp->rx_buffers[i]; in b44_free_rings()
1104 dma_unmap_single(bp->sdev->dma_dev, rp->mapping, RX_PKT_BUF_SZ, in b44_free_rings()
1112 rp = &bp->tx_buffers[i]; in b44_free_rings()
1116 dma_unmap_single(bp->sdev->dma_dev, rp->mapping, rp->skb->len, in b44_free_rings()
1129 static void b44_init_rings(struct b44 *bp) in b44_init_rings() argument
1133 b44_free_rings(bp); in b44_init_rings()
1135 memset(bp->rx_ring, 0, B44_RX_RING_BYTES); in b44_init_rings()
1136 memset(bp->tx_ring, 0, B44_TX_RING_BYTES); in b44_init_rings()
1138 if (bp->flags & B44_FLAG_RX_RING_HACK) in b44_init_rings()
1139 dma_sync_single_for_device(bp->sdev->dma_dev, bp->rx_ring_dma, in b44_init_rings()
1142 if (bp->flags & B44_FLAG_TX_RING_HACK) in b44_init_rings()
1143 dma_sync_single_for_device(bp->sdev->dma_dev, bp->tx_ring_dma, in b44_init_rings()
1146 for (i = 0; i < bp->rx_pending; i++) { in b44_init_rings()
1147 if (b44_alloc_rx_skb(bp, -1, i) < 0) in b44_init_rings()
1156 static void b44_free_consistent(struct b44 *bp) in b44_free_consistent() argument
1158 kfree(bp->rx_buffers); in b44_free_consistent()
1159 bp->rx_buffers = NULL; in b44_free_consistent()
1160 kfree(bp->tx_buffers); in b44_free_consistent()
1161 bp->tx_buffers = NULL; in b44_free_consistent()
1162 if (bp->rx_ring) { in b44_free_consistent()
1163 if (bp->flags & B44_FLAG_RX_RING_HACK) { in b44_free_consistent()
1164 dma_unmap_single(bp->sdev->dma_dev, bp->rx_ring_dma, in b44_free_consistent()
1166 kfree(bp->rx_ring); in b44_free_consistent()
1168 dma_free_coherent(bp->sdev->dma_dev, DMA_TABLE_BYTES, in b44_free_consistent()
1169 bp->rx_ring, bp->rx_ring_dma); in b44_free_consistent()
1170 bp->rx_ring = NULL; in b44_free_consistent()
1171 bp->flags &= ~B44_FLAG_RX_RING_HACK; in b44_free_consistent()
1173 if (bp->tx_ring) { in b44_free_consistent()
1174 if (bp->flags & B44_FLAG_TX_RING_HACK) { in b44_free_consistent()
1175 dma_unmap_single(bp->sdev->dma_dev, bp->tx_ring_dma, in b44_free_consistent()
1177 kfree(bp->tx_ring); in b44_free_consistent()
1179 dma_free_coherent(bp->sdev->dma_dev, DMA_TABLE_BYTES, in b44_free_consistent()
1180 bp->tx_ring, bp->tx_ring_dma); in b44_free_consistent()
1181 bp->tx_ring = NULL; in b44_free_consistent()
1182 bp->flags &= ~B44_FLAG_TX_RING_HACK; in b44_free_consistent()
1190 static int b44_alloc_consistent(struct b44 *bp, gfp_t gfp) in b44_alloc_consistent() argument
1195 bp->rx_buffers = kzalloc(size, gfp); in b44_alloc_consistent()
1196 if (!bp->rx_buffers) in b44_alloc_consistent()
1200 bp->tx_buffers = kzalloc(size, gfp); in b44_alloc_consistent()
1201 if (!bp->tx_buffers) in b44_alloc_consistent()
1205 bp->rx_ring = dma_alloc_coherent(bp->sdev->dma_dev, size, in b44_alloc_consistent()
1206 &bp->rx_ring_dma, gfp); in b44_alloc_consistent()
1207 if (!bp->rx_ring) { in b44_alloc_consistent()
1218 rx_ring_dma = dma_map_single(bp->sdev->dma_dev, rx_ring, in b44_alloc_consistent()
1222 if (dma_mapping_error(bp->sdev->dma_dev, rx_ring_dma) || in b44_alloc_consistent()
1228 bp->rx_ring = rx_ring; in b44_alloc_consistent()
1229 bp->rx_ring_dma = rx_ring_dma; in b44_alloc_consistent()
1230 bp->flags |= B44_FLAG_RX_RING_HACK; in b44_alloc_consistent()
1233 bp->tx_ring = dma_alloc_coherent(bp->sdev->dma_dev, size, in b44_alloc_consistent()
1234 &bp->tx_ring_dma, gfp); in b44_alloc_consistent()
1235 if (!bp->tx_ring) { in b44_alloc_consistent()
1246 tx_ring_dma = dma_map_single(bp->sdev->dma_dev, tx_ring, in b44_alloc_consistent()
1250 if (dma_mapping_error(bp->sdev->dma_dev, tx_ring_dma) || in b44_alloc_consistent()
1256 bp->tx_ring = tx_ring; in b44_alloc_consistent()
1257 bp->tx_ring_dma = tx_ring_dma; in b44_alloc_consistent()
1258 bp->flags |= B44_FLAG_TX_RING_HACK; in b44_alloc_consistent()
1264 b44_free_consistent(bp); in b44_alloc_consistent()
1269 static void b44_clear_stats(struct b44 *bp) in b44_clear_stats() argument
1273 bw32(bp, B44_MIB_CTRL, MIB_CTRL_CLR_ON_READ); in b44_clear_stats()
1275 br32(bp, reg); in b44_clear_stats()
1277 br32(bp, reg); in b44_clear_stats()
1281 static void b44_chip_reset(struct b44 *bp, int reset_kind) in b44_chip_reset() argument
1283 struct ssb_device *sdev = bp->sdev; in b44_chip_reset()
1286 was_enabled = ssb_device_is_enabled(bp->sdev); in b44_chip_reset()
1288 ssb_device_enable(bp->sdev, 0); in b44_chip_reset()
1292 bw32(bp, B44_RCV_LAZY, 0); in b44_chip_reset()
1293 bw32(bp, B44_ENET_CTRL, ENET_CTRL_DISABLE); in b44_chip_reset()
1294 b44_wait_bit(bp, B44_ENET_CTRL, ENET_CTRL_DISABLE, 200, 1); in b44_chip_reset()
1295 bw32(bp, B44_DMATX_CTRL, 0); in b44_chip_reset()
1296 bp->tx_prod = bp->tx_cons = 0; in b44_chip_reset()
1297 if (br32(bp, B44_DMARX_STAT) & DMARX_STAT_EMASK) { in b44_chip_reset()
1298 b44_wait_bit(bp, B44_DMARX_STAT, DMARX_STAT_SIDLE, in b44_chip_reset()
1301 bw32(bp, B44_DMARX_CTRL, 0); in b44_chip_reset()
1302 bp->rx_prod = bp->rx_cons = 0; in b44_chip_reset()
1305 b44_clear_stats(bp); in b44_chip_reset()
1316 bw32(bp, B44_MDIO_CTRL, (MDIO_CTRL_PREAMBLE | in b44_chip_reset()
1322 bw32(bp, B44_MDIO_CTRL, (MDIO_CTRL_PREAMBLE | in b44_chip_reset()
1331 br32(bp, B44_MDIO_CTRL); in b44_chip_reset()
1333 if (!(br32(bp, B44_DEVCTRL) & DEVCTRL_IPP)) { in b44_chip_reset()
1334 bw32(bp, B44_ENET_CTRL, ENET_CTRL_EPSEL); in b44_chip_reset()
1335 br32(bp, B44_ENET_CTRL); in b44_chip_reset()
1336 bp->flags |= B44_FLAG_EXTERNAL_PHY; in b44_chip_reset()
1338 u32 val = br32(bp, B44_DEVCTRL); in b44_chip_reset()
1341 bw32(bp, B44_DEVCTRL, (val & ~DEVCTRL_EPR)); in b44_chip_reset()
1342 br32(bp, B44_DEVCTRL); in b44_chip_reset()
1345 bp->flags &= ~B44_FLAG_EXTERNAL_PHY; in b44_chip_reset()
1350 static void b44_halt(struct b44 *bp) in b44_halt() argument
1352 b44_disable_ints(bp); in b44_halt()
1354 b44_phy_reset(bp); in b44_halt()
1356 netdev_info(bp->dev, "powering down PHY\n"); in b44_halt()
1357 bw32(bp, B44_MAC_CTRL, MAC_CTRL_PHY_PDOWN); in b44_halt()
1360 if (bp->flags & B44_FLAG_EXTERNAL_PHY) in b44_halt()
1361 b44_chip_reset(bp, B44_CHIP_RESET_FULL); in b44_halt()
1363 b44_chip_reset(bp, B44_CHIP_RESET_PARTIAL); in b44_halt()
1367 static void __b44_set_mac_addr(struct b44 *bp) in __b44_set_mac_addr() argument
1369 bw32(bp, B44_CAM_CTRL, 0); in __b44_set_mac_addr()
1370 if (!(bp->dev->flags & IFF_PROMISC)) { in __b44_set_mac_addr()
1373 __b44_cam_write(bp, bp->dev->dev_addr, 0); in __b44_set_mac_addr()
1374 val = br32(bp, B44_CAM_CTRL); in __b44_set_mac_addr()
1375 bw32(bp, B44_CAM_CTRL, val | CAM_CTRL_ENABLE); in __b44_set_mac_addr()
1381 struct b44 *bp = netdev_priv(dev); in b44_set_mac_addr() local
1393 spin_lock_irq(&bp->lock); in b44_set_mac_addr()
1395 val = br32(bp, B44_RXCONFIG); in b44_set_mac_addr()
1397 __b44_set_mac_addr(bp); in b44_set_mac_addr()
1399 spin_unlock_irq(&bp->lock); in b44_set_mac_addr()
1408 static void b44_init_hw(struct b44 *bp, int reset_kind) in b44_init_hw() argument
1412 b44_chip_reset(bp, B44_CHIP_RESET_FULL); in b44_init_hw()
1414 b44_phy_reset(bp); in b44_init_hw()
1415 b44_setup_phy(bp); in b44_init_hw()
1419 bw32(bp, B44_MAC_CTRL, MAC_CTRL_CRC32_ENAB | MAC_CTRL_PHY_LEDCTRL); in b44_init_hw()
1420 bw32(bp, B44_RCV_LAZY, (1 << RCV_LAZY_FC_SHIFT)); in b44_init_hw()
1423 __b44_set_rx_mode(bp->dev); in b44_init_hw()
1426 bw32(bp, B44_RXMAXLEN, bp->dev->mtu + ETH_HLEN + 8 + RX_HEADER_LEN); in b44_init_hw()
1427 bw32(bp, B44_TXMAXLEN, bp->dev->mtu + ETH_HLEN + 8 + RX_HEADER_LEN); in b44_init_hw()
1429 bw32(bp, B44_TX_WMARK, 56); /* XXX magic */ in b44_init_hw()
1431 bw32(bp, B44_DMARX_CTRL, (DMARX_CTRL_ENABLE | in b44_init_hw()
1434 bw32(bp, B44_DMATX_CTRL, DMATX_CTRL_ENABLE); in b44_init_hw()
1435 bw32(bp, B44_DMATX_ADDR, bp->tx_ring_dma + bp->dma_offset); in b44_init_hw()
1436 bw32(bp, B44_DMARX_CTRL, (DMARX_CTRL_ENABLE | in b44_init_hw()
1438 bw32(bp, B44_DMARX_ADDR, bp->rx_ring_dma + bp->dma_offset); in b44_init_hw()
1440 bw32(bp, B44_DMARX_PTR, bp->rx_pending); in b44_init_hw()
1441 bp->rx_prod = bp->rx_pending; in b44_init_hw()
1443 bw32(bp, B44_MIB_CTRL, MIB_CTRL_CLR_ON_READ); in b44_init_hw()
1446 val = br32(bp, B44_ENET_CTRL); in b44_init_hw()
1447 bw32(bp, B44_ENET_CTRL, (val | ENET_CTRL_ENABLE)); in b44_init_hw()
1449 netdev_reset_queue(bp->dev); in b44_init_hw()
1454 struct b44 *bp = netdev_priv(dev); in b44_open() local
1457 err = b44_alloc_consistent(bp, GFP_KERNEL); in b44_open()
1461 napi_enable(&bp->napi); in b44_open()
1463 b44_init_rings(bp); in b44_open()
1464 b44_init_hw(bp, B44_FULL_RESET); in b44_open()
1466 b44_check_phy(bp); in b44_open()
1470 napi_disable(&bp->napi); in b44_open()
1471 b44_chip_reset(bp, B44_CHIP_RESET_PARTIAL); in b44_open()
1472 b44_free_rings(bp); in b44_open()
1473 b44_free_consistent(bp); in b44_open()
1477 timer_setup(&bp->timer, b44_timer, 0); in b44_open()
1478 bp->timer.expires = jiffies + HZ; in b44_open()
1479 add_timer(&bp->timer); in b44_open()
1481 b44_enable_ints(bp); in b44_open()
1483 if (bp->flags & B44_FLAG_EXTERNAL_PHY) in b44_open()
1504 static void bwfilter_table(struct b44 *bp, u8 *pp, u32 bytes, u32 table_offset) in bwfilter_table() argument
1510 bw32(bp, B44_FILT_ADDR, table_offset + i); in bwfilter_table()
1511 bw32(bp, B44_FILT_DATA, pattern[i / sizeof(u32)]); in bwfilter_table()
1544 static void b44_setup_pseudo_magicp(struct b44 *bp) in b44_setup_pseudo_magicp() argument
1558 plen0 = b44_magic_pattern(bp->dev->dev_addr, pwol_pattern, pwol_mask, in b44_setup_pseudo_magicp()
1561 bwfilter_table(bp, pwol_pattern, B44_PATTERN_SIZE, B44_PATTERN_BASE); in b44_setup_pseudo_magicp()
1562 bwfilter_table(bp, pwol_mask, B44_PMASK_SIZE, B44_PMASK_BASE); in b44_setup_pseudo_magicp()
1567 plen1 = b44_magic_pattern(bp->dev->dev_addr, pwol_pattern, pwol_mask, in b44_setup_pseudo_magicp()
1570 bwfilter_table(bp, pwol_pattern, B44_PATTERN_SIZE, in b44_setup_pseudo_magicp()
1572 bwfilter_table(bp, pwol_mask, B44_PMASK_SIZE, in b44_setup_pseudo_magicp()
1578 plen2 = b44_magic_pattern(bp->dev->dev_addr, pwol_pattern, pwol_mask, in b44_setup_pseudo_magicp()
1581 bwfilter_table(bp, pwol_pattern, B44_PATTERN_SIZE, in b44_setup_pseudo_magicp()
1583 bwfilter_table(bp, pwol_mask, B44_PMASK_SIZE, in b44_setup_pseudo_magicp()
1590 bw32(bp, B44_WKUP_LEN, val); in b44_setup_pseudo_magicp()
1593 val = br32(bp, B44_DEVCTRL); in b44_setup_pseudo_magicp()
1594 bw32(bp, B44_DEVCTRL, val | DEVCTRL_PFE); in b44_setup_pseudo_magicp()
1599 static void b44_setup_wol_pci(struct b44 *bp) in b44_setup_wol_pci() argument
1603 if (bp->sdev->bus->bustype != SSB_BUSTYPE_SSB) { in b44_setup_wol_pci()
1604 bw32(bp, SSB_TMSLOW, br32(bp, SSB_TMSLOW) | SSB_TMSLOW_PE); in b44_setup_wol_pci()
1605 pci_read_config_word(bp->sdev->bus->host_pci, SSB_PMCSR, &val); in b44_setup_wol_pci()
1606 pci_write_config_word(bp->sdev->bus->host_pci, SSB_PMCSR, val | SSB_PE); in b44_setup_wol_pci()
1610 static inline void b44_setup_wol_pci(struct b44 *bp) { } in b44_setup_wol_pci() argument
1613 static void b44_setup_wol(struct b44 *bp) in b44_setup_wol() argument
1617 bw32(bp, B44_RXCONFIG, RXCONFIG_ALLMULTI); in b44_setup_wol()
1619 if (bp->flags & B44_FLAG_B0_ANDLATER) { in b44_setup_wol()
1621 bw32(bp, B44_WKUP_LEN, WKUP_LEN_DISABLE); in b44_setup_wol()
1623 val = bp->dev->dev_addr[2] << 24 | in b44_setup_wol()
1624 bp->dev->dev_addr[3] << 16 | in b44_setup_wol()
1625 bp->dev->dev_addr[4] << 8 | in b44_setup_wol()
1626 bp->dev->dev_addr[5]; in b44_setup_wol()
1627 bw32(bp, B44_ADDR_LO, val); in b44_setup_wol()
1629 val = bp->dev->dev_addr[0] << 8 | in b44_setup_wol()
1630 bp->dev->dev_addr[1]; in b44_setup_wol()
1631 bw32(bp, B44_ADDR_HI, val); in b44_setup_wol()
1633 val = br32(bp, B44_DEVCTRL); in b44_setup_wol()
1634 bw32(bp, B44_DEVCTRL, val | DEVCTRL_MPM | DEVCTRL_PFE); in b44_setup_wol()
1637 b44_setup_pseudo_magicp(bp); in b44_setup_wol()
1639 b44_setup_wol_pci(bp); in b44_setup_wol()
1644 struct b44 *bp = netdev_priv(dev); in b44_close() local
1648 if (bp->flags & B44_FLAG_EXTERNAL_PHY) in b44_close()
1651 napi_disable(&bp->napi); in b44_close()
1653 del_timer_sync(&bp->timer); in b44_close()
1655 spin_lock_irq(&bp->lock); in b44_close()
1657 b44_halt(bp); in b44_close()
1658 b44_free_rings(bp); in b44_close()
1661 spin_unlock_irq(&bp->lock); in b44_close()
1665 if (bp->flags & B44_FLAG_WOL_ENABLE) { in b44_close()
1666 b44_init_hw(bp, B44_PARTIAL_RESET); in b44_close()
1667 b44_setup_wol(bp); in b44_close()
1670 b44_free_consistent(bp); in b44_close()
1678 struct b44 *bp = netdev_priv(dev); in b44_get_stats64() local
1679 struct b44_hw_stats *hwstat = &bp->hw_stats; in b44_get_stats64()
1721 static int __b44_load_mcast(struct b44 *bp, struct net_device *dev) in __b44_load_mcast() argument
1731 __b44_cam_write(bp, ha->addr, i++ + 1); in __b44_load_mcast()
1738 struct b44 *bp = netdev_priv(dev); in __b44_set_rx_mode() local
1741 val = br32(bp, B44_RXCONFIG); in __b44_set_rx_mode()
1745 bw32(bp, B44_RXCONFIG, val); in __b44_set_rx_mode()
1750 __b44_set_mac_addr(bp); in __b44_set_rx_mode()
1756 i = __b44_load_mcast(bp, dev); in __b44_set_rx_mode()
1759 __b44_cam_write(bp, zero, i); in __b44_set_rx_mode()
1761 bw32(bp, B44_RXCONFIG, val); in __b44_set_rx_mode()
1762 val = br32(bp, B44_CAM_CTRL); in __b44_set_rx_mode()
1763 bw32(bp, B44_CAM_CTRL, val | CAM_CTRL_ENABLE); in __b44_set_rx_mode()
1769 struct b44 *bp = netdev_priv(dev); in b44_set_rx_mode() local
1771 spin_lock_irq(&bp->lock); in b44_set_rx_mode()
1773 spin_unlock_irq(&bp->lock); in b44_set_rx_mode()
1778 struct b44 *bp = netdev_priv(dev); in b44_get_msglevel() local
1779 return bp->msg_enable; in b44_get_msglevel()
1784 struct b44 *bp = netdev_priv(dev); in b44_set_msglevel() local
1785 bp->msg_enable = value; in b44_set_msglevel()
1790 struct b44 *bp = netdev_priv(dev); in b44_get_drvinfo() local
1791 struct ssb_bus *bus = bp->sdev->bus; in b44_get_drvinfo()
1811 struct b44 *bp = netdev_priv(dev); in b44_nway_reset() local
1815 spin_lock_irq(&bp->lock); in b44_nway_reset()
1816 b44_readphy(bp, MII_BMCR, &bmcr); in b44_nway_reset()
1817 b44_readphy(bp, MII_BMCR, &bmcr); in b44_nway_reset()
1820 b44_writephy(bp, MII_BMCR, in b44_nway_reset()
1824 spin_unlock_irq(&bp->lock); in b44_nway_reset()
1832 struct b44 *bp = netdev_priv(dev); in b44_get_link_ksettings() local
1835 if (bp->flags & B44_FLAG_EXTERNAL_PHY) { in b44_get_link_ksettings()
1850 if (bp->flags & B44_FLAG_ADV_10HALF) in b44_get_link_ksettings()
1852 if (bp->flags & B44_FLAG_ADV_10FULL) in b44_get_link_ksettings()
1854 if (bp->flags & B44_FLAG_ADV_100HALF) in b44_get_link_ksettings()
1856 if (bp->flags & B44_FLAG_ADV_100FULL) in b44_get_link_ksettings()
1859 cmd->base.speed = (bp->flags & B44_FLAG_100_BASE_T) ? in b44_get_link_ksettings()
1861 cmd->base.duplex = (bp->flags & B44_FLAG_FULL_DUPLEX) ? in b44_get_link_ksettings()
1864 cmd->base.phy_address = bp->phy_addr; in b44_get_link_ksettings()
1865 cmd->base.autoneg = (bp->flags & B44_FLAG_FORCE_LINK) ? in b44_get_link_ksettings()
1886 struct b44 *bp = netdev_priv(dev); in b44_set_link_ksettings() local
1891 if (bp->flags & B44_FLAG_EXTERNAL_PHY) { in b44_set_link_ksettings()
1893 spin_lock_irq(&bp->lock); in b44_set_link_ksettings()
1895 b44_setup_phy(bp); in b44_set_link_ksettings()
1899 spin_unlock_irq(&bp->lock); in b44_set_link_ksettings()
1922 spin_lock_irq(&bp->lock); in b44_set_link_ksettings()
1925 bp->flags &= ~(B44_FLAG_FORCE_LINK | in b44_set_link_ksettings()
1933 bp->flags |= (B44_FLAG_ADV_10HALF | in b44_set_link_ksettings()
1939 bp->flags |= B44_FLAG_ADV_10HALF; in b44_set_link_ksettings()
1941 bp->flags |= B44_FLAG_ADV_10FULL; in b44_set_link_ksettings()
1943 bp->flags |= B44_FLAG_ADV_100HALF; in b44_set_link_ksettings()
1945 bp->flags |= B44_FLAG_ADV_100FULL; in b44_set_link_ksettings()
1948 bp->flags |= B44_FLAG_FORCE_LINK; in b44_set_link_ksettings()
1949 bp->flags &= ~(B44_FLAG_100_BASE_T | B44_FLAG_FULL_DUPLEX); in b44_set_link_ksettings()
1951 bp->flags |= B44_FLAG_100_BASE_T; in b44_set_link_ksettings()
1953 bp->flags |= B44_FLAG_FULL_DUPLEX; in b44_set_link_ksettings()
1957 b44_setup_phy(bp); in b44_set_link_ksettings()
1959 spin_unlock_irq(&bp->lock); in b44_set_link_ksettings()
1967 struct b44 *bp = netdev_priv(dev); in b44_get_ringparam() local
1970 ering->rx_pending = bp->rx_pending; in b44_get_ringparam()
1978 struct b44 *bp = netdev_priv(dev); in b44_set_ringparam() local
1986 spin_lock_irq(&bp->lock); in b44_set_ringparam()
1988 bp->rx_pending = ering->rx_pending; in b44_set_ringparam()
1989 bp->tx_pending = ering->tx_pending; in b44_set_ringparam()
1991 b44_halt(bp); in b44_set_ringparam()
1992 b44_init_rings(bp); in b44_set_ringparam()
1993 b44_init_hw(bp, B44_FULL_RESET); in b44_set_ringparam()
1994 netif_wake_queue(bp->dev); in b44_set_ringparam()
1995 spin_unlock_irq(&bp->lock); in b44_set_ringparam()
1997 b44_enable_ints(bp); in b44_set_ringparam()
2005 struct b44 *bp = netdev_priv(dev); in b44_get_pauseparam() local
2008 (bp->flags & B44_FLAG_PAUSE_AUTO) != 0; in b44_get_pauseparam()
2010 (bp->flags & B44_FLAG_RX_PAUSE) != 0; in b44_get_pauseparam()
2012 (bp->flags & B44_FLAG_TX_PAUSE) != 0; in b44_get_pauseparam()
2018 struct b44 *bp = netdev_priv(dev); in b44_set_pauseparam() local
2020 spin_lock_irq(&bp->lock); in b44_set_pauseparam()
2022 bp->flags |= B44_FLAG_PAUSE_AUTO; in b44_set_pauseparam()
2024 bp->flags &= ~B44_FLAG_PAUSE_AUTO; in b44_set_pauseparam()
2026 bp->flags |= B44_FLAG_RX_PAUSE; in b44_set_pauseparam()
2028 bp->flags &= ~B44_FLAG_RX_PAUSE; in b44_set_pauseparam()
2030 bp->flags |= B44_FLAG_TX_PAUSE; in b44_set_pauseparam()
2032 bp->flags &= ~B44_FLAG_TX_PAUSE; in b44_set_pauseparam()
2033 if (bp->flags & B44_FLAG_PAUSE_AUTO) { in b44_set_pauseparam()
2034 b44_halt(bp); in b44_set_pauseparam()
2035 b44_init_rings(bp); in b44_set_pauseparam()
2036 b44_init_hw(bp, B44_FULL_RESET); in b44_set_pauseparam()
2038 __b44_set_flow_ctrl(bp, bp->flags); in b44_set_pauseparam()
2040 spin_unlock_irq(&bp->lock); in b44_set_pauseparam()
2042 b44_enable_ints(bp); in b44_set_pauseparam()
2069 struct b44 *bp = netdev_priv(dev); in b44_get_ethtool_stats() local
2070 struct b44_hw_stats *hwstat = &bp->hw_stats; in b44_get_ethtool_stats()
2075 spin_lock_irq(&bp->lock); in b44_get_ethtool_stats()
2076 b44_stats_update(bp); in b44_get_ethtool_stats()
2077 spin_unlock_irq(&bp->lock); in b44_get_ethtool_stats()
2092 struct b44 *bp = netdev_priv(dev); in b44_get_wol() local
2095 if (bp->flags & B44_FLAG_WOL_ENABLE) in b44_get_wol()
2104 struct b44 *bp = netdev_priv(dev); in b44_set_wol() local
2106 spin_lock_irq(&bp->lock); in b44_set_wol()
2108 bp->flags |= B44_FLAG_WOL_ENABLE; in b44_set_wol()
2110 bp->flags &= ~B44_FLAG_WOL_ENABLE; in b44_set_wol()
2111 spin_unlock_irq(&bp->lock); in b44_set_wol()
2113 device_set_wakeup_enable(bp->sdev->dev, wol->wolopts & WAKE_MAGIC); in b44_set_wol()
2138 struct b44 *bp = netdev_priv(dev); in b44_ioctl() local
2144 spin_lock_irq(&bp->lock); in b44_ioctl()
2145 if (bp->flags & B44_FLAG_EXTERNAL_PHY) { in b44_ioctl()
2149 err = generic_mii_ioctl(&bp->mii_if, if_mii(ifr), cmd, NULL); in b44_ioctl()
2151 spin_unlock_irq(&bp->lock); in b44_ioctl()
2156 static int b44_get_invariants(struct b44 *bp) in b44_get_invariants() argument
2158 struct ssb_device *sdev = bp->sdev; in b44_get_invariants()
2162 bp->dma_offset = ssb_dma_translation(sdev); in b44_get_invariants()
2167 bp->phy_addr = sdev->bus->sprom.et1phyaddr; in b44_get_invariants()
2170 bp->phy_addr = sdev->bus->sprom.et0phyaddr; in b44_get_invariants()
2175 bp->phy_addr &= 0x1F; in b44_get_invariants()
2177 memcpy(bp->dev->dev_addr, addr, ETH_ALEN); in b44_get_invariants()
2179 if (!is_valid_ether_addr(&bp->dev->dev_addr[0])){ in b44_get_invariants()
2184 bp->imask = IMASK_DEF; in b44_get_invariants()
2190 if (bp->sdev->id.revision >= 7) in b44_get_invariants()
2191 bp->flags |= B44_FLAG_B0_ANDLATER; in b44_get_invariants()
2214 struct b44 *bp = netdev_priv(dev); in b44_adjust_link() local
2220 if (bp->old_link != phydev->link) { in b44_adjust_link()
2222 bp->old_link = phydev->link; in b44_adjust_link()
2228 (bp->flags & B44_FLAG_FULL_DUPLEX)) { in b44_adjust_link()
2230 bp->flags &= ~B44_FLAG_FULL_DUPLEX; in b44_adjust_link()
2232 !(bp->flags & B44_FLAG_FULL_DUPLEX)) { in b44_adjust_link()
2234 bp->flags |= B44_FLAG_FULL_DUPLEX; in b44_adjust_link()
2239 u32 val = br32(bp, B44_TX_CTRL); in b44_adjust_link()
2240 if (bp->flags & B44_FLAG_FULL_DUPLEX) in b44_adjust_link()
2244 bw32(bp, B44_TX_CTRL, val); in b44_adjust_link()
2249 static int b44_register_phy_one(struct b44 *bp) in b44_register_phy_one() argument
2252 struct ssb_device *sdev = bp->sdev; in b44_register_phy_one()
2265 mii_bus->priv = bp; in b44_register_phy_one()
2270 mii_bus->phy_mask = ~(1 << bp->phy_addr); in b44_register_phy_one()
2273 bp->mii_bus = mii_bus; in b44_register_phy_one()
2281 if (!mdiobus_is_registered_device(bp->mii_bus, bp->phy_addr) && in b44_register_phy_one()
2286 bp->phy_addr); in b44_register_phy_one()
2288 bp->phy_addr = 0; in b44_register_phy_one()
2290 bp->phy_addr); in b44_register_phy_one()
2293 bp->phy_addr); in b44_register_phy_one()
2296 phydev = phy_connect(bp->dev, bus_id, &b44_adjust_link, in b44_register_phy_one()
2300 bp->phy_addr); in b44_register_phy_one()
2312 bp->old_link = 0; in b44_register_phy_one()
2313 bp->phy_addr = phydev->mdio.addr; in b44_register_phy_one()
2329 static void b44_unregister_phy_one(struct b44 *bp) in b44_unregister_phy_one() argument
2331 struct net_device *dev = bp->dev; in b44_unregister_phy_one()
2332 struct mii_bus *mii_bus = bp->mii_bus; in b44_unregister_phy_one()
2343 struct b44 *bp; in b44_init_one() local
2350 dev = alloc_etherdev(sizeof(*bp)); in b44_init_one()
2361 bp = netdev_priv(dev); in b44_init_one()
2362 bp->sdev = sdev; in b44_init_one()
2363 bp->dev = dev; in b44_init_one()
2364 bp->force_copybreak = 0; in b44_init_one()
2366 bp->msg_enable = netif_msg_init(b44_debug, B44_DEF_MSG_ENABLE); in b44_init_one()
2368 spin_lock_init(&bp->lock); in b44_init_one()
2369 u64_stats_init(&bp->hw_stats.syncp); in b44_init_one()
2371 bp->rx_pending = B44_DEF_RX_RING_PENDING; in b44_init_one()
2372 bp->tx_pending = B44_DEF_TX_RING_PENDING; in b44_init_one()
2375 netif_napi_add(dev, &bp->napi, b44_poll, 64); in b44_init_one()
2395 err = b44_get_invariants(bp); in b44_init_one()
2402 if (bp->phy_addr == B44_PHY_ADDR_NO_PHY) { in b44_init_one()
2408 bp->mii_if.dev = dev; in b44_init_one()
2409 bp->mii_if.mdio_read = b44_mdio_read_mii; in b44_init_one()
2410 bp->mii_if.mdio_write = b44_mdio_write_mii; in b44_init_one()
2411 bp->mii_if.phy_id = bp->phy_addr; in b44_init_one()
2412 bp->mii_if.phy_id_mask = 0x1f; in b44_init_one()
2413 bp->mii_if.reg_num_mask = 0x1f; in b44_init_one()
2416 bp->flags |= (B44_FLAG_ADV_10HALF | B44_FLAG_ADV_10FULL | in b44_init_one()
2420 bp->flags |= B44_FLAG_PAUSE_AUTO; in b44_init_one()
2435 b44_chip_reset(bp, B44_CHIP_RESET_FULL); in b44_init_one()
2438 err = b44_phy_reset(bp); in b44_init_one()
2444 if (bp->flags & B44_FLAG_EXTERNAL_PHY) { in b44_init_one()
2445 err = b44_register_phy_one(bp); in b44_init_one()
2463 netif_napi_del(&bp->napi); in b44_init_one()
2473 struct b44 *bp = netdev_priv(dev); in b44_remove_one() local
2476 if (bp->flags & B44_FLAG_EXTERNAL_PHY) in b44_remove_one()
2477 b44_unregister_phy_one(bp); in b44_remove_one()
2480 netif_napi_del(&bp->napi); in b44_remove_one()
2489 struct b44 *bp = netdev_priv(dev); in b44_suspend() local
2494 del_timer_sync(&bp->timer); in b44_suspend()
2496 spin_lock_irq(&bp->lock); in b44_suspend()
2498 b44_halt(bp); in b44_suspend()
2499 netif_carrier_off(bp->dev); in b44_suspend()
2500 netif_device_detach(bp->dev); in b44_suspend()
2501 b44_free_rings(bp); in b44_suspend()
2503 spin_unlock_irq(&bp->lock); in b44_suspend()
2506 if (bp->flags & B44_FLAG_WOL_ENABLE) { in b44_suspend()
2507 b44_init_hw(bp, B44_PARTIAL_RESET); in b44_suspend()
2508 b44_setup_wol(bp); in b44_suspend()
2518 struct b44 *bp = netdev_priv(dev); in b44_resume() local
2531 spin_lock_irq(&bp->lock); in b44_resume()
2532 b44_init_rings(bp); in b44_resume()
2533 b44_init_hw(bp, B44_FULL_RESET); in b44_resume()
2534 spin_unlock_irq(&bp->lock); in b44_resume()
2544 spin_lock_irq(&bp->lock); in b44_resume()
2545 b44_halt(bp); in b44_resume()
2546 b44_free_rings(bp); in b44_resume()
2547 spin_unlock_irq(&bp->lock); in b44_resume()
2551 netif_device_attach(bp->dev); in b44_resume()
2553 b44_enable_ints(bp); in b44_resume()
2556 mod_timer(&bp->timer, jiffies + 1); in b44_resume()