Lines Matching refs:XGMAC_SET_BITS
404 XGMAC_SET_BITS(pdata->rss_table[i], MAC_RSSDR, DMCH, table[i]); in xgbe_set_rss_lookup_table()
543 XGMAC_SET_BITS(reg_val, MAC_Q0TFCR, TFE, 0); in xgbe_disable_tx_flow_control()
589 XGMAC_SET_BITS(reg_val, MAC_Q0TFCR, TFE, 1); in xgbe_enable_tx_flow_control()
591 XGMAC_SET_BITS(reg_val, MAC_Q0TFCR, PT, 0xffff); in xgbe_enable_tx_flow_control()
678 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, NIE20, 1); in xgbe_enable_dma_interrupts()
679 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, AIE20, 1); in xgbe_enable_dma_interrupts()
681 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, NIE, 1); in xgbe_enable_dma_interrupts()
682 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, AIE, 1); in xgbe_enable_dma_interrupts()
684 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, FBEE, 1); in xgbe_enable_dma_interrupts()
693 XGMAC_SET_BITS(channel->curr_ier, in xgbe_enable_dma_interrupts()
703 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RBUE, 1); in xgbe_enable_dma_interrupts()
705 XGMAC_SET_BITS(channel->curr_ier, in xgbe_enable_dma_interrupts()
734 XGMAC_SET_BITS(mac_ier, MAC_IER, TSIE, 1); in xgbe_enable_mac_interrupts()
996 XGMAC_SET_BITS(mac_addr_hi, MAC_MACA1HR, AE, 1); in xgbe_set_mac_reg()
1295 XGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, REG, reg); in xgbe_write_ext_mii_regs()
1296 XGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, DA, addr); in xgbe_write_ext_mii_regs()
1300 XGMAC_SET_BITS(mdio_sccd, MAC_MDIOSCCDR, DATA, val); in xgbe_write_ext_mii_regs()
1301 XGMAC_SET_BITS(mdio_sccd, MAC_MDIOSCCDR, CMD, 1); in xgbe_write_ext_mii_regs()
1302 XGMAC_SET_BITS(mdio_sccd, MAC_MDIOSCCDR, BUSY, 1); in xgbe_write_ext_mii_regs()
1321 XGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, REG, reg); in xgbe_read_ext_mii_regs()
1322 XGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, DA, addr); in xgbe_read_ext_mii_regs()
1326 XGMAC_SET_BITS(mdio_sccd, MAC_MDIOSCCDR, CMD, 3); in xgbe_read_ext_mii_regs()
1327 XGMAC_SET_BITS(mdio_sccd, MAC_MDIOSCCDR, BUSY, 1); in xgbe_read_ext_mii_regs()
1594 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_get_rx_tstamp()
1604 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSCTRLSSR, 1); in xgbe_config_tstamp()
1607 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSCFUPDT, 1); in xgbe_config_tstamp()
1610 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TXTSSTSM, 1); in xgbe_config_tstamp()
1923 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
1925 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
1931 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, CONTEXT, 0); in xgbe_dev_read()
1935 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
1940 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
1947 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
1953 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
1976 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
1984 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
1986 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
1992 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
2000 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
2015 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
2028 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
2030 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
2034 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
2036 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
2040 XGMAC_SET_BITS(packet->errors, RX_PACKET_ERRORS, in xgbe_dev_read()
2071 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, TIE, 1); in xgbe_enable_int()
2074 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, TXSE, 1); in xgbe_enable_int()
2077 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, TBUE, 1); in xgbe_enable_int()
2080 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RIE, 1); in xgbe_enable_int()
2083 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RBUE, 1); in xgbe_enable_int()
2086 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RSE, 1); in xgbe_enable_int()
2089 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, TIE, 1); in xgbe_enable_int()
2090 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RIE, 1); in xgbe_enable_int()
2093 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, FBEE, 1); in xgbe_enable_int()
2112 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, TIE, 0); in xgbe_disable_int()
2115 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, TXSE, 0); in xgbe_disable_int()
2118 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, TBUE, 0); in xgbe_disable_int()
2121 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RIE, 0); in xgbe_disable_int()
2124 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RBUE, 0); in xgbe_disable_int()
2127 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RSE, 0); in xgbe_disable_int()
2130 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, TIE, 0); in xgbe_disable_int()
2131 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RIE, 0); in xgbe_disable_int()
2134 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, FBEE, 0); in xgbe_disable_int()
2216 XGMAC_SET_BITS(sbmr, DMA_SBMR, EAME, 1); in xgbe_config_dma_bus()
2219 XGMAC_SET_BITS(sbmr, DMA_SBMR, UNDEF, 1); in xgbe_config_dma_bus()
2220 XGMAC_SET_BITS(sbmr, DMA_SBMR, BLEN, pdata->blen >> 2); in xgbe_config_dma_bus()
2221 XGMAC_SET_BITS(sbmr, DMA_SBMR, AAL, pdata->aal); in xgbe_config_dma_bus()
2222 XGMAC_SET_BITS(sbmr, DMA_SBMR, RD_OSR_LMT, pdata->rd_osr_limit - 1); in xgbe_config_dma_bus()
2223 XGMAC_SET_BITS(sbmr, DMA_SBMR, WR_OSR_LMT, pdata->wr_osr_limit - 1); in xgbe_config_dma_bus()