Lines Matching refs:AM2150_MACE_BASE
192 #define AM2150_MACE_BASE 0x10 macro
491 data = inb(ioaddr + AM2150_MACE_BASE + reg); in mace_read()
496 data = inb(ioaddr + AM2150_MACE_BASE + (reg & 0x0F)); in mace_read()
518 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + reg); in mace_write()
523 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + (reg & 0x0F)); in mace_write()
808 outb(0xFF, ioaddr + AM2150_MACE_BASE + MACE_IMR); in mace_close()
870 ioaddr + AM2150_MACE_BASE + MACE_IMR); in mace_start_xmit()
903 outb(MACE_IMR_DEFAULT, ioaddr + AM2150_MACE_BASE + MACE_IMR); in mace_start_xmit()
939 inb(ioaddr + AM2150_MACE_BASE + MACE_IR), in mace_interrupt()
940 inb(ioaddr + AM2150_MACE_BASE + MACE_IMR)); in mace_interrupt()
952 status = inb(ioaddr + AM2150_MACE_BASE + MACE_IR); in mace_interrupt()
967 fifofc = inb(ioaddr + AM2150_MACE_BASE + MACE_FIFOFC); in mace_interrupt()
974 xmtrc = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTRC); in mace_interrupt()
979 (xmtfs = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTFS)) & in mace_interrupt()