133 	csrwr32(SGDMA_CTRLREG_RESET, priv->tx_dma_csr, sgdma_csroffs(control));  in sgdma_reset()
134 	csrwr32(0, priv->tx_dma_csr, sgdma_csroffs(control));  in sgdma_reset()
136 	csrwr32(SGDMA_CTRLREG_RESET, priv->rx_dma_csr, sgdma_csroffs(control));  in sgdma_reset()
137 	csrwr32(0, priv->rx_dma_csr, sgdma_csroffs(control));  in sgdma_reset()
273 			csrwr32(0, priv->rx_dma_csr, sgdma_csroffs(control));  in sgdma_rx_status()
275 			csrwr32(0xf, priv->rx_dma_csr, sgdma_csroffs(status));  in sgdma_rx_status()
326 	csrwr32(lower_32_bits(raddr), desc, sgdma_descroffs(raddr));  in sgdma_setup_descrip()
327 	csrwr32(lower_32_bits(waddr), desc, sgdma_descroffs(waddr));  in sgdma_setup_descrip()
329 	csrwr32(0, desc, sgdma_descroffs(pad1));  in sgdma_setup_descrip()
330 	csrwr32(0, desc, sgdma_descroffs(pad2));  in sgdma_setup_descrip()
331 	csrwr32(lower_32_bits(ndesc_phys), desc, sgdma_descroffs(next));  in sgdma_setup_descrip()
378 		csrwr32(lower_32_bits(sgdma_rxphysaddr(priv, cdesc)),  in sgdma_async_read()
382 		csrwr32((priv->rxctrlreg | SGDMA_CTRLREG_START),  in sgdma_async_read()
399 	csrwr32(0, priv->tx_dma_csr, sgdma_csroffs(control));  in sgdma_async_write()
400 	csrwr32(0x1f, priv->tx_dma_csr, sgdma_csroffs(status));  in sgdma_async_write()
405 	csrwr32(lower_32_bits(sgdma_txphysaddr(priv, desc)),  in sgdma_async_write()
409 	csrwr32((priv->txctrlreg | SGDMA_CTRLREG_START),  in sgdma_async_write()