275 	u32 (*read)(void __iomem *addr);  member
394 	reg = priv->read(&regs->mcr);  in flexcan_chip_enable()
398 	while (timeout-- && (priv->read(&regs->mcr) & FLEXCAN_MCR_LPM_ACK))  in flexcan_chip_enable()
401 	if (priv->read(&regs->mcr) & FLEXCAN_MCR_LPM_ACK)  in flexcan_chip_enable()
413 	reg = priv->read(&regs->mcr);  in flexcan_chip_disable()
417 	while (timeout-- && !(priv->read(&regs->mcr) & FLEXCAN_MCR_LPM_ACK))  in flexcan_chip_disable()
420 	if (!(priv->read(&regs->mcr) & FLEXCAN_MCR_LPM_ACK))  in flexcan_chip_disable()
432 	reg = priv->read(&regs->mcr);  in flexcan_chip_freeze()
436 	while (timeout-- && !(priv->read(&regs->mcr) & FLEXCAN_MCR_FRZ_ACK))  in flexcan_chip_freeze()
439 	if (!(priv->read(&regs->mcr) & FLEXCAN_MCR_FRZ_ACK))  in flexcan_chip_freeze()
451 	reg = priv->read(&regs->mcr);  in flexcan_chip_unfreeze()
455 	while (timeout-- && (priv->read(&regs->mcr) & FLEXCAN_MCR_FRZ_ACK))  in flexcan_chip_unfreeze()
458 	if (priv->read(&regs->mcr) & FLEXCAN_MCR_FRZ_ACK)  in flexcan_chip_unfreeze()
470 	while (timeout-- && (priv->read(&regs->mcr) & FLEXCAN_MCR_SOFTRST))  in flexcan_chip_softreset()
473 	if (priv->read(&regs->mcr) & FLEXCAN_MCR_SOFTRST)  in flexcan_chip_softreset()
484 	u32 reg = priv->read(&regs->ecr);  in __flexcan_get_berr_counter()
676 			reg_ctrl = priv->read(&mb->can_ctrl);  in flexcan_mailbox_read()
691 		reg_iflag1 = priv->read(&regs->iflag1);  in flexcan_mailbox_read()
695 		reg_ctrl = priv->read(&mb->can_ctrl);  in flexcan_mailbox_read()
701 	reg_id = priv->read(&mb->can_id);  in flexcan_mailbox_read()
711 	*(__be32 *)(cf->data + 0) = cpu_to_be32(priv->read(&mb->data[0]));  in flexcan_mailbox_read()
712 	*(__be32 *)(cf->data + 4) = cpu_to_be32(priv->read(&mb->data[1]));  in flexcan_mailbox_read()
723 		priv->read(&regs->timer);  in flexcan_mailbox_read()
735 	iflag2 = priv->read(&regs->iflag2) & priv->reg_imask2_default;  in flexcan_read_reg_iflag_rx()
736 	iflag1 = priv->read(&regs->iflag1) & priv->reg_imask1_default &  in flexcan_read_reg_iflag_rx()
752 	reg_iflag1 = priv->read(&regs->iflag1);  in flexcan_irq()
796 	reg_esr = priv->read(&regs->esr);  in flexcan_irq()
863 	reg = priv->read(&regs->ctrl);  in flexcan_set_bittiming()
891 		   priv->read(&regs->mcr), priv->read(&regs->ctrl));  in flexcan_set_bittiming()
930 	reg_mcr = priv->read(&regs->mcr);  in flexcan_chip_start()
957 	reg_ctrl = priv->read(&regs->ctrl);  in flexcan_chip_start()
980 		reg_ctrl2 = priv->read(&regs->ctrl2);  in flexcan_chip_start()
1028 		reg_ctrl2 = priv->read(&regs->ctrl2);  in flexcan_chip_start()
1032 		reg_mecr = priv->read(&regs->mecr);  in flexcan_chip_start()
1060 		   priv->read(&regs->mcr), priv->read(&regs->ctrl));  in flexcan_chip_start()
1203 	reg = priv->read(&regs->ctrl);  in register_flexcandev()
1212 	reg = priv->read(&regs->mcr);  in register_flexcandev()
1222 	reg = priv->read(&regs->mcr);  in register_flexcandev()
1338 		priv->read = flexcan_read_be;  in flexcan_probe()
1341 		priv->read = flexcan_read_le;  in flexcan_probe()