Lines Matching refs:cc770_write_reg
150 cc770_write_reg(priv, msgobj[mo].config, msgcfg); in enable_all_objs()
151 cc770_write_reg(priv, msgobj[mo].ctrl0, in enable_all_objs()
156 cc770_write_reg(priv, msgobj[mo].ctrl1, in enable_all_objs()
160 cc770_write_reg(priv, msgobj[mo].ctrl1, in enable_all_objs()
167 cc770_write_reg(priv, msgobj[mo].ctrl1, in enable_all_objs()
170 cc770_write_reg(priv, msgobj[mo].ctrl0, in enable_all_objs()
188 cc770_write_reg(priv, msgobj[mo].ctrl1, in disable_all_objs()
191 cc770_write_reg(priv, msgobj[mo].ctrl0, in disable_all_objs()
196 cc770_write_reg(priv, msgobj[mo].ctrl1, in disable_all_objs()
199 cc770_write_reg(priv, msgobj[mo].ctrl0, in disable_all_objs()
211 cc770_write_reg(priv, control, CTRL_CCE | CTRL_INI); in set_reset_mode()
219 cc770_write_reg(priv, status, 0); in set_reset_mode()
233 cc770_write_reg(priv, status, STAT_LEC_MASK); in set_normal_mode()
242 cc770_write_reg(priv, control, priv->control_normal_mode); in set_normal_mode()
252 cc770_write_reg(priv, control, (CTRL_CCE | CTRL_INI)); in chipset_init()
255 cc770_write_reg(priv, clkout, priv->clkout); in chipset_init()
258 cc770_write_reg(priv, cpu_interface, priv->cpu_interface); in chipset_init()
261 cc770_write_reg(priv, bus_config, priv->bus_config); in chipset_init()
267 cc770_write_reg(priv, status, 0); in chipset_init()
271 cc770_write_reg(priv, msgobj[mo].ctrl0, in chipset_init()
274 cc770_write_reg(priv, msgobj[mo].ctrl0, in chipset_init()
277 cc770_write_reg(priv, msgobj[mo].ctrl1, in chipset_init()
281 cc770_write_reg(priv, msgobj[mo].data[data], 0); in chipset_init()
283 cc770_write_reg(priv, msgobj[mo].id[id], 0); in chipset_init()
284 cc770_write_reg(priv, msgobj[mo].config, 0); in chipset_init()
288 cc770_write_reg(priv, global_mask_std[0], 0); in chipset_init()
289 cc770_write_reg(priv, global_mask_std[1], 0); in chipset_init()
290 cc770_write_reg(priv, global_mask_ext[0], 0); in chipset_init()
291 cc770_write_reg(priv, global_mask_ext[1], 0); in chipset_init()
292 cc770_write_reg(priv, global_mask_ext[2], 0); in chipset_init()
293 cc770_write_reg(priv, global_mask_ext[3], 0); in chipset_init()
302 cc770_write_reg(priv, control, CTRL_CCE | CTRL_EAF | CTRL_INI); in cc770_probe_chip()
304 cc770_write_reg(priv, cpu_interface, priv->cpu_interface); in cc770_probe_chip()
317 cc770_write_reg(priv, msgobj[1].data[1], 0x25); in cc770_probe_chip()
318 cc770_write_reg(priv, msgobj[2].data[3], 0x52); in cc770_probe_chip()
319 cc770_write_reg(priv, msgobj[10].data[6], 0xc3); in cc770_probe_chip()
376 cc770_write_reg(priv, bit_timing_0, btr0); in cc770_set_bittiming()
377 cc770_write_reg(priv, bit_timing_1, btr1); in cc770_set_bittiming()
405 cc770_write_reg(priv, msgobj[mo].ctrl0, in cc770_tx()
407 cc770_write_reg(priv, msgobj[mo].ctrl1, in cc770_tx()
412 cc770_write_reg(priv, msgobj[mo].config, in cc770_tx()
414 cc770_write_reg(priv, msgobj[mo].id[3], id << 3); in cc770_tx()
415 cc770_write_reg(priv, msgobj[mo].id[2], id >> 5); in cc770_tx()
416 cc770_write_reg(priv, msgobj[mo].id[1], id >> 13); in cc770_tx()
417 cc770_write_reg(priv, msgobj[mo].id[0], id >> 21); in cc770_tx()
420 cc770_write_reg(priv, msgobj[mo].config, (dlc << 4) | rtr); in cc770_tx()
421 cc770_write_reg(priv, msgobj[mo].id[0], id >> 3); in cc770_tx()
422 cc770_write_reg(priv, msgobj[mo].id[1], id << 5); in cc770_tx()
426 cc770_write_reg(priv, msgobj[mo].data[i], cf->data[i]); in cc770_tx()
428 cc770_write_reg(priv, msgobj[mo].ctrl1, in cc770_tx()
430 cc770_write_reg(priv, msgobj[mo].ctrl0, in cc770_tx()
529 cc770_write_reg(priv, control, CTRL_INI); in cc770_err()
596 cc770_write_reg(priv, status, STAT_LEC_MASK); in cc770_status_interrupt()
634 cc770_write_reg(priv, msgobj[mo].ctrl1, in cc770_rx_interrupt()
639 cc770_write_reg(priv, msgobj[mo].ctrl0, in cc770_rx_interrupt()
642 cc770_write_reg(priv, msgobj[mo].ctrl1, in cc770_rx_interrupt()
663 cc770_write_reg(priv, msgobj[mo].ctrl0, in cc770_rtr_interrupt()
666 cc770_write_reg(priv, msgobj[mo].ctrl1, in cc770_rtr_interrupt()
682 cc770_write_reg(priv, msgobj[mo].ctrl0, in cc770_tx_interrupt()
684 cc770_write_reg(priv, msgobj[mo].ctrl1, in cc770_tx_interrupt()