193 nandc_set_reg(nandc, NAND_READ_LOCATION_##reg,			\
655 static void nandc_set_reg(struct qcom_nand_controller *nandc, int offset,  in nandc_set_reg()  function
676 	nandc_set_reg(nandc, NAND_ADDR0, page << 16 | column);  in set_address()
677 	nandc_set_reg(nandc, NAND_ADDR1, page >> 16 & 0xff);  in set_address()
716 	nandc_set_reg(nandc, NAND_FLASH_CMD, cmd);  in update_rw_regs()
717 	nandc_set_reg(nandc, NAND_DEV0_CFG0, cfg0);  in update_rw_regs()
718 	nandc_set_reg(nandc, NAND_DEV0_CFG1, cfg1);  in update_rw_regs()
719 	nandc_set_reg(nandc, NAND_DEV0_ECC_CFG, ecc_bch_cfg);  in update_rw_regs()
720 	nandc_set_reg(nandc, NAND_EBI2_ECC_BUF_CFG, host->ecc_buf_cfg);  in update_rw_regs()
721 	nandc_set_reg(nandc, NAND_FLASH_STATUS, host->clrflashstatus);  in update_rw_regs()
722 	nandc_set_reg(nandc, NAND_READ_STATUS, host->clrreadstatus);  in update_rw_regs()
723 	nandc_set_reg(nandc, NAND_EXEC_CMD, 1);  in update_rw_regs()
1173 	nandc_set_reg(nandc, NAND_FLASH_CMD, PAGE_READ | PAGE_ACC | LAST_PAGE);  in nandc_param()
1174 	nandc_set_reg(nandc, NAND_ADDR0, 0);  in nandc_param()
1175 	nandc_set_reg(nandc, NAND_ADDR1, 0);  in nandc_param()
1176 	nandc_set_reg(nandc, NAND_DEV0_CFG0, 0 << CW_PER_PAGE  in nandc_param()
1180 	nandc_set_reg(nandc, NAND_DEV0_CFG1, 7 << NAND_RECOVERY_CYCLES  in nandc_param()
1187 	nandc_set_reg(nandc, NAND_EBI2_ECC_BUF_CFG, 1 << ECC_CFG_ECC_DISABLE);  in nandc_param()
1190 	nandc_set_reg(nandc, NAND_DEV_CMD_VLD,  in nandc_param()
1192 	nandc_set_reg(nandc, NAND_DEV_CMD1,  in nandc_param()
1196 	nandc_set_reg(nandc, NAND_EXEC_CMD, 1);  in nandc_param()
1198 	nandc_set_reg(nandc, NAND_DEV_CMD1_RESTORE, nandc->cmd1);  in nandc_param()
1199 	nandc_set_reg(nandc, NAND_DEV_CMD_VLD_RESTORE, nandc->vld);  in nandc_param()
1226 	nandc_set_reg(nandc, NAND_FLASH_CMD,  in erase_block()
1228 	nandc_set_reg(nandc, NAND_ADDR0, page_addr);  in erase_block()
1229 	nandc_set_reg(nandc, NAND_ADDR1, 0);  in erase_block()
1230 	nandc_set_reg(nandc, NAND_DEV0_CFG0,  in erase_block()
1232 	nandc_set_reg(nandc, NAND_DEV0_CFG1, host->cfg1_raw);  in erase_block()
1233 	nandc_set_reg(nandc, NAND_EXEC_CMD, 1);  in erase_block()
1234 	nandc_set_reg(nandc, NAND_FLASH_STATUS, host->clrflashstatus);  in erase_block()
1235 	nandc_set_reg(nandc, NAND_READ_STATUS, host->clrreadstatus);  in erase_block()
1258 	nandc_set_reg(nandc, NAND_FLASH_CMD, FETCH_ID);  in read_id()
1259 	nandc_set_reg(nandc, NAND_ADDR0, column);  in read_id()
1260 	nandc_set_reg(nandc, NAND_ADDR1, 0);  in read_id()
1261 	nandc_set_reg(nandc, NAND_FLASH_CHIP_SELECT,  in read_id()
1263 	nandc_set_reg(nandc, NAND_EXEC_CMD, 1);  in read_id()
1279 	nandc_set_reg(nandc, NAND_FLASH_CMD, RESET_DEVICE);  in reset()
1280 	nandc_set_reg(nandc, NAND_EXEC_CMD, 1);  in reset()