217 	u32 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_set_sd_power()  local
220 		reg_tmp &= ~BM_SD_OFF;  in wmt_set_sd_power()
222 		reg_tmp |= BM_SD_OFF;  in wmt_set_sd_power()
224 	writeb(reg_tmp, priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_set_sd_power()
252 	u32 reg_tmp;  in wmt_mci_start_command()  local
254 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_start_command()
255 	writeb(reg_tmp | CTLR_CMD_START, priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_start_command()
262 	u32 reg_tmp;  in wmt_mci_send_command()  local
272 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_send_command()
273 	writeb(reg_tmp | CTLR_FIFO_RESET, priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_send_command()
285 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_send_command()
286 	writeb((reg_tmp & 0x0F) | (cmdtype << 4),  in wmt_mci_send_command()
380 	u32 reg_tmp;  in wmt_mci_regular_isr()  local
390 	reg_tmp = readb(priv->sdmmc_base + SDMMC_INTMASK0);  in wmt_mci_regular_isr()
391 	if ((reg_tmp & INT0_DI_INT_EN) && (status0 & STS0_DEVICE_INS)) {  in wmt_mci_regular_isr()
469 	u32 reg_tmp;  in wmt_reset_hardware()  local
474 	reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_reset_hardware()
475 	writeb(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_reset_hardware()
478 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_reset_hardware()
479 	writeb(reg_tmp | CTLR_FIFO_RESET, priv->sdmmc_base + SDMMC_CTLR);  in wmt_reset_hardware()
498 	reg_tmp = readb(priv->sdmmc_base + SDMMC_STS2);  in wmt_reset_hardware()
499 	writeb(reg_tmp | STS2_DIS_FORCECLK, priv->sdmmc_base + SDMMC_STS2);  in wmt_reset_hardware()
532 	u32 reg_tmp;  in wmt_dma_config()  local
545 		reg_tmp = readl(priv->sdmmc_base + SDDMA_CCR);  in wmt_dma_config()
546 		writel(reg_tmp & DMA_CCR_IF_TO_PERIPHERAL, priv->sdmmc_base +  in wmt_dma_config()
549 		reg_tmp = readl(priv->sdmmc_base + SDDMA_CCR);  in wmt_dma_config()
550 		writel(reg_tmp | DMA_CCR_PERIPHERAL_TO_IF, priv->sdmmc_base +  in wmt_dma_config()
557 	u32 reg_tmp;  in wmt_dma_start()  local
559 	reg_tmp = readl(priv->sdmmc_base + SDDMA_CCR);  in wmt_dma_start()
560 	writel(reg_tmp | DMA_CCR_RUN, priv->sdmmc_base + SDDMA_CCR);  in wmt_dma_start()
571 	u32 reg_tmp;  in wmt_mci_request()  local
614 		reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN);  in wmt_mci_request()
615 		writew((reg_tmp & 0xF800) | (req->data->blksz - 1),  in wmt_mci_request()
890 	u32 reg_tmp;  in wmt_mci_remove()  local
896 	reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_remove()
897 	writel(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_remove()
898 	reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN);  in wmt_mci_remove()
899 	writew(reg_tmp & ~(0xA000), priv->sdmmc_base + SDMMC_BLKLEN);  in wmt_mci_remove()
930 	u32 reg_tmp;  in wmt_mci_suspend()  local
938 	reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_suspend()
939 	writeb(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base +  in wmt_mci_suspend()
942 	reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN);  in wmt_mci_suspend()
943 	writew(reg_tmp & 0x5FFF, priv->sdmmc_base + SDMMC_BLKLEN);  in wmt_mci_suspend()
954 	u32 reg_tmp;  in wmt_mci_resume()  local
962 		reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_resume()
963 		writeb(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base +  in wmt_mci_resume()
966 		reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN);  in wmt_mci_resume()
967 		writew(reg_tmp | (BLKL_GPI_CD | BLKL_INT_ENABLE),  in wmt_mci_resume()
970 		reg_tmp = readb(priv->sdmmc_base + SDMMC_INTMASK0);  in wmt_mci_resume()
971 		writeb(reg_tmp | INT0_DI_INT_EN, priv->sdmmc_base +  in wmt_mci_resume()