82 #define mmc_readl(host, reg) \  macro
312 		rval = mmc_readl(host, REG_GCTRL);  in sunxi_mmc_reset_host()
349 	rval = mmc_readl(host, REG_GCTRL);  in sunxi_mmc_init_host()
426 	rval = mmc_readl(host, REG_GCTRL);  in sunxi_mmc_start_dma()
463 		ri = mmc_readl(host, REG_RINTR);  in sunxi_mmc_send_manual_stop()
473 			req->stop->resp[0] = mmc_readl(host, REG_RESP0);  in sunxi_mmc_send_manual_stop()
529 			mrq->cmd->resp[0] = mmc_readl(host, REG_RESP3);  in sunxi_mmc_finalize_request()
530 			mrq->cmd->resp[1] = mmc_readl(host, REG_RESP2);  in sunxi_mmc_finalize_request()
531 			mrq->cmd->resp[2] = mmc_readl(host, REG_RESP1);  in sunxi_mmc_finalize_request()
532 			mrq->cmd->resp[3] = mmc_readl(host, REG_RESP0);  in sunxi_mmc_finalize_request()
534 			mrq->cmd->resp[0] = mmc_readl(host, REG_RESP0);  in sunxi_mmc_finalize_request()
544 		rval = mmc_readl(host, REG_GCTRL);  in sunxi_mmc_finalize_request()
575 	idma_int  = mmc_readl(host, REG_IDST);  in sunxi_mmc_irq()
576 	msk_int   = mmc_readl(host, REG_MISTA);  in sunxi_mmc_irq()
665 	rval = mmc_readl(host, REG_CLKCR);  in sunxi_mmc_oclk_onoff()
679 		rval = mmc_readl(host, REG_CMDR);  in sunxi_mmc_oclk_onoff()
684 		   mmc_readl(host, REG_RINTR) & ~SDXC_SDIO_INTERRUPT);  in sunxi_mmc_oclk_onoff()
692 		rval = mmc_readl(host, REG_CLKCR);  in sunxi_mmc_oclk_onoff()
817 	rval = mmc_readl(host, REG_CLKCR);  in sunxi_mmc_clk_set_rate()
827 		rval = mmc_readl(host, REG_SD_NTSR);  in sunxi_mmc_clk_set_rate()
880 	rval = mmc_readl(host, REG_GCTRL);  in sunxi_mmc_set_clk()
971 	imask = mmc_readl(host, REG_IMASK);  in sunxi_mmc_enable_sdio_irq()
1095 	return !!(mmc_readl(host, REG_STAS) & SDXC_CARD_DATA_BUSY);  in sunxi_mmc_card_busy()