468 	u32 new_val = 0;  in esdhc_writew_le()  local
472 		new_val = readl(host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_writew_le()
474 			new_val |= ESDHC_VENDOR_SPEC_FRC_SDCLK_ON;  in esdhc_writew_le()
476 			new_val &= ~ESDHC_VENDOR_SPEC_FRC_SDCLK_ON;  in esdhc_writew_le()
477 		writel(new_val, host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_writew_le()
480 		new_val = readl(host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_writew_le()
482 			new_val |= ESDHC_VENDOR_SPEC_VSELECT;  in esdhc_writew_le()
484 			new_val &= ~ESDHC_VENDOR_SPEC_VSELECT;  in esdhc_writew_le()
485 		writel(new_val, host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_writew_le()
487 			new_val = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_writew_le()
489 				new_val |= ESDHC_MIX_CTRL_SMPCLK_SEL;  in esdhc_writew_le()
490 				new_val |= ESDHC_MIX_CTRL_AUTO_TUNE_EN;  in esdhc_writew_le()
492 				new_val &= ~ESDHC_MIX_CTRL_SMPCLK_SEL;  in esdhc_writew_le()
493 				new_val &= ~ESDHC_MIX_CTRL_AUTO_TUNE_EN;  in esdhc_writew_le()
495 			writel(new_val , host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_writew_le()
608 	u32 new_val = 0;  in esdhc_writeb_le()  local
620 		new_val = val & SDHCI_CTRL_LED;  in esdhc_writeb_le()
622 		new_val |= ESDHC_HOST_CONTROL_LE;  in esdhc_writeb_le()
626 			new_val |= (val & SDHCI_CTRL_DMA_MASK) << 5;  in esdhc_writeb_le()
637 		esdhc_clrset_le(host, mask, new_val, reg);  in esdhc_writeb_le()
641 			new_val = readl(host->ioaddr + SDHCI_HOST_CONTROL);  in esdhc_writeb_le()
666 				new_val = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_writeb_le()
667 				writel(new_val & ESDHC_MIX_CTRL_TUNING_MASK,  in esdhc_writeb_le()
677 			esdhc_clrset_le(host, 0xff, new_val,  in esdhc_writeb_le()