Lines Matching refs:WRITE_REG_CMD
109 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CMD0, 0xFF, in sd_cmd_set_sd_cmd()
116 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, blocks); in sd_cmd_set_data_len()
117 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, blocks >> 8); in sd_cmd_set_data_len()
118 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, blksz); in sd_cmd_set_data_len()
119 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BYTE_CNT_H, 0xFF, blksz >> 8); in sd_cmd_set_data_len()
258 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, rsp_type); in sd_send_cmd_get_rsp()
259 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE, in sd_send_cmd_get_rsp()
261 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER, in sd_send_cmd_get_rsp()
360 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, in sd_read_data()
364 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in sd_read_data()
367 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER, in sd_read_data()
420 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, in sd_write_data()
423 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER, 0xFF, in sd_write_data()
466 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, IRQSTAT0, in sd_read_long_data()
468 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC3, in sd_read_long_data()
470 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC2, in sd_read_long_data()
472 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC1, in sd_read_long_data()
474 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC0, 0xFF, (u8)data_len); in sd_read_long_data()
475 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMACTL, in sd_read_long_data()
478 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE, in sd_read_long_data()
480 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2 | resp_type); in sd_read_long_data()
481 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER, 0xFF, in sd_read_long_data()
525 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, IRQSTAT0, in sd_write_long_data()
527 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC3, in sd_write_long_data()
529 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC2, in sd_write_long_data()
531 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC1, in sd_write_long_data()
533 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC0, 0xFF, (u8)data_len); in sd_write_long_data()
534 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMACTL, in sd_write_long_data()
537 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE, in sd_write_long_data()
539 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2); in sd_write_long_data()
540 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER, 0xFF, in sd_write_long_data()
913 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_SELECT, 0x07, SD_MOD_SEL); in sd_power_on()
914 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_SHARE_MODE, in sd_power_on()
916 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_EN, in sd_power_on()
947 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_EN, SD_CLK_EN, 0); in sd_power_off()
948 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_OE, SD_OUTPUT_EN, 0); in sd_power_off()
984 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG1, in sd_set_timing()
987 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in sd_set_timing()
989 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF, in sd_set_timing()
991 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0); in sd_set_timing()
996 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG1, in sd_set_timing()
999 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in sd_set_timing()
1001 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF, in sd_set_timing()
1003 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0); in sd_set_timing()
1004 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_PUSH_POINT_CTL, in sd_set_timing()
1006 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL, in sd_set_timing()
1013 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG1, in sd_set_timing()
1015 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in sd_set_timing()
1017 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF, in sd_set_timing()
1019 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0); in sd_set_timing()
1020 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_PUSH_POINT_CTL, in sd_set_timing()
1022 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL, in sd_set_timing()
1027 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in sd_set_timing()
1029 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in sd_set_timing()
1031 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF, in sd_set_timing()
1033 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0); in sd_set_timing()
1034 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in sd_set_timing()
1036 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL, in sd_set_timing()