Lines Matching refs:src_clk_freq
392 u32 src_clk_freq; /* source clock frequency */ member
705 if (hz >= (host->src_clk_freq >> 2)) { in msdc_set_mclk()
707 sclk = host->src_clk_freq >> 2; /* sclk = clk / 4 */ in msdc_set_mclk()
709 div = (host->src_clk_freq + ((hz << 2) - 1)) / (hz << 2); in msdc_set_mclk()
710 sclk = (host->src_clk_freq >> 2) / div; in msdc_set_mclk()
715 hz >= (host->src_clk_freq >> 1)) { in msdc_set_mclk()
722 sclk = host->src_clk_freq >> 1; in msdc_set_mclk()
725 } else if (hz >= host->src_clk_freq) { in msdc_set_mclk()
728 sclk = host->src_clk_freq; in msdc_set_mclk()
731 if (hz >= (host->src_clk_freq >> 1)) { in msdc_set_mclk()
733 sclk = host->src_clk_freq >> 1; /* sclk = clk / 2 */ in msdc_set_mclk()
735 div = (host->src_clk_freq + ((hz << 2) - 1)) / (hz << 2); in msdc_set_mclk()
736 sclk = (host->src_clk_freq >> 2) / div; in msdc_set_mclk()
1940 host->src_clk_freq = clk_get_rate(host->src_clk); in msdc_drv_probe()
1944 mmc->f_min = DIV_ROUND_UP(host->src_clk_freq, 4 * 255); in msdc_drv_probe()
1946 mmc->f_min = DIV_ROUND_UP(host->src_clk_freq, 4 * 4095); in msdc_drv_probe()