219 	mci_writel(host, CTRL, ctrl);  in dw_mci_ctrl_reset()
261 	mci_writel(host, CMDARG, arg);  in mci_send_cmd()
264 	mci_writel(host, CMD, SDMMC_CMD_START | cmd);  in mci_send_cmd()
315 		mci_writel(host, CLKENA, clk_en_a);  in dw_mci_prepare_command()
427 	mci_writel(host, CMDARG, cmd->arg);  in dw_mci_start_command()
431 	mci_writel(host, CMD, cmd_flags | SDMMC_CMD_START);  in dw_mci_start_command()
475 	mci_writel(host, BMOD, bmod);  in dw_mci_idmac_reset()
486 	mci_writel(host, CTRL, temp);  in dw_mci_idmac_stop_dma()
492 	mci_writel(host, BMOD, temp);  in dw_mci_idmac_stop_dma()
579 		mci_writel(host, IDSTS64, IDMAC_INT_CLR);  in dw_mci_idmac_init()
580 		mci_writel(host, IDINTEN64, SDMMC_IDMAC_INT_NI |  in dw_mci_idmac_init()
584 		mci_writel(host, DBADDRL, host->sg_dma & 0xffffffff);  in dw_mci_idmac_init()
585 		mci_writel(host, DBADDRU, (u64)host->sg_dma >> 32);  in dw_mci_idmac_init()
589 		mci_writel(host, IDSTS, IDMAC_INT_CLR);  in dw_mci_idmac_init()
590 		mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI |  in dw_mci_idmac_init()
594 		mci_writel(host, DBADDR, host->sg_dma);  in dw_mci_idmac_init()
768 	mci_writel(host, CTRL, temp);  in dw_mci_idmac_start_dma()
776 	mci_writel(host, BMOD, temp);  in dw_mci_idmac_start_dma()
779 	mci_writel(host, PLDMND, 1);  in dw_mci_idmac_start_dma()
1045 	mci_writel(host, FIFOTH, fifoth_val);  in dw_mci_adjust_fifoth()
1093 	mci_writel(host, CDTHRCTL, SDMMC_SET_THLD(thld_size, enable));  in dw_mci_ctrl_thld()
1097 	mci_writel(host, CDTHRCTL, 0);  in dw_mci_ctrl_thld()
1138 	mci_writel(host, CTRL, temp);  in dw_mci_submit_data_dma()
1144 	mci_writel(host, INTMASK, temp);  in dw_mci_submit_data_dma()
1189 		mci_writel(host, RINTSTS, SDMMC_INT_TXDR | SDMMC_INT_RXDR);  in dw_mci_submit_data()
1194 		mci_writel(host, INTMASK, temp);  in dw_mci_submit_data()
1199 		mci_writel(host, CTRL, temp);  in dw_mci_submit_data()
1210 			mci_writel(host, FIFOTH, host->fifoth_val);  in dw_mci_submit_data()
1237 		mci_writel(host, CLKENA, 0);  in dw_mci_setup_bus()
1271 		mci_writel(host, CLKENA, 0);  in dw_mci_setup_bus()
1272 		mci_writel(host, CLKSRC, 0);  in dw_mci_setup_bus()
1278 		mci_writel(host, CLKDIV, div);  in dw_mci_setup_bus()
1287 		mci_writel(host, CLKENA, clk_en_a);  in dw_mci_setup_bus()
1301 	mci_writel(host, CTYPE, (slot->ctype << slot->id));  in dw_mci_setup_bus()
1324 		mci_writel(host, TMOUT, 0xFFFFFFFF);  in __dw_mci_start_request()
1325 		mci_writel(host, BYTCNT, data->blksz*data->blocks);  in __dw_mci_start_request()
1326 		mci_writel(host, BLKSIZ, data->blksz);  in __dw_mci_start_request()
1458 	mci_writel(slot->host, UHS_REG, regs);  in dw_mci_set_ios()
1485 		mci_writel(slot->host, PWREN, regs);  in dw_mci_set_ios()
1524 		mci_writel(slot->host, PWREN, regs);  in dw_mci_set_ios()
1581 	mci_writel(host, UHS_REG, uhs);  in dw_mci_switch_voltage()
1626 	mci_writel(host, RST_N, reset);  in dw_mci_hw_reset()
1629 	mci_writel(host, RST_N, reset);  in dw_mci_hw_reset()
1660 			mci_writel(host, CLKENA, clk_en_a);  in dw_mci_init_card()
1681 	mci_writel(host, INTMASK, int_mask);  in __dw_mci_enable_sdio_irq()
1755 		mci_writel(host, RINTSTS, 0xFFFFFFFF);  in dw_mci_reset()
2544 		mci_writel(host, RINTSTS, SDMMC_INT_RXDR);  in dw_mci_read_data_pio()
2600 		mci_writel(host, RINTSTS, SDMMC_INT_TXDR);  in dw_mci_write_data_pio()
2654 			mci_writel(host, RINTSTS, SDMMC_INT_VOLT_SWITCH);  in dw_mci_interrupt()
2672 			mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS);  in dw_mci_interrupt()
2682 			mci_writel(host, RINTSTS, DW_MCI_DATA_ERROR_FLAGS);  in dw_mci_interrupt()
2694 			mci_writel(host, RINTSTS, SDMMC_INT_DATA_OVER);  in dw_mci_interrupt()
2709 			mci_writel(host, RINTSTS, SDMMC_INT_RXDR);  in dw_mci_interrupt()
2715 			mci_writel(host, RINTSTS, SDMMC_INT_TXDR);  in dw_mci_interrupt()
2723 			mci_writel(host, RINTSTS, SDMMC_INT_CMD_DONE);  in dw_mci_interrupt()
2730 			mci_writel(host, RINTSTS, SDMMC_INT_CD);  in dw_mci_interrupt()
2735 			mci_writel(host, RINTSTS,  in dw_mci_interrupt()
2750 			mci_writel(host, IDSTS64, SDMMC_IDMAC_INT_TI |  in dw_mci_interrupt()
2752 			mci_writel(host, IDSTS64, SDMMC_IDMAC_INT_NI);  in dw_mci_interrupt()
2759 			mci_writel(host, IDSTS, SDMMC_IDMAC_INT_TI |  in dw_mci_interrupt()
2761 			mci_writel(host, IDSTS, SDMMC_IDMAC_INT_NI);  in dw_mci_interrupt()
3183 		mci_writel(host, INTMASK, temp);  in dw_mci_enable_cd()
3302 	mci_writel(host, RINTSTS, 0xFFFFFFFF);  in dw_mci_probe()
3303 	mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */  in dw_mci_probe()
3306 	mci_writel(host, TMOUT, 0xFFFFFFFF);  in dw_mci_probe()
3327 	mci_writel(host, FIFOTH, host->fifoth_val);  in dw_mci_probe()
3330 	mci_writel(host, CLKENA, 0);  in dw_mci_probe()
3331 	mci_writel(host, CLKSRC, 0);  in dw_mci_probe()
3357 	mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER |  in dw_mci_probe()
3361 	mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE);  in dw_mci_probe()
3402 	mci_writel(host, RINTSTS, 0xFFFFFFFF);  in dw_mci_remove()
3403 	mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */  in dw_mci_remove()
3406 	mci_writel(host, CLKENA, 0);  in dw_mci_remove()
3407 	mci_writel(host, CLKSRC, 0);  in dw_mci_remove()
3471 	 mci_writel(host, FIFOTH, host->fifoth_val);  in dw_mci_runtime_resume()
3475 	mci_writel(host, TMOUT, 0xFFFFFFFF);  in dw_mci_runtime_resume()
3477 	mci_writel(host, RINTSTS, 0xFFFFFFFF);  in dw_mci_runtime_resume()
3478 	mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER |  in dw_mci_runtime_resume()
3481 	mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE);  in dw_mci_runtime_resume()