Lines Matching refs:rtsx_pci_add_cmd
67 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_CLK_DRIVE_SEL, in rts5260_fill_driving()
69 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_CMD_DRIVE_SEL, in rts5260_fill_driving()
71 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DAT_DRIVE_SEL, in rts5260_fill_driving()
211 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_CONFIG2, in rts5260_card_power_on()
218 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_VCC_CFG0, in rts5260_card_power_on()
220 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_VCC_CFG1, in rts5260_card_power_on()
222 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_CONFIG2, in rts5260_card_power_on()
309 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_VCC_CFG1, in rts5260_card_power_off()
311 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_CONFIG2, in rts5260_card_power_off()
460 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, L1SUB_CONFIG1, in rts5260_init_hw()
463 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, L1SUB_CONFIG3, 0xFF, 0x00); in rts5260_init_hw()
464 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PM_CLK_FORCE_CTL, in rts5260_init_hw()
466 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWD_SUSPEND_EN, 0xFF, 0xFF); in rts5260_init_hw()
467 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL, in rts5260_init_hw()
469 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, REG_VREF, in rts5260_init_hw()
471 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RBCTL, in rts5260_init_hw()
475 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB0, 0xB0); in rts5260_init_hw()
477 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB0, 0x80); in rts5260_init_hw()
479 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OBFF_CFG, in rts5260_init_hw()
614 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, in rts5260_extra_init_hw()
617 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, in rts5260_extra_init_hw()