60 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_CLK_DRIVE_SEL,  in rts5249_fill_driving()
62 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_CMD_DRIVE_SEL,  in rts5249_fill_driving()
64 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DAT_DRIVE_SEL,  in rts5249_fill_driving()
167 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, L1SUB_CONFIG3, 0xFF, 0x00);  in rts5249_extra_init_hw()
169 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02);  in rts5249_extra_init_hw()
171 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0);  in rts5249_extra_init_hw()
173 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x00);  in rts5249_extra_init_hw()
174 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x01);  in rts5249_extra_init_hw()
176 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OLT_LED_CTL, 0x0F, 0x02);  in rts5249_extra_init_hw()
180 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB0, 0xB0);  in rts5249_extra_init_hw()
182 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB0, 0x80);  in rts5249_extra_init_hw()
189 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG,  in rts5249_extra_init_hw()
192 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG,  in rts5249_extra_init_hw()
289 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,  in rtsx_base_card_power_on()
291 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,  in rtsx_base_card_power_on()
300 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,  in rtsx_base_card_power_on()
302 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,  in rtsx_base_card_power_on()
310 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,  in rtsx_base_card_power_off()
312 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,  in rtsx_base_card_power_off()