29 static u8 rts5227_get_ic_version(struct rtsx_pcr *pcr)  in rts5227_get_ic_version()  argument
33 	rtsx_pci_read_register(pcr, DUMMY_REG_RESET_0, &val);  in rts5227_get_ic_version()
37 static void rts5227_fill_driving(struct rtsx_pcr *pcr, u8 voltage)  in rts5227_fill_driving()  argument
55 		drive_sel = pcr->sd30_drive_sel_3v3;  in rts5227_fill_driving()
58 		drive_sel = pcr->sd30_drive_sel_1v8;  in rts5227_fill_driving()
61 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_CLK_DRIVE_SEL,  in rts5227_fill_driving()
63 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_CMD_DRIVE_SEL,  in rts5227_fill_driving()
65 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DAT_DRIVE_SEL,  in rts5227_fill_driving()
69 static void rts5227_fetch_vendor_settings(struct rtsx_pcr *pcr)  in rts5227_fetch_vendor_settings()  argument
73 	rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg);  in rts5227_fetch_vendor_settings()
74 	pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);  in rts5227_fetch_vendor_settings()
79 	pcr->aspm_en = rtsx_reg_to_aspm(reg);  in rts5227_fetch_vendor_settings()
80 	pcr->sd30_drive_sel_1v8 = rtsx_reg_to_sd30_drive_sel_1v8(reg);  in rts5227_fetch_vendor_settings()
81 	pcr->card_drive_sel &= 0x3F;  in rts5227_fetch_vendor_settings()
82 	pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg);  in rts5227_fetch_vendor_settings()
84 	rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg);  in rts5227_fetch_vendor_settings()
85 	pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);  in rts5227_fetch_vendor_settings()
86 	pcr->sd30_drive_sel_3v3 = rtsx_reg_to_sd30_drive_sel_3v3(reg);  in rts5227_fetch_vendor_settings()
88 		pcr->flags |= PCR_REVERSE_SOCKET;  in rts5227_fetch_vendor_settings()
91 static void rts5227_force_power_down(struct rtsx_pcr *pcr, u8 pm_state)  in rts5227_force_power_down()  argument
94 	rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 1, 0xFF, 0);  in rts5227_force_power_down()
95 	rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 2, 0xFF, 0);  in rts5227_force_power_down()
96 	rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 3, 0x01, 0);  in rts5227_force_power_down()
99 		rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x10, 0x10);  in rts5227_force_power_down()
101 	rtsx_pci_write_register(pcr, FPDCTL, 0x03, 0x03);  in rts5227_force_power_down()
104 static int rts5227_extra_init_hw(struct rtsx_pcr *pcr)  in rts5227_extra_init_hw()  argument
108 	rtsx_pci_init_cmd(pcr);  in rts5227_extra_init_hw()
111 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02);  in rts5227_extra_init_hw()
113 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0);  in rts5227_extra_init_hw()
115 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x00);  in rts5227_extra_init_hw()
116 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x01);  in rts5227_extra_init_hw()
118 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OLT_LED_CTL, 0x0F, 0x02);  in rts5227_extra_init_hw()
120 	pcie_capability_read_word(pcr->pci, PCI_EXP_DEVCTL2, &cap);  in rts5227_extra_init_hw()
122 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LTR_CTL, 0xFF, 0xA3);  in rts5227_extra_init_hw()
124 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OBFF_CFG, 0x03, 0x03);  in rts5227_extra_init_hw()
126 	rts5227_fill_driving(pcr, OUTPUT_3V3);  in rts5227_extra_init_hw()
128 	if (pcr->flags & PCR_REVERSE_SOCKET)  in rts5227_extra_init_hw()
129 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB8, 0xB8);  in rts5227_extra_init_hw()
131 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB8, 0x88);  in rts5227_extra_init_hw()
132 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, pcr->reg_pm_ctrl3, 0x10, 0x00);  in rts5227_extra_init_hw()
134 	return rtsx_pci_send_cmd(pcr, 100);  in rts5227_extra_init_hw()
137 static int rts5227_optimize_phy(struct rtsx_pcr *pcr)  in rts5227_optimize_phy()  argument
141 	err = rtsx_pci_write_register(pcr, PM_CTRL3, D3_DELINK_MODE_EN, 0x00);  in rts5227_optimize_phy()
146 	return rtsx_pci_write_phy_register(pcr, 0x00, 0xBA42);  in rts5227_optimize_phy()
149 static int rts5227_turn_on_led(struct rtsx_pcr *pcr)  in rts5227_turn_on_led()  argument
151 	return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x02);  in rts5227_turn_on_led()
154 static int rts5227_turn_off_led(struct rtsx_pcr *pcr)  in rts5227_turn_off_led()  argument
156 	return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x00);  in rts5227_turn_off_led()
159 static int rts5227_enable_auto_blink(struct rtsx_pcr *pcr)  in rts5227_enable_auto_blink()  argument
161 	return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x08);  in rts5227_enable_auto_blink()
164 static int rts5227_disable_auto_blink(struct rtsx_pcr *pcr)  in rts5227_disable_auto_blink()  argument
166 	return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x00);  in rts5227_disable_auto_blink()
169 static int rts5227_card_power_on(struct rtsx_pcr *pcr, int card)  in rts5227_card_power_on()  argument
173 	rtsx_pci_init_cmd(pcr);  in rts5227_card_power_on()
174 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,  in rts5227_card_power_on()
176 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,  in rts5227_card_power_on()
178 	err = rtsx_pci_send_cmd(pcr, 100);  in rts5227_card_power_on()
185 	rtsx_pci_init_cmd(pcr);  in rts5227_card_power_on()
186 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,  in rts5227_card_power_on()
188 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,  in rts5227_card_power_on()
190 	return rtsx_pci_send_cmd(pcr, 100);  in rts5227_card_power_on()
193 static int rts5227_card_power_off(struct rtsx_pcr *pcr, int card)  in rts5227_card_power_off()  argument
195 	rtsx_pci_init_cmd(pcr);  in rts5227_card_power_off()
196 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,  in rts5227_card_power_off()
199 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,  in rts5227_card_power_off()
201 	return rtsx_pci_send_cmd(pcr, 100);  in rts5227_card_power_off()
204 static int rts5227_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)  in rts5227_switch_output_voltage()  argument
209 		err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4FC0 | 0x24);  in rts5227_switch_output_voltage()
213 		err = rtsx_pci_write_phy_register(pcr, 0x11, 0x3C02);  in rts5227_switch_output_voltage()
216 		err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4C80 | 0x24);  in rts5227_switch_output_voltage()
224 	rtsx_pci_init_cmd(pcr);  in rts5227_switch_output_voltage()
225 	rts5227_fill_driving(pcr, voltage);  in rts5227_switch_output_voltage()
226 	return rtsx_pci_send_cmd(pcr, 100);  in rts5227_switch_output_voltage()
291 void rts5227_init_params(struct rtsx_pcr *pcr)  in rts5227_init_params()  argument
293 	pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104;  in rts5227_init_params()
294 	pcr->num_slots = 2;  in rts5227_init_params()
295 	pcr->ops = &rts5227_pcr_ops;  in rts5227_init_params()
297 	pcr->flags = 0;  in rts5227_init_params()
298 	pcr->card_drive_sel = RTSX_CARD_DRIVE_DEFAULT;  in rts5227_init_params()
299 	pcr->sd30_drive_sel_1v8 = CFG_DRIVER_TYPE_B;  in rts5227_init_params()
300 	pcr->sd30_drive_sel_3v3 = CFG_DRIVER_TYPE_B;  in rts5227_init_params()
301 	pcr->aspm_en = ASPM_L1_EN;  in rts5227_init_params()
302 	pcr->tx_initial_phase = SET_CLOCK_PHASE(27, 27, 15);  in rts5227_init_params()
303 	pcr->rx_initial_phase = SET_CLOCK_PHASE(30, 7, 7);  in rts5227_init_params()
305 	pcr->ic_version = rts5227_get_ic_version(pcr);  in rts5227_init_params()
306 	pcr->sd_pull_ctl_enable_tbl = rts5227_sd_pull_ctl_enable_tbl;  in rts5227_init_params()
307 	pcr->sd_pull_ctl_disable_tbl = rts5227_sd_pull_ctl_disable_tbl;  in rts5227_init_params()
308 	pcr->ms_pull_ctl_enable_tbl = rts5227_ms_pull_ctl_enable_tbl;  in rts5227_init_params()
309 	pcr->ms_pull_ctl_disable_tbl = rts5227_ms_pull_ctl_disable_tbl;  in rts5227_init_params()
311 	pcr->reg_pm_ctrl3 = PM_CTRL3;  in rts5227_init_params()
314 static int rts522a_optimize_phy(struct rtsx_pcr *pcr)  in rts522a_optimize_phy()  argument
318 	err = rtsx_pci_write_register(pcr, RTS522A_PM_CTRL3, D3_DELINK_MODE_EN,  in rts522a_optimize_phy()
323 	if (is_version(pcr, 0x522A, IC_VER_A)) {  in rts522a_optimize_phy()
324 		err = rtsx_pci_write_phy_register(pcr, PHY_RCR2,  in rts522a_optimize_phy()
329 		rtsx_pci_write_phy_register(pcr, PHY_RCR1, PHY_RCR1_INIT_27S);  in rts522a_optimize_phy()
330 		rtsx_pci_write_phy_register(pcr, PHY_FLD0, PHY_FLD0_INIT_27S);  in rts522a_optimize_phy()
331 		rtsx_pci_write_phy_register(pcr, PHY_FLD3, PHY_FLD3_INIT_27S);  in rts522a_optimize_phy()
332 		rtsx_pci_write_phy_register(pcr, PHY_FLD4, PHY_FLD4_INIT_27S);  in rts522a_optimize_phy()
338 static int rts522a_extra_init_hw(struct rtsx_pcr *pcr)  in rts522a_extra_init_hw()  argument
340 	rts5227_extra_init_hw(pcr);  in rts522a_extra_init_hw()
342 	rtsx_pci_write_register(pcr, FUNC_FORCE_CTL, FUNC_FORCE_UPME_XMT_DBG,  in rts522a_extra_init_hw()
344 	rtsx_pci_write_register(pcr, PCLK_CTL, 0x04, 0x04);  in rts522a_extra_init_hw()
345 	rtsx_pci_write_register(pcr, PM_EVENT_DEBUG, PME_DEBUG_0, PME_DEBUG_0);  in rts522a_extra_init_hw()
346 	rtsx_pci_write_register(pcr, PM_CLK_FORCE_CTL, 0xFF, 0x11);  in rts522a_extra_init_hw()
369 void rts522a_init_params(struct rtsx_pcr *pcr)  in rts522a_init_params()  argument
371 	rts5227_init_params(pcr);  in rts522a_init_params()
373 	pcr->reg_pm_ctrl3 = RTS522A_PM_CTRL3;  in rts522a_init_params()