263 	writel_relaxed(bits & ~clr_bits, vfe->base + reg);  in vfe_reg_clr()
270 	writel_relaxed(bits | set_bits, vfe->base + reg);  in vfe_reg_set()
286 	writel_relaxed(BIT(31), vfe->base + VFE_0_IRQ_MASK_0);  in vfe_global_reset()
288 	writel_relaxed(reset_bits, vfe->base + VFE_0_GLOBAL_RESET_CMD);  in vfe_global_reset()
293 	writel_relaxed(VFE_0_BUS_BDG_CMD_HALT_REQ,  in vfe_halt_request()
299 	writel_relaxed(0x0, vfe->base + VFE_0_BUS_BDG_CMD);  in vfe_halt_clear()
397 		writel_relaxed(reg, vfe->base +  in vfe_wm_line_based()
406 		writel_relaxed(reg, vfe->base +  in vfe_wm_line_based()
409 		writel_relaxed(0, vfe->base +  in vfe_wm_line_based()
411 		writel_relaxed(0, vfe->base +  in vfe_wm_line_based()
428 	writel_relaxed(reg,  in vfe_wm_set_framedrop_period()
435 	writel_relaxed(pattern,  in vfe_wm_set_framedrop_pattern()
446 	writel_relaxed(reg, vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_UB_CFG(wm));  in vfe_wm_set_ub_cfg()
452 	writel_relaxed(VFE_0_BUS_CMD_Mx_RLD_CMD(wm), vfe->base + VFE_0_BUS_CMD);  in vfe_bus_reload_wm()
458 	writel_relaxed(addr,  in vfe_wm_set_ping_addr()
464 	writel_relaxed(addr,  in vfe_wm_set_pong_addr()
480 		writel_relaxed(0x101, vfe->base + VFE_0_BUS_CFG);  in vfe_bus_enable_wr_if()
482 		writel_relaxed(0, vfe->base + VFE_0_BUS_CFG);  in vfe_bus_enable_wr_if()
522 	writel_relaxed(VFE_0_BUS_IMAGE_MASTER_n_WR_IRQ_SUBSAMPLE_PATTERN_DEF,  in vfe_wm_set_subsample()
651 	writel_relaxed(val, vfe->base + VFE_0_REALIGN_BUF_CFG);  in vfe_set_realign_cfg()
667 	writel_relaxed(vfe->reg_update, vfe->base + VFE_0_REG_UPDATE);  in vfe_reg_update()
739 	writel_relaxed(VFE_0_DEMUX_CFG_PERIOD, vfe->base + VFE_0_DEMUX_CFG);  in vfe_set_demux_cfg()
742 	writel_relaxed(val, vfe->base + VFE_0_DEMUX_GAIN_0);  in vfe_set_demux_cfg()
745 	writel_relaxed(val, vfe->base + VFE_0_DEMUX_GAIN_1);  in vfe_set_demux_cfg()
767 	writel_relaxed(even_cfg, vfe->base + VFE_0_DEMUX_EVEN_CFG);  in vfe_set_demux_cfg()
768 	writel_relaxed(odd_cfg, vfe->base + VFE_0_DEMUX_ODD_CFG);  in vfe_set_demux_cfg()
793 	writel_relaxed(0x3, vfe->base + VFE_0_SCALE_ENC_Y_CFG);  in vfe_set_scale_cfg()
798 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_H_IMAGE_SIZE);  in vfe_set_scale_cfg()
803 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_H_PHASE);  in vfe_set_scale_cfg()
808 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_V_IMAGE_SIZE);  in vfe_set_scale_cfg()
813 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_V_PHASE);  in vfe_set_scale_cfg()
815 	writel_relaxed(0x3, vfe->base + VFE_0_SCALE_ENC_CBCR_CFG);  in vfe_set_scale_cfg()
820 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_H_IMAGE_SIZE);  in vfe_set_scale_cfg()
825 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_H_PHASE);  in vfe_set_scale_cfg()
832 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_V_IMAGE_SIZE);  in vfe_set_scale_cfg()
837 	writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_V_PHASE);  in vfe_set_scale_cfg()
849 	writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_Y_WIDTH);  in vfe_set_crop_cfg()
854 	writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_Y_HEIGHT);  in vfe_set_crop_cfg()
859 	writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_CBCR_WIDTH);  in vfe_set_crop_cfg()
868 	writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_CBCR_HEIGHT);  in vfe_set_crop_cfg()
877 	writel_relaxed(val, vfe->base + VFE_0_CLAMP_ENC_MAX_CFG);  in vfe_set_clamp_cfg()
883 	writel_relaxed(val, vfe->base + VFE_0_CLAMP_ENC_MIN_CFG);  in vfe_set_clamp_cfg()
891 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_0);  in vfe_set_qos()
892 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_1);  in vfe_set_qos()
893 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_2);  in vfe_set_qos()
894 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_3);  in vfe_set_qos()
895 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_4);  in vfe_set_qos()
896 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_5);  in vfe_set_qos()
897 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_6);  in vfe_set_qos()
898 	writel_relaxed(val7, vfe->base + VFE_0_BUS_BDG_QOS_CFG_7);  in vfe_set_qos()
906 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_0);  in vfe_set_ds()
907 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_1);  in vfe_set_ds()
908 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_2);  in vfe_set_ds()
909 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_3);  in vfe_set_ds()
910 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_4);  in vfe_set_ds()
911 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_5);  in vfe_set_ds()
912 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_6);  in vfe_set_ds()
913 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_7);  in vfe_set_ds()
914 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_8);  in vfe_set_ds()
915 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_9);  in vfe_set_ds()
916 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_10);  in vfe_set_ds()
917 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_11);  in vfe_set_ds()
918 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_12);  in vfe_set_ds()
919 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_13);  in vfe_set_ds()
920 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_14);  in vfe_set_ds()
921 	writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_15);  in vfe_set_ds()
922 	writel_relaxed(val16, vfe->base + VFE_0_BUS_BDG_DS_CFG_16);  in vfe_set_ds()
951 	writel_relaxed(val, vfe->base + VFE_0_CORE_CFG);  in vfe_set_camif_cfg()
955 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_FRAME_CFG);  in vfe_set_camif_cfg()
958 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_WINDOW_WIDTH_CFG);  in vfe_set_camif_cfg()
961 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_WINDOW_HEIGHT_CFG);  in vfe_set_camif_cfg()
964 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_SUBSAMPLE_CFG);  in vfe_set_camif_cfg()
967 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_IRQ_FRAMEDROP_PATTERN);  in vfe_set_camif_cfg()
970 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_IRQ_SUBSAMPLE_PATTERN);  in vfe_set_camif_cfg()
976 	writel_relaxed(val, vfe->base + VFE_0_CAMIF_CFG);  in vfe_set_camif_cfg()
984 	writel_relaxed(cmd, vfe->base + VFE_0_CAMIF_CMD);  in vfe_set_camif_cmd()
992 	writel_relaxed(cmd, vfe->base + VFE_0_CAMIF_CMD);  in vfe_set_camif_cmd()
1032 	writel_relaxed(*value0, vfe->base + VFE_0_IRQ_CLEAR_0);  in vfe_isr_read()
1033 	writel_relaxed(*value1, vfe->base + VFE_0_IRQ_CLEAR_1);  in vfe_isr_read()
1036 	writel_relaxed(VFE_0_IRQ_CMD_GLOBAL_CLEAR, vfe->base + VFE_0_IRQ_CMD);  in vfe_isr_read()