Lines Matching refs:csiphy
48 static void csiphy_hw_version_read(struct csiphy_device *csiphy, in csiphy_hw_version_read() argument
54 csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(6)); in csiphy_hw_version_read()
56 hw_version = readl_relaxed(csiphy->base + in csiphy_hw_version_read()
58 hw_version |= readl_relaxed(csiphy->base + in csiphy_hw_version_read()
60 hw_version |= readl_relaxed(csiphy->base + in csiphy_hw_version_read()
62 hw_version |= readl_relaxed(csiphy->base + in csiphy_hw_version_read()
72 static void csiphy_reset(struct csiphy_device *csiphy) in csiphy_reset() argument
74 writel_relaxed(0x1, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(0)); in csiphy_reset()
76 writel_relaxed(0x0, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(0)); in csiphy_reset()
81 struct csiphy_device *csiphy = dev; in csiphy_isr() local
86 u8 val = readl_relaxed(csiphy->base + in csiphy_isr()
89 writel_relaxed(val, csiphy->base + in csiphy_isr()
93 writel_relaxed(0x1, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(10)); in csiphy_isr()
94 writel_relaxed(0x0, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(10)); in csiphy_isr()
97 writel_relaxed(0x0, csiphy->base + in csiphy_isr()
136 static void csiphy_lanes_enable(struct csiphy_device *csiphy, in csiphy_lanes_enable() argument
146 csiphy->timer_clk_rate); in csiphy_lanes_enable()
152 writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(5)); in csiphy_lanes_enable()
155 writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(6)); in csiphy_lanes_enable()
165 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG1(l)); in csiphy_lanes_enable()
168 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG2(l)); in csiphy_lanes_enable()
171 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG3(l)); in csiphy_lanes_enable()
175 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG5(l)); in csiphy_lanes_enable()
178 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG6(l)); in csiphy_lanes_enable()
181 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG7(l)); in csiphy_lanes_enable()
185 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG8(l)); in csiphy_lanes_enable()
188 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG9(l)); in csiphy_lanes_enable()
191 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_TEST_IMP(l)); in csiphy_lanes_enable()
194 writel_relaxed(val, csiphy->base + in csiphy_lanes_enable()
199 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG1(l)); in csiphy_lanes_enable()
202 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG4(l)); in csiphy_lanes_enable()
205 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_MISC1(l)); in csiphy_lanes_enable()
208 writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(11)); in csiphy_lanes_enable()
211 writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(12)); in csiphy_lanes_enable()
214 writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(13)); in csiphy_lanes_enable()
217 writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(14)); in csiphy_lanes_enable()
220 writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(15)); in csiphy_lanes_enable()
223 writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(16)); in csiphy_lanes_enable()
226 writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(17)); in csiphy_lanes_enable()
229 writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(18)); in csiphy_lanes_enable()
232 writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(19)); in csiphy_lanes_enable()
235 writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(20)); in csiphy_lanes_enable()
238 writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(21)); in csiphy_lanes_enable()
241 static void csiphy_lanes_disable(struct csiphy_device *csiphy, in csiphy_lanes_disable() argument
244 writel_relaxed(0, csiphy->base + in csiphy_lanes_disable()
247 writel_relaxed(0, csiphy->base + in csiphy_lanes_disable()