Lines Matching refs:FLITE_REG_CIGCTRL
28 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
30 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
33 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
40 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
80 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_set_interrupt_mask()
83 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); in flite_hw_set_interrupt_mask()
106 u32 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_set_test_pattern()
111 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); in flite_hw_set_test_pattern()
147 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_set_source_format()
150 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); in flite_hw_set_source_format()
194 u32 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_set_camera_bus()
215 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); in flite_hw_set_camera_bus()
303 u32 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_set_output_dma()
307 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); in flite_hw_set_output_dma()
312 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); in flite_hw_set_output_dma()