377 	writel(timing.clk_termen, q->csi_rx_base +  in cio2_hw_init()
379 	writel(timing.clk_settle, q->csi_rx_base +  in cio2_hw_init()
383 		writel(timing.dat_termen, q->csi_rx_base +  in cio2_hw_init()
385 		writel(timing.dat_settle, q->csi_rx_base +  in cio2_hw_init()
407 	       q->csi_rx_base + CIO2_REG_CSIRX_STATUS_DLANE_HS);  in cio2_hw_init()
409 	       q->csi_rx_base + CIO2_REG_CSIRX_STATUS_DLANE_LP);  in cio2_hw_init()
416 		writel(1, q->csi_rx_base + CIO2_REG_MIPIBE_SP_LUT_ENTRY(i));  in cio2_hw_init()
421 		       q->csi_rx_base + CIO2_REG_MIPIBE_LP_LUT_ENTRY(i));  in cio2_hw_init()
423 	       q->csi_rx_base + CIO2_REG_MIPIBE_GLOBAL_LUT_DISREGARD);  in cio2_hw_init()
426 	writel(CIO2_IRQCTRL_MASK, q->csi_rx_base + CIO2_REG_IRQCTRL_MASK);  in cio2_hw_init()
427 	writel(CIO2_IRQCTRL_MASK, q->csi_rx_base + CIO2_REG_IRQCTRL_ENABLE);  in cio2_hw_init()
428 	writel(0, q->csi_rx_base + CIO2_REG_IRQCTRL_EDGE);  in cio2_hw_init()
429 	writel(0, q->csi_rx_base + CIO2_REG_IRQCTRL_LEVEL_NOT_PULSE);  in cio2_hw_init()
442 	       q->csi_rx_base + CIO2_REG_MIPIBE_LP_LUT_ENTRY(ENTRY));  in cio2_hw_init()
443 	writel(0, q->csi_rx_base + CIO2_REG_MIPIBE_COMP_FORMAT(sensor_vc));  in cio2_hw_init()
444 	writel(0, q->csi_rx_base + CIO2_REG_MIPIBE_FORCE_RAW8);  in cio2_hw_init()
447 	writel(lanes, q->csi_rx_base + CIO2_REG_CSIRX_NOF_ENABLED_LANES);  in cio2_hw_init()
503 	writel(CIO2_IRQCTRL_MASK, q->csi_rx_base + CIO2_REG_IRQCTRL_CLEAR);  in cio2_hw_init()
509 	writel(1, q->csi_rx_base + CIO2_REG_MIPIBE_ENABLE);  in cio2_hw_init()
510 	writel(1, q->csi_rx_base + CIO2_REG_CSIRX_ENABLE);  in cio2_hw_init()
521 	writel(0, q->csi_rx_base + CIO2_REG_IRQCTRL_MASK);  in cio2_hw_exit()
522 	writel(0, q->csi_rx_base + CIO2_REG_IRQCTRL_ENABLE);  in cio2_hw_exit()
523 	writel(0, q->csi_rx_base + CIO2_REG_CSIRX_ENABLE);  in cio2_hw_exit()
524 	writel(0, q->csi_rx_base + CIO2_REG_MIPIBE_ENABLE);  in cio2_hw_exit()
717 			void __iomem *const csi_rx_base =  in cio2_irq_handle_once()  local
732 				csi2_status = readl(csi_rx_base +  in cio2_irq_handle_once()
747 				       csi_rx_base + CIO2_REG_IRQCTRL_CLEAR);  in cio2_irq_handle_once()
1414 	q->csi_rx_base = cio2->base + CIO2_REG_PIPE_BASE(q->csi2.port);  in cio2_notifier_bound()