48 	iowrite32((tmp << 17) | IIC_READ, addr + IIC_CSR2);  in read_i2c_reg()
56 		iowrite32(DIRECT_ABORT, addr + IIC_CSR1);  in read_i2c_reg()
79 	iowrite32((tmp << 17) | IIC_WRITE | data, addr + IIC_CSR2);  in write_i2c_reg()
86 		iowrite32(DIRECT_ABORT, addr + IIC_CSR1);  in write_i2c_reg()
106 	iowrite32((tmp << 17) | IIC_WRITE | data, addr + IIC_CSR2);  in write_i2c_reg_nowait()
127 		iowrite32(DIRECT_ABORT, addr + IIC_CSR1);  in wait_i2c_reg()
167 	iowrite32(dma_addr, pd->regs + EVEN_DMA_START);  in dt3155_start_streaming()
168 	iowrite32(dma_addr + pd->width, pd->regs + ODD_DMA_START);  in dt3155_start_streaming()
169 	iowrite32(pd->width, pd->regs + EVEN_DMA_STRIDE);  in dt3155_start_streaming()
170 	iowrite32(pd->width, pd->regs + ODD_DMA_STRIDE);  in dt3155_start_streaming()
172 	iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START |  in dt3155_start_streaming()
174 	iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN |  in dt3155_start_streaming()
195 	iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN |  in dt3155_stop_streaming()
198 	iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD, pd->regs + INT_CSR);  in dt3155_stop_streaming()
257 		iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START,  in dt3155_irq_handler_even()
263 		iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN |  in dt3155_irq_handler_even()
281 		iowrite32(dma_addr, ipd->regs + EVEN_DMA_START);  in dt3155_irq_handler_even()
282 		iowrite32(dma_addr + ipd->width, ipd->regs + ODD_DMA_START);  in dt3155_irq_handler_even()
283 		iowrite32(ipd->width, ipd->regs + EVEN_DMA_STRIDE);  in dt3155_irq_handler_even()
284 		iowrite32(ipd->width, ipd->regs + ODD_DMA_STRIDE);  in dt3155_irq_handler_even()
289 	iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START |  in dt3155_irq_handler_even()
438 	iowrite32(ADDR_ERR_ODD | ADDR_ERR_EVEN | FLD_CRPT_ODD | FLD_CRPT_EVEN |  in dt3155_init_board()
444 	iowrite32(FIFO_EN | SRST, pd->regs + CSR1);  in dt3155_init_board()
446 	iowrite32(0xEEEEEE01, pd->regs + EVEN_PIXEL_FMT);  in dt3155_init_board()
447 	iowrite32(0xEEEEEE01, pd->regs + ODD_PIXEL_FMT);  in dt3155_init_board()
448 	iowrite32(0x00000020, pd->regs + FIFO_TRIGER);  in dt3155_init_board()
449 	iowrite32(0x00000103, pd->regs + XFER_MODE);  in dt3155_init_board()
450 	iowrite32(0, pd->regs + RETRY_WAIT_CNT);  in dt3155_init_board()
451 	iowrite32(0, pd->regs + INT_CSR);  in dt3155_init_board()
452 	iowrite32(1, pd->regs + EVEN_FLD_MASK);  in dt3155_init_board()
453 	iowrite32(1, pd->regs + ODD_FLD_MASK);  in dt3155_init_board()
454 	iowrite32(0, pd->regs + MASK_LENGTH);  in dt3155_init_board()
455 	iowrite32(0x0005007C, pd->regs + FIFO_FLAG_CNT);  in dt3155_init_board()
456 	iowrite32(0x01010101, pd->regs + IIC_CLK_DUR);  in dt3155_init_board()
496 	iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD,  in dt3155_init_board()