Lines Matching refs:ADV76XX_PAGE_HDMI
533 return adv76xx_read_check(state, ADV76XX_PAGE_HDMI, reg); in hdmi_read()
545 return regmap_write(state->regmap[ADV76XX_PAGE_HDMI], reg, val); in hdmi_write()
2740 [ADV76XX_PAGE_HDMI] = { "hdmi", 0x34 },
2871 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x0d), 0x04 }, /* HDMI filter optimization */
2872 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x0d), 0x04 }, /* HDMI filter optimization */
2873 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x3d), 0x00 }, /* DDC bus active pull-up control */
2874 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x3e), 0x74 }, /* TMDS PLL optimization */
2875 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x4e), 0x3b }, /* TMDS PLL optimization */
2876 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x57), 0x74 }, /* TMDS PLL optimization */
2877 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x58), 0x63 }, /* TMDS PLL optimization */
2878 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x8d), 0x18 }, /* equaliser */
2879 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x8e), 0x34 }, /* equaliser */
2880 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x93), 0x88 }, /* equaliser */
2881 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x94), 0x2e }, /* equaliser */
2882 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x96), 0x00 }, /* enable automatic EQ changing */
2898 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x0d), 0x84 }, /* HDMI filter optimization */
2899 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x3d), 0x10 }, /* DDC bus active pull-up control */
2900 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x3e), 0x39 }, /* TMDS PLL optimization */
2901 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x4e), 0x3b }, /* TMDS PLL optimization */
2902 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x57), 0xb6 }, /* TMDS PLL optimization */
2903 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x58), 0x03 }, /* TMDS PLL optimization */
2904 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x8d), 0x18 }, /* equaliser */
2905 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x8e), 0x34 }, /* equaliser */
2906 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x93), 0x8b }, /* equaliser */
2907 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x94), 0x2d }, /* equaliser */
2908 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x96), 0x01 }, /* enable automatic EQ changing */
2921 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x9b), 0x03 },
2922 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x6f), 0x08 },
2923 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x85), 0x1f },
2924 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x87), 0x70 },
2925 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x57), 0xda },
2926 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x58), 0x01 },
2927 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x03), 0x98 },
2928 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x4c), 0x44 },
2929 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x8d), 0x04 },
2930 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x8e), 0x1e },
2937 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x9b), 0x03 },
2938 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x6f), 0x08 },
2939 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x85), 0x1f },
2940 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x87), 0x70 },
2941 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x57), 0xda },
2942 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x58), 0x01 },
2943 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x03), 0x98 },
2944 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x4c), 0x44 },
2979 BIT(ADV76XX_PAGE_EDID) | BIT(ADV76XX_PAGE_HDMI) |
3022 BIT(ADV76XX_PAGE_HDMI) | BIT(ADV76XX_PAGE_CP),
3063 BIT(ADV76XX_PAGE_HDMI) | BIT(ADV76XX_PAGE_CP),