Lines Matching refs:intp
34 int stv0900_check_signal_presence(struct stv0900_internal *intp, in stv0900_check_signal_presence() argument
43 carr_offset = (stv0900_read_reg(intp, CFR2) << 8) in stv0900_check_signal_presence()
44 | stv0900_read_reg(intp, CFR1); in stv0900_check_signal_presence()
46 agc2_integr = (stv0900_read_reg(intp, AGC2I1) << 8) in stv0900_check_signal_presence()
47 | stv0900_read_reg(intp, AGC2I0); in stv0900_check_signal_presence()
48 max_carrier = intp->srch_range[demod] / 1000; in stv0900_check_signal_presence()
52 max_carrier /= intp->mclk / 1000; in stv0900_check_signal_presence()
64 static void stv0900_get_sw_loop_params(struct stv0900_internal *intp, in stv0900_get_sw_loop_params() argument
73 srate = intp->symbol_rate[demod]; in stv0900_get_sw_loop_params()
74 max_carrier = intp->srch_range[demod] / 1000; in stv0900_get_sw_loop_params()
76 standard = intp->srch_standard[demod]; in stv0900_get_sw_loop_params()
79 max_carrier /= intp->mclk / 1000; in stv0900_get_sw_loop_params()
85 freq_inc /= intp->mclk >> 10; in stv0900_get_sw_loop_params()
131 static int stv0900_search_carr_sw_loop(struct stv0900_internal *intp, in stv0900_search_carr_sw_loop() argument
141 max_carrier = intp->srch_range[demod] / 1000; in stv0900_search_carr_sw_loop()
145 max_carrier /= intp->mclk / 1000; in stv0900_search_carr_sw_loop()
158 stv0900_write_reg(intp, DMDISTATE, 0x1c); in stv0900_search_carr_sw_loop()
159 stv0900_write_reg(intp, CFRINIT1, (freqOffset / 256) & 0xff); in stv0900_search_carr_sw_loop()
160 stv0900_write_reg(intp, CFRINIT0, freqOffset & 0xff); in stv0900_search_carr_sw_loop()
161 stv0900_write_reg(intp, DMDISTATE, 0x18); in stv0900_search_carr_sw_loop()
162 stv0900_write_bits(intp, ALGOSWRST, 1); in stv0900_search_carr_sw_loop()
164 if (intp->chip_id == 0x12) { in stv0900_search_carr_sw_loop()
165 stv0900_write_bits(intp, RST_HWARE, 1); in stv0900_search_carr_sw_loop()
166 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_search_carr_sw_loop()
178 lock = stv0900_get_demod_lock(intp, demod, Timeout); in stv0900_search_carr_sw_loop()
179 no_signal = stv0900_check_signal_presence(intp, demod); in stv0900_search_carr_sw_loop()
187 stv0900_write_bits(intp, ALGOSWRST, 0); in stv0900_search_carr_sw_loop()
192 static int stv0900_sw_algo(struct stv0900_internal *intp, in stv0900_sw_algo() argument
204 stv0900_get_sw_loop_params(intp, &fqc_inc, &sft_stp_tout, in stv0900_sw_algo()
206 switch (intp->srch_standard[demod]) { in stv0900_sw_algo()
209 if (intp->chip_id >= 0x20) in stv0900_sw_algo()
210 stv0900_write_reg(intp, CARFREQ, 0x3b); in stv0900_sw_algo()
212 stv0900_write_reg(intp, CARFREQ, 0xef); in stv0900_sw_algo()
214 stv0900_write_reg(intp, DMDCFGMD, 0x49); in stv0900_sw_algo()
218 if (intp->chip_id >= 0x20) in stv0900_sw_algo()
219 stv0900_write_reg(intp, CORRELABS, 0x79); in stv0900_sw_algo()
221 stv0900_write_reg(intp, CORRELABS, 0x68); in stv0900_sw_algo()
223 stv0900_write_reg(intp, DMDCFGMD, 0x89); in stv0900_sw_algo()
229 if (intp->chip_id >= 0x20) { in stv0900_sw_algo()
230 stv0900_write_reg(intp, CARFREQ, 0x3b); in stv0900_sw_algo()
231 stv0900_write_reg(intp, CORRELABS, 0x79); in stv0900_sw_algo()
233 stv0900_write_reg(intp, CARFREQ, 0xef); in stv0900_sw_algo()
234 stv0900_write_reg(intp, CORRELABS, 0x68); in stv0900_sw_algo()
237 stv0900_write_reg(intp, DMDCFGMD, 0xc9); in stv0900_sw_algo()
244 lock = stv0900_search_carr_sw_loop(intp, in stv0900_sw_algo()
250 no_signal = stv0900_check_signal_presence(intp, demod); in stv0900_sw_algo()
256 if (intp->chip_id >= 0x20) { in stv0900_sw_algo()
257 stv0900_write_reg(intp, CARFREQ, 0x49); in stv0900_sw_algo()
258 stv0900_write_reg(intp, CORRELABS, 0x9e); in stv0900_sw_algo()
260 stv0900_write_reg(intp, CARFREQ, 0xed); in stv0900_sw_algo()
261 stv0900_write_reg(intp, CORRELABS, 0x88); in stv0900_sw_algo()
264 if ((stv0900_get_bits(intp, HEADER_MODE) == in stv0900_sw_algo()
268 s2fw = stv0900_get_bits(intp, FLYWHEEL_CPT); in stv0900_sw_algo()
272 s2fw = stv0900_get_bits(intp, in stv0900_sw_algo()
280 if (intp->chip_id >= 0x20) in stv0900_sw_algo()
281 stv0900_write_reg(intp, in stv0900_sw_algo()
285 stv0900_write_reg(intp, in stv0900_sw_algo()
289 stv0900_write_reg(intp, in stv0900_sw_algo()
304 static u32 stv0900_get_symbol_rate(struct stv0900_internal *intp, in stv0900_get_symbol_rate() argument
310 srate = (stv0900_get_bits(intp, SYMB_FREQ3) << 24) + in stv0900_get_symbol_rate()
311 (stv0900_get_bits(intp, SYMB_FREQ2) << 16) + in stv0900_get_symbol_rate()
312 (stv0900_get_bits(intp, SYMB_FREQ1) << 8) + in stv0900_get_symbol_rate()
313 (stv0900_get_bits(intp, SYMB_FREQ0)); in stv0900_get_symbol_rate()
315 srate, stv0900_get_bits(intp, SYMB_FREQ0), in stv0900_get_symbol_rate()
316 stv0900_get_bits(intp, SYMB_FREQ1), in stv0900_get_symbol_rate()
317 stv0900_get_bits(intp, SYMB_FREQ2), in stv0900_get_symbol_rate()
318 stv0900_get_bits(intp, SYMB_FREQ3)); in stv0900_get_symbol_rate()
332 static void stv0900_set_symbol_rate(struct stv0900_internal *intp, in stv0900_set_symbol_rate() argument
352 stv0900_write_reg(intp, SFRINIT1, (symb >> 8) & 0x7f); in stv0900_set_symbol_rate()
353 stv0900_write_reg(intp, SFRINIT1 + 1, (symb & 0xff)); in stv0900_set_symbol_rate()
356 static void stv0900_set_max_symbol_rate(struct stv0900_internal *intp, in stv0900_set_max_symbol_rate() argument
376 stv0900_write_reg(intp, SFRUP1, (symb >> 8) & 0x7f); in stv0900_set_max_symbol_rate()
377 stv0900_write_reg(intp, SFRUP1 + 1, (symb & 0xff)); in stv0900_set_max_symbol_rate()
379 stv0900_write_reg(intp, SFRUP1, 0x7f); in stv0900_set_max_symbol_rate()
380 stv0900_write_reg(intp, SFRUP1 + 1, 0xff); in stv0900_set_max_symbol_rate()
384 static void stv0900_set_min_symbol_rate(struct stv0900_internal *intp, in stv0900_set_min_symbol_rate() argument
404 stv0900_write_reg(intp, SFRLOW1, (symb >> 8) & 0xff); in stv0900_set_min_symbol_rate()
405 stv0900_write_reg(intp, SFRLOW1 + 1, (symb & 0xff)); in stv0900_set_min_symbol_rate()
408 static s32 stv0900_get_timing_offst(struct stv0900_internal *intp, in stv0900_get_timing_offst() argument
415 timingoffset = (stv0900_read_reg(intp, TMGREG2) << 16) + in stv0900_get_timing_offst()
416 (stv0900_read_reg(intp, TMGREG2 + 1) << 8) + in stv0900_get_timing_offst()
417 (stv0900_read_reg(intp, TMGREG2 + 2)); in stv0900_get_timing_offst()
431 static void stv0900_set_dvbs2_rolloff(struct stv0900_internal *intp, in stv0900_set_dvbs2_rolloff() argument
436 if (intp->chip_id == 0x10) { in stv0900_set_dvbs2_rolloff()
437 stv0900_write_bits(intp, MANUALSX_ROLLOFF, 1); in stv0900_set_dvbs2_rolloff()
438 rolloff = stv0900_read_reg(intp, MATSTR1) & 0x03; in stv0900_set_dvbs2_rolloff()
439 stv0900_write_bits(intp, ROLLOFF_CONTROL, rolloff); in stv0900_set_dvbs2_rolloff()
440 } else if (intp->chip_id <= 0x20) in stv0900_set_dvbs2_rolloff()
441 stv0900_write_bits(intp, MANUALSX_ROLLOFF, 0); in stv0900_set_dvbs2_rolloff()
443 stv0900_write_bits(intp, MANUALS2_ROLLOFF, 0); in stv0900_set_dvbs2_rolloff()
466 static int stv0900_check_timing_lock(struct stv0900_internal *intp, in stv0900_check_timing_lock() argument
476 car_freq = stv0900_read_reg(intp, CARFREQ); in stv0900_check_timing_lock()
477 tmg_th_high = stv0900_read_reg(intp, TMGTHRISE); in stv0900_check_timing_lock()
478 tmg_th_low = stv0900_read_reg(intp, TMGTHFALL); in stv0900_check_timing_lock()
479 stv0900_write_reg(intp, TMGTHRISE, 0x20); in stv0900_check_timing_lock()
480 stv0900_write_reg(intp, TMGTHFALL, 0x0); in stv0900_check_timing_lock()
481 stv0900_write_bits(intp, CFR_AUTOSCAN, 0); in stv0900_check_timing_lock()
482 stv0900_write_reg(intp, RTC, 0x80); in stv0900_check_timing_lock()
483 stv0900_write_reg(intp, RTCS2, 0x40); in stv0900_check_timing_lock()
484 stv0900_write_reg(intp, CARFREQ, 0x0); in stv0900_check_timing_lock()
485 stv0900_write_reg(intp, CFRINIT1, 0x0); in stv0900_check_timing_lock()
486 stv0900_write_reg(intp, CFRINIT0, 0x0); in stv0900_check_timing_lock()
487 stv0900_write_reg(intp, AGC2REF, 0x65); in stv0900_check_timing_lock()
488 stv0900_write_reg(intp, DMDISTATE, 0x18); in stv0900_check_timing_lock()
492 if (stv0900_get_bits(intp, TMGLOCK_QUALITY) >= 2) in stv0900_check_timing_lock()
501 stv0900_write_reg(intp, AGC2REF, 0x38); in stv0900_check_timing_lock()
502 stv0900_write_reg(intp, RTC, 0x88); in stv0900_check_timing_lock()
503 stv0900_write_reg(intp, RTCS2, 0x68); in stv0900_check_timing_lock()
504 stv0900_write_reg(intp, CARFREQ, car_freq); in stv0900_check_timing_lock()
505 stv0900_write_reg(intp, TMGTHRISE, tmg_th_high); in stv0900_check_timing_lock()
506 stv0900_write_reg(intp, TMGTHFALL, tmg_th_low); in stv0900_check_timing_lock()
515 struct stv0900_internal *intp = state->internal; in stv0900_get_demod_cold_lock() local
530 srate = intp->symbol_rate[d]; in stv0900_get_demod_cold_lock()
531 search_range = intp->srch_range[d]; in stv0900_get_demod_cold_lock()
538 lock = stv0900_get_demod_lock(intp, d, locktimeout); in stv0900_get_demod_cold_lock()
544 if (stv0900_check_timing_lock(intp, d) == TRUE) { in stv0900_get_demod_cold_lock()
545 stv0900_write_reg(intp, DMDISTATE, 0x1f); in stv0900_get_demod_cold_lock()
546 stv0900_write_reg(intp, DMDISTATE, 0x15); in stv0900_get_demod_cold_lock()
547 lock = stv0900_get_demod_lock(intp, d, demod_timeout); in stv0900_get_demod_cold_lock()
554 if (intp->chip_id <= 0x20) { in stv0900_get_demod_cold_lock()
591 if (intp->chip_id <= 0x20) { in stv0900_get_demod_cold_lock()
592 tuner_freq = intp->freq[d]; in stv0900_get_demod_cold_lock()
593 intp->bw[d] = stv0900_carrier_width(intp->symbol_rate[d], in stv0900_get_demod_cold_lock()
594 intp->rolloff) + intp->symbol_rate[d]; in stv0900_get_demod_cold_lock()
604 if (intp->chip_id <= 0x20) { in stv0900_get_demod_cold_lock()
605 if (intp->tuner_type[d] == 3) in stv0900_get_demod_cold_lock()
606 stv0900_set_tuner_auto(intp, tuner_freq, in stv0900_get_demod_cold_lock()
607 intp->bw[d], demod); in stv0900_get_demod_cold_lock()
609 stv0900_set_tuner(fe, tuner_freq, intp->bw[d]); in stv0900_get_demod_cold_lock()
611 stv0900_write_reg(intp, DMDISTATE, 0x1c); in stv0900_get_demod_cold_lock()
612 stv0900_write_reg(intp, CFRINIT1, 0); in stv0900_get_demod_cold_lock()
613 stv0900_write_reg(intp, CFRINIT0, 0); in stv0900_get_demod_cold_lock()
614 stv0900_write_reg(intp, DMDISTATE, 0x1f); in stv0900_get_demod_cold_lock()
615 stv0900_write_reg(intp, DMDISTATE, 0x15); in stv0900_get_demod_cold_lock()
617 stv0900_write_reg(intp, DMDISTATE, 0x1c); in stv0900_get_demod_cold_lock()
618 freq = (tuner_freq * 65536) / (intp->mclk / 1000); in stv0900_get_demod_cold_lock()
619 stv0900_write_bits(intp, CFR_INIT1, MSB(freq)); in stv0900_get_demod_cold_lock()
620 stv0900_write_bits(intp, CFR_INIT0, LSB(freq)); in stv0900_get_demod_cold_lock()
621 stv0900_write_reg(intp, DMDISTATE, 0x1f); in stv0900_get_demod_cold_lock()
622 stv0900_write_reg(intp, DMDISTATE, 0x05); in stv0900_get_demod_cold_lock()
625 lock = stv0900_get_demod_lock(intp, d, timeout); in stv0900_get_demod_cold_lock()
682 static void stv0900_set_viterbi_tracq(struct stv0900_internal *intp, in stv0900_set_viterbi_tracq() argument
690 stv0900_write_reg(intp, vth_reg++, 0xd0); in stv0900_set_viterbi_tracq()
691 stv0900_write_reg(intp, vth_reg++, 0x7d); in stv0900_set_viterbi_tracq()
692 stv0900_write_reg(intp, vth_reg++, 0x53); in stv0900_set_viterbi_tracq()
693 stv0900_write_reg(intp, vth_reg++, 0x2f); in stv0900_set_viterbi_tracq()
694 stv0900_write_reg(intp, vth_reg++, 0x24); in stv0900_set_viterbi_tracq()
695 stv0900_write_reg(intp, vth_reg++, 0x1f); in stv0900_set_viterbi_tracq()
698 static void stv0900_set_viterbi_standard(struct stv0900_internal *intp, in stv0900_set_viterbi_standard() argument
708 stv0900_write_reg(intp, FECM, 0x10); in stv0900_set_viterbi_standard()
709 stv0900_write_reg(intp, PRVIT, 0x3f); in stv0900_set_viterbi_standard()
713 stv0900_write_reg(intp, FECM, 0x00); in stv0900_set_viterbi_standard()
717 stv0900_write_reg(intp, PRVIT, 0x2f); in stv0900_set_viterbi_standard()
720 stv0900_write_reg(intp, PRVIT, 0x01); in stv0900_set_viterbi_standard()
723 stv0900_write_reg(intp, PRVIT, 0x02); in stv0900_set_viterbi_standard()
726 stv0900_write_reg(intp, PRVIT, 0x04); in stv0900_set_viterbi_standard()
729 stv0900_write_reg(intp, PRVIT, 0x08); in stv0900_set_viterbi_standard()
732 stv0900_write_reg(intp, PRVIT, 0x20); in stv0900_set_viterbi_standard()
739 stv0900_write_reg(intp, FECM, 0x80); in stv0900_set_viterbi_standard()
743 stv0900_write_reg(intp, PRVIT, 0x13); in stv0900_set_viterbi_standard()
746 stv0900_write_reg(intp, PRVIT, 0x01); in stv0900_set_viterbi_standard()
749 stv0900_write_reg(intp, PRVIT, 0x02); in stv0900_set_viterbi_standard()
752 stv0900_write_reg(intp, PRVIT, 0x10); in stv0900_set_viterbi_standard()
761 static enum fe_stv0900_fec stv0900_get_vit_fec(struct stv0900_internal *intp, in stv0900_get_vit_fec() argument
765 s32 rate_fld = stv0900_get_bits(intp, VIT_CURPUN); in stv0900_get_vit_fec()
794 static void stv0900_set_dvbs1_track_car_loop(struct stv0900_internal *intp, in stv0900_set_dvbs1_track_car_loop() argument
798 if (intp->chip_id >= 0x30) { in stv0900_set_dvbs1_track_car_loop()
800 stv0900_write_reg(intp, ACLC, 0x2b); in stv0900_set_dvbs1_track_car_loop()
801 stv0900_write_reg(intp, BCLC, 0x1a); in stv0900_set_dvbs1_track_car_loop()
803 stv0900_write_reg(intp, ACLC, 0x0c); in stv0900_set_dvbs1_track_car_loop()
804 stv0900_write_reg(intp, BCLC, 0x1b); in stv0900_set_dvbs1_track_car_loop()
806 stv0900_write_reg(intp, ACLC, 0x2c); in stv0900_set_dvbs1_track_car_loop()
807 stv0900_write_reg(intp, BCLC, 0x1c); in stv0900_set_dvbs1_track_car_loop()
811 stv0900_write_reg(intp, ACLC, 0x1a); in stv0900_set_dvbs1_track_car_loop()
812 stv0900_write_reg(intp, BCLC, 0x09); in stv0900_set_dvbs1_track_car_loop()
820 struct stv0900_internal *intp = state->internal; in stv0900_track_optimization() local
838 srate = stv0900_get_symbol_rate(intp, intp->mclk, demod); in stv0900_track_optimization()
839 srate += stv0900_get_timing_offst(intp, srate, demod); in stv0900_track_optimization()
841 switch (intp->result[demod].standard) { in stv0900_track_optimization()
845 if (intp->srch_standard[demod] == STV0900_AUTO_SEARCH) { in stv0900_track_optimization()
846 stv0900_write_bits(intp, DVBS1_ENABLE, 1); in stv0900_track_optimization()
847 stv0900_write_bits(intp, DVBS2_ENABLE, 0); in stv0900_track_optimization()
850 stv0900_write_bits(intp, ROLLOFF_CONTROL, intp->rolloff); in stv0900_track_optimization()
851 stv0900_write_bits(intp, MANUALSX_ROLLOFF, 1); in stv0900_track_optimization()
853 if (intp->chip_id < 0x30) { in stv0900_track_optimization()
854 stv0900_write_reg(intp, ERRCTRL1, 0x75); in stv0900_track_optimization()
858 if (stv0900_get_vit_fec(intp, demod) == STV0900_FEC_1_2) { in stv0900_track_optimization()
859 stv0900_write_reg(intp, GAUSSR0, 0x98); in stv0900_track_optimization()
860 stv0900_write_reg(intp, CCIR0, 0x18); in stv0900_track_optimization()
862 stv0900_write_reg(intp, GAUSSR0, 0x18); in stv0900_track_optimization()
863 stv0900_write_reg(intp, CCIR0, 0x18); in stv0900_track_optimization()
866 stv0900_write_reg(intp, ERRCTRL1, 0x75); in stv0900_track_optimization()
870 stv0900_write_bits(intp, DVBS1_ENABLE, 0); in stv0900_track_optimization()
871 stv0900_write_bits(intp, DVBS2_ENABLE, 1); in stv0900_track_optimization()
872 stv0900_write_reg(intp, ACLC, 0); in stv0900_track_optimization()
873 stv0900_write_reg(intp, BCLC, 0); in stv0900_track_optimization()
874 if (intp->result[demod].frame_len == STV0900_LONG_FRAME) { in stv0900_track_optimization()
875 foundModcod = stv0900_get_bits(intp, DEMOD_MODCOD); in stv0900_track_optimization()
876 pilots = stv0900_get_bits(intp, DEMOD_TYPE) & 0x01; in stv0900_track_optimization()
880 intp->chip_id); in stv0900_track_optimization()
882 stv0900_write_reg(intp, ACLC2S2Q, aclc); in stv0900_track_optimization()
884 stv0900_write_reg(intp, ACLC2S2Q, 0x2a); in stv0900_track_optimization()
885 stv0900_write_reg(intp, ACLC2S28, aclc); in stv0900_track_optimization()
888 if ((intp->demod_mode == STV0900_SINGLE) && in stv0900_track_optimization()
891 stv0900_write_reg(intp, ACLC2S2Q, 0x2a); in stv0900_track_optimization()
892 stv0900_write_reg(intp, ACLC2S216A, in stv0900_track_optimization()
895 stv0900_write_reg(intp, ACLC2S2Q, 0x2a); in stv0900_track_optimization()
896 stv0900_write_reg(intp, ACLC2S232A, in stv0900_track_optimization()
902 modulation = intp->result[demod].modulation; in stv0900_track_optimization()
904 modulation, intp->chip_id); in stv0900_track_optimization()
906 stv0900_write_reg(intp, ACLC2S2Q, aclc); in stv0900_track_optimization()
908 stv0900_write_reg(intp, ACLC2S2Q, 0x2a); in stv0900_track_optimization()
909 stv0900_write_reg(intp, ACLC2S28, aclc); in stv0900_track_optimization()
911 stv0900_write_reg(intp, ACLC2S2Q, 0x2a); in stv0900_track_optimization()
912 stv0900_write_reg(intp, ACLC2S216A, aclc); in stv0900_track_optimization()
914 stv0900_write_reg(intp, ACLC2S2Q, 0x2a); in stv0900_track_optimization()
915 stv0900_write_reg(intp, ACLC2S232A, aclc); in stv0900_track_optimization()
920 if (intp->chip_id <= 0x11) { in stv0900_track_optimization()
921 if (intp->demod_mode != STV0900_SINGLE) in stv0900_track_optimization()
922 stv0900_activate_s2_modcod(intp, demod); in stv0900_track_optimization()
926 stv0900_write_reg(intp, ERRCTRL1, 0x67); in stv0900_track_optimization()
931 stv0900_write_bits(intp, DVBS1_ENABLE, 1); in stv0900_track_optimization()
932 stv0900_write_bits(intp, DVBS2_ENABLE, 1); in stv0900_track_optimization()
936 freq1 = stv0900_read_reg(intp, CFR2); in stv0900_track_optimization()
937 freq0 = stv0900_read_reg(intp, CFR1); in stv0900_track_optimization()
938 if (intp->srch_algo[demod] == STV0900_BLIND_SEARCH) { in stv0900_track_optimization()
939 stv0900_write_reg(intp, SFRSTEP, 0x00); in stv0900_track_optimization()
940 stv0900_write_bits(intp, SCAN_ENABLE, 0); in stv0900_track_optimization()
941 stv0900_write_bits(intp, CFR_AUTOSCAN, 0); in stv0900_track_optimization()
942 stv0900_write_reg(intp, TMGCFG2, 0xc1); in stv0900_track_optimization()
943 stv0900_set_symbol_rate(intp, intp->mclk, srate, demod); in stv0900_track_optimization()
945 if (intp->result[demod].standard != STV0900_DVBS2_STANDARD) in stv0900_track_optimization()
946 stv0900_set_dvbs1_track_car_loop(intp, demod, srate); in stv0900_track_optimization()
950 if (intp->chip_id >= 0x20) { in stv0900_track_optimization()
951 if ((intp->srch_standard[demod] == STV0900_SEARCH_DVBS1) || in stv0900_track_optimization()
952 (intp->srch_standard[demod] == in stv0900_track_optimization()
954 (intp->srch_standard[demod] == in stv0900_track_optimization()
956 stv0900_write_reg(intp, VAVSRVIT, 0x0a); in stv0900_track_optimization()
957 stv0900_write_reg(intp, VITSCALE, 0x0); in stv0900_track_optimization()
961 if (intp->chip_id < 0x20) in stv0900_track_optimization()
962 stv0900_write_reg(intp, CARHDR, 0x08); in stv0900_track_optimization()
964 if (intp->chip_id == 0x10) in stv0900_track_optimization()
965 stv0900_write_reg(intp, CORRELEXP, 0x0a); in stv0900_track_optimization()
967 stv0900_write_reg(intp, AGC2REF, 0x38); in stv0900_track_optimization()
969 if ((intp->chip_id >= 0x20) || in stv0900_track_optimization()
971 (intp->symbol_rate[demod] < 10000000)) { in stv0900_track_optimization()
972 stv0900_write_reg(intp, CFRINIT1, freq1); in stv0900_track_optimization()
973 stv0900_write_reg(intp, CFRINIT0, freq0); in stv0900_track_optimization()
974 intp->bw[demod] = stv0900_carrier_width(srate, in stv0900_track_optimization()
975 intp->rolloff) + 10000000; in stv0900_track_optimization()
977 if ((intp->chip_id >= 0x20) || (blind_tun_sw == 1)) { in stv0900_track_optimization()
978 if (intp->srch_algo[demod] != STV0900_WARM_START) { in stv0900_track_optimization()
979 if (intp->tuner_type[demod] == 3) in stv0900_track_optimization()
980 stv0900_set_tuner_auto(intp, in stv0900_track_optimization()
981 intp->freq[demod], in stv0900_track_optimization()
982 intp->bw[demod], in stv0900_track_optimization()
986 intp->bw[demod]); in stv0900_track_optimization()
990 if ((intp->srch_algo[demod] == STV0900_BLIND_SEARCH) || in stv0900_track_optimization()
991 (intp->symbol_rate[demod] < 10000000)) in stv0900_track_optimization()
999 if (stv0900_get_demod_lock(intp, demod, timed / 2) == FALSE) { in stv0900_track_optimization()
1000 stv0900_write_reg(intp, DMDISTATE, 0x1f); in stv0900_track_optimization()
1001 stv0900_write_reg(intp, CFRINIT1, freq1); in stv0900_track_optimization()
1002 stv0900_write_reg(intp, CFRINIT0, freq0); in stv0900_track_optimization()
1003 stv0900_write_reg(intp, DMDISTATE, 0x18); in stv0900_track_optimization()
1005 while ((stv0900_get_demod_lock(intp, in stv0900_track_optimization()
1009 stv0900_write_reg(intp, DMDISTATE, 0x1f); in stv0900_track_optimization()
1010 stv0900_write_reg(intp, CFRINIT1, freq1); in stv0900_track_optimization()
1011 stv0900_write_reg(intp, CFRINIT0, freq0); in stv0900_track_optimization()
1012 stv0900_write_reg(intp, DMDISTATE, 0x18); in stv0900_track_optimization()
1019 if (intp->chip_id >= 0x20) in stv0900_track_optimization()
1020 stv0900_write_reg(intp, CARFREQ, 0x49); in stv0900_track_optimization()
1022 if ((intp->result[demod].standard == STV0900_DVBS1_STANDARD) || in stv0900_track_optimization()
1023 (intp->result[demod].standard == STV0900_DSS_STANDARD)) in stv0900_track_optimization()
1024 stv0900_set_viterbi_tracq(intp, demod); in stv0900_track_optimization()
1028 static int stv0900_get_fec_lock(struct stv0900_internal *intp, in stv0900_get_fec_lock() argument
1037 dmd_state = stv0900_get_bits(intp, HEADER_MODE); in stv0900_get_fec_lock()
1047 lock = stv0900_get_bits(intp, PKTDELIN_LOCK); in stv0900_get_fec_lock()
1050 lock = stv0900_get_bits(intp, LOCKEDVIT); in stv0900_get_fec_lock()
1068 static int stv0900_wait_for_lock(struct stv0900_internal *intp, in stv0900_wait_for_lock() argument
1077 lock = stv0900_get_demod_lock(intp, demod, dmd_timeout); in stv0900_wait_for_lock()
1080 lock = stv0900_get_fec_lock(intp, demod, fec_timeout); in stv0900_wait_for_lock()
1089 lock = stv0900_get_bits(intp, TSFIFO_LINEOK); in stv0900_wait_for_lock()
1110 struct stv0900_internal *intp = state->internal; in stv0900_get_standard() local
1113 int hdr_mode = stv0900_get_bits(intp, HEADER_MODE); in stv0900_get_standard()
1120 if (stv0900_get_bits(intp, DSS_DVB) == 1) in stv0900_get_standard()
1135 static s32 stv0900_get_carr_freq(struct stv0900_internal *intp, u32 mclk, in stv0900_get_carr_freq() argument
1144 derot = (stv0900_get_bits(intp, CAR_FREQ2) << 16) + in stv0900_get_carr_freq()
1145 (stv0900_get_bits(intp, CAR_FREQ1) << 8) + in stv0900_get_carr_freq()
1146 (stv0900_get_bits(intp, CAR_FREQ0)); in stv0900_get_carr_freq()
1184 struct stv0900_internal *intp = state->internal; in stv0900_get_signal_params() local
1187 struct stv0900_signal_info *result = &intp->result[demod]; in stv0900_get_signal_params()
1196 if (intp->srch_algo[d] == STV0900_BLIND_SEARCH) { in stv0900_get_signal_params()
1197 timing = stv0900_read_reg(intp, TMGREG2); in stv0900_get_signal_params()
1199 stv0900_write_reg(intp, SFRSTEP, 0x5c); in stv0900_get_signal_params()
1202 timing = stv0900_read_reg(intp, TMGREG2); in stv0900_get_signal_params()
1209 if (intp->tuner_type[demod] == 3) in stv0900_get_signal_params()
1210 result->frequency = stv0900_get_freq_auto(intp, d); in stv0900_get_signal_params()
1214 offsetFreq = stv0900_get_carr_freq(intp, intp->mclk, d) / 1000; in stv0900_get_signal_params()
1216 result->symbol_rate = stv0900_get_symbol_rate(intp, intp->mclk, d); in stv0900_get_signal_params()
1217 srate_offset = stv0900_get_timing_offst(intp, result->symbol_rate, d); in stv0900_get_signal_params()
1219 result->fec = stv0900_get_vit_fec(intp, d); in stv0900_get_signal_params()
1220 result->modcode = stv0900_get_bits(intp, DEMOD_MODCOD); in stv0900_get_signal_params()
1221 result->pilot = stv0900_get_bits(intp, DEMOD_TYPE) & 0x01; in stv0900_get_signal_params()
1222 result->frame_len = ((u32)stv0900_get_bits(intp, DEMOD_TYPE)) >> 1; in stv0900_get_signal_params()
1223 result->rolloff = stv0900_get_bits(intp, ROLLOFF_STATUS); in stv0900_get_signal_params()
1229 result->spectrum = stv0900_get_bits(intp, SPECINV_DEMOD); in stv0900_get_signal_params()
1243 result->spectrum = stv0900_get_bits(intp, IQINV); in stv0900_get_signal_params()
1250 if ((intp->srch_algo[d] == STV0900_BLIND_SEARCH) || in stv0900_get_signal_params()
1251 (intp->symbol_rate[d] < 10000000)) { in stv0900_get_signal_params()
1252 offsetFreq = result->frequency - intp->freq[d]; in stv0900_get_signal_params()
1253 if (intp->tuner_type[demod] == 3) in stv0900_get_signal_params()
1254 intp->freq[d] = stv0900_get_freq_auto(intp, d); in stv0900_get_signal_params()
1256 intp->freq[d] = stv0900_get_tuner_freq(fe); in stv0900_get_signal_params()
1258 if (abs(offsetFreq) <= ((intp->srch_range[d] / 2000) + 500)) in stv0900_get_signal_params()
1265 } else if (abs(offsetFreq) <= ((intp->srch_range[d] / 2000) + 500)) in stv0900_get_signal_params()
1277 struct stv0900_internal *intp = state->internal; in stv0900_dvbs1_acq_workaround() local
1287 intp->result[demod].locked = FALSE; in stv0900_dvbs1_acq_workaround()
1289 if (stv0900_get_bits(intp, HEADER_MODE) == STV0900_DVBS_FOUND) { in stv0900_dvbs1_acq_workaround()
1290 srate = stv0900_get_symbol_rate(intp, intp->mclk, demod); in stv0900_dvbs1_acq_workaround()
1291 srate += stv0900_get_timing_offst(intp, srate, demod); in stv0900_dvbs1_acq_workaround()
1292 if (intp->srch_algo[demod] == STV0900_BLIND_SEARCH) in stv0900_dvbs1_acq_workaround()
1293 stv0900_set_symbol_rate(intp, intp->mclk, srate, demod); in stv0900_dvbs1_acq_workaround()
1297 freq1 = stv0900_read_reg(intp, CFR2); in stv0900_dvbs1_acq_workaround()
1298 freq0 = stv0900_read_reg(intp, CFR1); in stv0900_dvbs1_acq_workaround()
1299 stv0900_write_bits(intp, CFR_AUTOSCAN, 0); in stv0900_dvbs1_acq_workaround()
1300 stv0900_write_bits(intp, SPECINV_CONTROL, in stv0900_dvbs1_acq_workaround()
1302 stv0900_write_reg(intp, DMDISTATE, 0x1c); in stv0900_dvbs1_acq_workaround()
1303 stv0900_write_reg(intp, CFRINIT1, freq1); in stv0900_dvbs1_acq_workaround()
1304 stv0900_write_reg(intp, CFRINIT0, freq0); in stv0900_dvbs1_acq_workaround()
1305 stv0900_write_reg(intp, DMDISTATE, 0x18); in stv0900_dvbs1_acq_workaround()
1306 if (stv0900_wait_for_lock(intp, demod, in stv0900_dvbs1_acq_workaround()
1308 intp->result[demod].locked = TRUE; in stv0900_dvbs1_acq_workaround()
1312 stv0900_write_bits(intp, SPECINV_CONTROL, in stv0900_dvbs1_acq_workaround()
1314 stv0900_write_reg(intp, DMDISTATE, 0x1c); in stv0900_dvbs1_acq_workaround()
1315 stv0900_write_reg(intp, CFRINIT1, freq1); in stv0900_dvbs1_acq_workaround()
1316 stv0900_write_reg(intp, CFRINIT0, freq0); in stv0900_dvbs1_acq_workaround()
1317 stv0900_write_reg(intp, DMDISTATE, 0x18); in stv0900_dvbs1_acq_workaround()
1318 if (stv0900_wait_for_lock(intp, demod, in stv0900_dvbs1_acq_workaround()
1320 intp->result[demod].locked = TRUE; in stv0900_dvbs1_acq_workaround()
1328 intp->result[demod].locked = FALSE; in stv0900_dvbs1_acq_workaround()
1333 static u16 stv0900_blind_check_agc2_min_level(struct stv0900_internal *intp, in stv0900_blind_check_agc2_min_level() argument
1344 stv0900_write_reg(intp, AGC2REF, 0x38); in stv0900_blind_check_agc2_min_level()
1345 stv0900_write_bits(intp, SCAN_ENABLE, 0); in stv0900_blind_check_agc2_min_level()
1346 stv0900_write_bits(intp, CFR_AUTOSCAN, 0); in stv0900_blind_check_agc2_min_level()
1348 stv0900_write_bits(intp, AUTO_GUP, 1); in stv0900_blind_check_agc2_min_level()
1349 stv0900_write_bits(intp, AUTO_GLOW, 1); in stv0900_blind_check_agc2_min_level()
1351 stv0900_write_reg(intp, DMDT0M, 0x0); in stv0900_blind_check_agc2_min_level()
1353 stv0900_set_symbol_rate(intp, intp->mclk, 1000000, demod); in stv0900_blind_check_agc2_min_level()
1354 nb_steps = -1 + (intp->srch_range[demod] / 1000000); in stv0900_blind_check_agc2_min_level()
1363 freq_step = (1000000 << 8) / (intp->mclk >> 8); in stv0900_blind_check_agc2_min_level()
1374 stv0900_write_reg(intp, DMDISTATE, 0x5C); in stv0900_blind_check_agc2_min_level()
1375 stv0900_write_reg(intp, CFRINIT1, (init_freq >> 8) & 0xff); in stv0900_blind_check_agc2_min_level()
1376 stv0900_write_reg(intp, CFRINIT0, init_freq & 0xff); in stv0900_blind_check_agc2_min_level()
1377 stv0900_write_reg(intp, DMDISTATE, 0x58); in stv0900_blind_check_agc2_min_level()
1382 agc2level += (stv0900_read_reg(intp, AGC2I1) << 8) in stv0900_blind_check_agc2_min_level()
1383 | stv0900_read_reg(intp, AGC2I0); in stv0900_blind_check_agc2_min_level()
1398 struct stv0900_internal *intp = state->internal; in stv0900_search_srate_coarse() local
1411 if (intp->chip_id >= 0x30) in stv0900_search_srate_coarse()
1416 stv0900_write_bits(intp, DEMOD_MODE, 0x1f); in stv0900_search_srate_coarse()
1417 stv0900_write_reg(intp, TMGCFG, 0x12); in stv0900_search_srate_coarse()
1418 stv0900_write_reg(intp, TMGTHRISE, 0xf0); in stv0900_search_srate_coarse()
1419 stv0900_write_reg(intp, TMGTHFALL, 0xe0); in stv0900_search_srate_coarse()
1420 stv0900_write_bits(intp, SCAN_ENABLE, 1); in stv0900_search_srate_coarse()
1421 stv0900_write_bits(intp, CFR_AUTOSCAN, 1); in stv0900_search_srate_coarse()
1422 stv0900_write_reg(intp, SFRUP1, 0x83); in stv0900_search_srate_coarse()
1423 stv0900_write_reg(intp, SFRUP0, 0xc0); in stv0900_search_srate_coarse()
1424 stv0900_write_reg(intp, SFRLOW1, 0x82); in stv0900_search_srate_coarse()
1425 stv0900_write_reg(intp, SFRLOW0, 0xa0); in stv0900_search_srate_coarse()
1426 stv0900_write_reg(intp, DMDT0M, 0x0); in stv0900_search_srate_coarse()
1427 stv0900_write_reg(intp, AGC2REF, 0x50); in stv0900_search_srate_coarse()
1429 if (intp->chip_id >= 0x30) { in stv0900_search_srate_coarse()
1430 stv0900_write_reg(intp, CARFREQ, 0x99); in stv0900_search_srate_coarse()
1431 stv0900_write_reg(intp, SFRSTEP, 0x98); in stv0900_search_srate_coarse()
1432 } else if (intp->chip_id >= 0x20) { in stv0900_search_srate_coarse()
1433 stv0900_write_reg(intp, CARFREQ, 0x6a); in stv0900_search_srate_coarse()
1434 stv0900_write_reg(intp, SFRSTEP, 0x95); in stv0900_search_srate_coarse()
1436 stv0900_write_reg(intp, CARFREQ, 0xed); in stv0900_search_srate_coarse()
1437 stv0900_write_reg(intp, SFRSTEP, 0x73); in stv0900_search_srate_coarse()
1440 if (intp->symbol_rate[demod] <= 2000000) in stv0900_search_srate_coarse()
1442 else if (intp->symbol_rate[demod] <= 5000000) in stv0900_search_srate_coarse()
1444 else if (intp->symbol_rate[demod] <= 12000000) in stv0900_search_srate_coarse()
1449 nb_steps = -1 + ((intp->srch_range[demod] / 1000) / currier_step); in stv0900_search_srate_coarse()
1457 currier_step = (intp->srch_range[demod] / 1000) / 10; in stv0900_search_srate_coarse()
1463 tuner_freq = intp->freq[demod]; in stv0900_search_srate_coarse()
1466 stv0900_write_reg(intp, DMDISTATE, 0x5f); in stv0900_search_srate_coarse()
1467 stv0900_write_bits(intp, DEMOD_MODE, 0); in stv0900_search_srate_coarse()
1472 if (stv0900_get_bits(intp, TMGLOCK_QUALITY) >= 2) in stv0900_search_srate_coarse()
1475 agc2_integr += (stv0900_read_reg(intp, AGC2I1) << 8) | in stv0900_search_srate_coarse()
1476 stv0900_read_reg(intp, AGC2I0); in stv0900_search_srate_coarse()
1480 coarse_srate = stv0900_get_symbol_rate(intp, intp->mclk, demod); in stv0900_search_srate_coarse()
1498 if (intp->tuner_type[demod] == 3) in stv0900_search_srate_coarse()
1499 stv0900_set_tuner_auto(intp, tuner_freq, in stv0900_search_srate_coarse()
1500 intp->bw[demod], demod); in stv0900_search_srate_coarse()
1503 intp->bw[demod]); in stv0900_search_srate_coarse()
1510 coarse_srate = stv0900_get_symbol_rate(intp, intp->mclk, demod); in stv0900_search_srate_coarse()
1518 struct stv0900_internal *intp = state->internal; in stv0900_search_srate_fine() local
1527 coarse_srate = stv0900_get_symbol_rate(intp, intp->mclk, demod); in stv0900_search_srate_fine()
1532 symbmax /= (intp->mclk / 1000); in stv0900_search_srate_fine()
1536 symbmin /= (intp->mclk / 1000); in stv0900_search_srate_fine()
1539 symb /= (intp->mclk / 1000); in stv0900_search_srate_fine()
1543 symbmax /= (intp->mclk / 100); in stv0900_search_srate_fine()
1547 symbmin /= (intp->mclk / 100); in stv0900_search_srate_fine()
1550 symb /= (intp->mclk / 100); in stv0900_search_srate_fine()
1554 coarse_freq = (stv0900_read_reg(intp, CFR2) << 8) in stv0900_search_srate_fine()
1555 | stv0900_read_reg(intp, CFR1); in stv0900_search_srate_fine()
1557 if (symbcomp < intp->symbol_rate[demod]) in stv0900_search_srate_fine()
1560 stv0900_write_reg(intp, DMDISTATE, 0x1f); in stv0900_search_srate_fine()
1561 stv0900_write_reg(intp, TMGCFG2, 0xc1); in stv0900_search_srate_fine()
1562 stv0900_write_reg(intp, TMGTHRISE, 0x20); in stv0900_search_srate_fine()
1563 stv0900_write_reg(intp, TMGTHFALL, 0x00); in stv0900_search_srate_fine()
1564 stv0900_write_reg(intp, TMGCFG, 0xd2); in stv0900_search_srate_fine()
1565 stv0900_write_bits(intp, CFR_AUTOSCAN, 0); in stv0900_search_srate_fine()
1566 stv0900_write_reg(intp, AGC2REF, 0x38); in stv0900_search_srate_fine()
1568 if (intp->chip_id >= 0x30) in stv0900_search_srate_fine()
1569 stv0900_write_reg(intp, CARFREQ, 0x79); in stv0900_search_srate_fine()
1570 else if (intp->chip_id >= 0x20) in stv0900_search_srate_fine()
1571 stv0900_write_reg(intp, CARFREQ, 0x49); in stv0900_search_srate_fine()
1573 stv0900_write_reg(intp, CARFREQ, 0xed); in stv0900_search_srate_fine()
1575 stv0900_write_reg(intp, SFRUP1, (symbmax >> 8) & 0x7f); in stv0900_search_srate_fine()
1576 stv0900_write_reg(intp, SFRUP0, (symbmax & 0xff)); in stv0900_search_srate_fine()
1578 stv0900_write_reg(intp, SFRLOW1, (symbmin >> 8) & 0x7f); in stv0900_search_srate_fine()
1579 stv0900_write_reg(intp, SFRLOW0, (symbmin & 0xff)); in stv0900_search_srate_fine()
1581 stv0900_write_reg(intp, SFRINIT1, (symb >> 8) & 0xff); in stv0900_search_srate_fine()
1582 stv0900_write_reg(intp, SFRINIT0, (symb & 0xff)); in stv0900_search_srate_fine()
1584 stv0900_write_reg(intp, DMDT0M, 0x20); in stv0900_search_srate_fine()
1585 stv0900_write_reg(intp, CFRINIT1, (coarse_freq >> 8) & 0xff); in stv0900_search_srate_fine()
1586 stv0900_write_reg(intp, CFRINIT0, coarse_freq & 0xff); in stv0900_search_srate_fine()
1587 stv0900_write_reg(intp, DMDISTATE, 0x15); in stv0900_search_srate_fine()
1596 struct stv0900_internal *intp = state->internal; in stv0900_blind_search_algo() local
1615 if (intp->chip_id < 0x20) { in stv0900_blind_search_algo()
1623 if (intp->chip_id <= 0x20) in stv0900_blind_search_algo()
1628 agc2_int = stv0900_blind_check_agc2_min_level(intp, demod); in stv0900_blind_search_algo()
1634 if (intp->chip_id == 0x10) in stv0900_blind_search_algo()
1635 stv0900_write_reg(intp, CORRELEXP, 0xaa); in stv0900_blind_search_algo()
1637 if (intp->chip_id < 0x20) in stv0900_blind_search_algo()
1638 stv0900_write_reg(intp, CARHDR, 0x55); in stv0900_blind_search_algo()
1640 stv0900_write_reg(intp, CARHDR, 0x20); in stv0900_blind_search_algo()
1642 if (intp->chip_id <= 0x20) in stv0900_blind_search_algo()
1643 stv0900_write_reg(intp, CARCFG, 0xc4); in stv0900_blind_search_algo()
1645 stv0900_write_reg(intp, CARCFG, 0x6); in stv0900_blind_search_algo()
1647 stv0900_write_reg(intp, RTCS2, 0x44); in stv0900_blind_search_algo()
1649 if (intp->chip_id >= 0x20) { in stv0900_blind_search_algo()
1650 stv0900_write_reg(intp, EQUALCFG, 0x41); in stv0900_blind_search_algo()
1651 stv0900_write_reg(intp, FFECFG, 0x41); in stv0900_blind_search_algo()
1652 stv0900_write_reg(intp, VITSCALE, 0x82); in stv0900_blind_search_algo()
1653 stv0900_write_reg(intp, VAVSRVIT, 0x0); in stv0900_blind_search_algo()
1659 stv0900_write_reg(intp, KREFTMG, k_ref_tmg); in stv0900_blind_search_algo()
1668 lock = stv0900_get_demod_lock(intp, in stv0900_blind_search_algo()
1678 agc2_int = (stv0900_read_reg(intp, AGC2I1) << 8) in stv0900_blind_search_algo()
1679 | stv0900_read_reg(intp, AGC2I0); in stv0900_blind_search_algo()
1684 dstatus2 = stv0900_read_reg(intp, DSTATUS2); in stv0900_blind_search_algo()
1704 static void stv0900_set_viterbi_acq(struct stv0900_internal *intp, in stv0900_set_viterbi_acq() argument
1711 stv0900_write_reg(intp, vth_reg++, 0x96); in stv0900_set_viterbi_acq()
1712 stv0900_write_reg(intp, vth_reg++, 0x64); in stv0900_set_viterbi_acq()
1713 stv0900_write_reg(intp, vth_reg++, 0x36); in stv0900_set_viterbi_acq()
1714 stv0900_write_reg(intp, vth_reg++, 0x23); in stv0900_set_viterbi_acq()
1715 stv0900_write_reg(intp, vth_reg++, 0x1e); in stv0900_set_viterbi_acq()
1716 stv0900_write_reg(intp, vth_reg++, 0x19); in stv0900_set_viterbi_acq()
1719 static void stv0900_set_search_standard(struct stv0900_internal *intp, in stv0900_set_search_standard() argument
1725 switch (intp->srch_standard[demod]) { in stv0900_set_search_standard()
1741 switch (intp->srch_standard[demod]) { in stv0900_set_search_standard()
1744 stv0900_write_bits(intp, DVBS1_ENABLE, 1); in stv0900_set_search_standard()
1745 stv0900_write_bits(intp, DVBS2_ENABLE, 0); in stv0900_set_search_standard()
1746 stv0900_write_bits(intp, STOP_CLKVIT, 0); in stv0900_set_search_standard()
1747 stv0900_set_dvbs1_track_car_loop(intp, in stv0900_set_search_standard()
1749 intp->symbol_rate[demod]); in stv0900_set_search_standard()
1750 stv0900_write_reg(intp, CAR2CFG, 0x22); in stv0900_set_search_standard()
1752 stv0900_set_viterbi_acq(intp, demod); in stv0900_set_search_standard()
1753 stv0900_set_viterbi_standard(intp, in stv0900_set_search_standard()
1754 intp->srch_standard[demod], in stv0900_set_search_standard()
1755 intp->fec[demod], demod); in stv0900_set_search_standard()
1759 stv0900_write_bits(intp, DVBS1_ENABLE, 0); in stv0900_set_search_standard()
1760 stv0900_write_bits(intp, DVBS2_ENABLE, 1); in stv0900_set_search_standard()
1761 stv0900_write_bits(intp, STOP_CLKVIT, 1); in stv0900_set_search_standard()
1762 stv0900_write_reg(intp, ACLC, 0x1a); in stv0900_set_search_standard()
1763 stv0900_write_reg(intp, BCLC, 0x09); in stv0900_set_search_standard()
1764 if (intp->chip_id <= 0x20) /*cut 1.x and 2.0*/ in stv0900_set_search_standard()
1765 stv0900_write_reg(intp, CAR2CFG, 0x26); in stv0900_set_search_standard()
1767 stv0900_write_reg(intp, CAR2CFG, 0x66); in stv0900_set_search_standard()
1769 if (intp->demod_mode != STV0900_SINGLE) { in stv0900_set_search_standard()
1770 if (intp->chip_id <= 0x11) in stv0900_set_search_standard()
1771 stv0900_stop_all_s2_modcod(intp, demod); in stv0900_set_search_standard()
1773 stv0900_activate_s2_modcod(intp, demod); in stv0900_set_search_standard()
1776 stv0900_activate_s2_modcod_single(intp, demod); in stv0900_set_search_standard()
1778 stv0900_set_viterbi_tracq(intp, demod); in stv0900_set_search_standard()
1783 stv0900_write_bits(intp, DVBS1_ENABLE, 1); in stv0900_set_search_standard()
1784 stv0900_write_bits(intp, DVBS2_ENABLE, 1); in stv0900_set_search_standard()
1785 stv0900_write_bits(intp, STOP_CLKVIT, 0); in stv0900_set_search_standard()
1786 stv0900_write_reg(intp, ACLC, 0x1a); in stv0900_set_search_standard()
1787 stv0900_write_reg(intp, BCLC, 0x09); in stv0900_set_search_standard()
1788 stv0900_set_dvbs1_track_car_loop(intp, in stv0900_set_search_standard()
1790 intp->symbol_rate[demod]); in stv0900_set_search_standard()
1791 if (intp->chip_id <= 0x20) /*cut 1.x and 2.0*/ in stv0900_set_search_standard()
1792 stv0900_write_reg(intp, CAR2CFG, 0x26); in stv0900_set_search_standard()
1794 stv0900_write_reg(intp, CAR2CFG, 0x66); in stv0900_set_search_standard()
1796 if (intp->demod_mode != STV0900_SINGLE) { in stv0900_set_search_standard()
1797 if (intp->chip_id <= 0x11) in stv0900_set_search_standard()
1798 stv0900_stop_all_s2_modcod(intp, demod); in stv0900_set_search_standard()
1800 stv0900_activate_s2_modcod(intp, demod); in stv0900_set_search_standard()
1803 stv0900_activate_s2_modcod_single(intp, demod); in stv0900_set_search_standard()
1805 stv0900_set_viterbi_tracq(intp, demod); in stv0900_set_search_standard()
1806 stv0900_set_viterbi_standard(intp, in stv0900_set_search_standard()
1807 intp->srch_standard[demod], in stv0900_set_search_standard()
1808 intp->fec[demod], demod); in stv0900_set_search_standard()
1817 struct stv0900_internal *intp = state->internal; in stv0900_algo() local
1831 algo = intp->srch_algo[demod]; in stv0900_algo()
1832 stv0900_write_bits(intp, RST_HWARE, 1); in stv0900_algo()
1833 stv0900_write_reg(intp, DMDISTATE, 0x5c); in stv0900_algo()
1834 if (intp->chip_id >= 0x20) { in stv0900_algo()
1835 if (intp->symbol_rate[demod] > 5000000) in stv0900_algo()
1836 stv0900_write_reg(intp, CORRELABS, 0x9e); in stv0900_algo()
1838 stv0900_write_reg(intp, CORRELABS, 0x82); in stv0900_algo()
1840 stv0900_write_reg(intp, CORRELABS, 0x88); in stv0900_algo()
1843 intp->symbol_rate[demod], in stv0900_algo()
1844 intp->srch_algo[demod]); in stv0900_algo()
1846 if (intp->srch_algo[demod] == STV0900_BLIND_SEARCH) { in stv0900_algo()
1847 intp->bw[demod] = 2 * 36000000; in stv0900_algo()
1849 stv0900_write_reg(intp, TMGCFG2, 0xc0); in stv0900_algo()
1850 stv0900_write_reg(intp, CORRELMANT, 0x70); in stv0900_algo()
1852 stv0900_set_symbol_rate(intp, intp->mclk, 1000000, demod); in stv0900_algo()
1854 stv0900_write_reg(intp, DMDT0M, 0x20); in stv0900_algo()
1855 stv0900_write_reg(intp, TMGCFG, 0xd2); in stv0900_algo()
1857 if (intp->symbol_rate[demod] < 2000000) in stv0900_algo()
1858 stv0900_write_reg(intp, CORRELMANT, 0x63); in stv0900_algo()
1860 stv0900_write_reg(intp, CORRELMANT, 0x70); in stv0900_algo()
1862 stv0900_write_reg(intp, AGC2REF, 0x38); in stv0900_algo()
1864 intp->bw[demod] = in stv0900_algo()
1865 stv0900_carrier_width(intp->symbol_rate[demod], in stv0900_algo()
1866 intp->rolloff); in stv0900_algo()
1867 if (intp->chip_id >= 0x20) { in stv0900_algo()
1868 stv0900_write_reg(intp, KREFTMG, 0x5a); in stv0900_algo()
1870 if (intp->srch_algo[demod] == STV0900_COLD_START) { in stv0900_algo()
1871 intp->bw[demod] += 10000000; in stv0900_algo()
1872 intp->bw[demod] *= 15; in stv0900_algo()
1873 intp->bw[demod] /= 10; in stv0900_algo()
1874 } else if (intp->srch_algo[demod] == STV0900_WARM_START) in stv0900_algo()
1875 intp->bw[demod] += 10000000; in stv0900_algo()
1878 stv0900_write_reg(intp, KREFTMG, 0xc1); in stv0900_algo()
1879 intp->bw[demod] += 10000000; in stv0900_algo()
1880 intp->bw[demod] *= 15; in stv0900_algo()
1881 intp->bw[demod] /= 10; in stv0900_algo()
1884 stv0900_write_reg(intp, TMGCFG2, 0xc1); in stv0900_algo()
1886 stv0900_set_symbol_rate(intp, intp->mclk, in stv0900_algo()
1887 intp->symbol_rate[demod], demod); in stv0900_algo()
1888 stv0900_set_max_symbol_rate(intp, intp->mclk, in stv0900_algo()
1889 intp->symbol_rate[demod], demod); in stv0900_algo()
1890 stv0900_set_min_symbol_rate(intp, intp->mclk, in stv0900_algo()
1891 intp->symbol_rate[demod], demod); in stv0900_algo()
1892 if (intp->symbol_rate[demod] >= 10000000) in stv0900_algo()
1899 if (intp->tuner_type[demod] == 3) in stv0900_algo()
1900 stv0900_set_tuner_auto(intp, intp->freq[demod], in stv0900_algo()
1901 intp->bw[demod], demod); in stv0900_algo()
1903 stv0900_set_tuner(fe, intp->freq[demod], intp->bw[demod]); in stv0900_algo()
1905 agc1_power = MAKEWORD(stv0900_get_bits(intp, AGCIQ_VALUE1), in stv0900_algo()
1906 stv0900_get_bits(intp, AGCIQ_VALUE0)); in stv0900_algo()
1912 aq_power += (stv0900_get_bits(intp, POWER_I) + in stv0900_algo()
1913 stv0900_get_bits(intp, POWER_Q)) / 2; in stv0900_algo()
1919 intp->result[demod].locked = FALSE; in stv0900_algo()
1923 stv0900_write_bits(intp, SPECINV_CONTROL, in stv0900_algo()
1924 intp->srch_iq_inv[demod]); in stv0900_algo()
1925 if (intp->chip_id <= 0x20) /*cut 2.0*/ in stv0900_algo()
1926 stv0900_write_bits(intp, MANUALSX_ROLLOFF, 1); in stv0900_algo()
1928 stv0900_write_bits(intp, MANUALS2_ROLLOFF, 1); in stv0900_algo()
1930 stv0900_set_search_standard(intp, demod); in stv0900_algo()
1932 if (intp->srch_algo[demod] != STV0900_BLIND_SEARCH) in stv0900_algo()
1933 stv0900_start_search(intp, demod); in stv0900_algo()
1939 if (intp->chip_id == 0x12) { in stv0900_algo()
1940 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_algo()
1942 stv0900_write_bits(intp, RST_HWARE, 1); in stv0900_algo()
1943 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_algo()
1951 lock = stv0900_get_demod_lock(intp, demod, demod_timeout); in stv0900_algo()
1955 if (stv0900_check_timing_lock(intp, demod) == TRUE) in stv0900_algo()
1956 lock = stv0900_sw_algo(intp, demod); in stv0900_algo()
1965 if (intp->chip_id <= 0x11) { in stv0900_algo()
1971 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_algo()
1973 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_algo()
1975 stv0900_write_bits(intp, RST_HWARE, 1); in stv0900_algo()
1976 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_algo()
1979 } else if (intp->chip_id >= 0x20) { in stv0900_algo()
1980 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_algo()
1982 stv0900_write_bits(intp, RST_HWARE, 1); in stv0900_algo()
1983 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_algo()
1986 if (stv0900_wait_for_lock(intp, demod, in stv0900_algo()
1989 intp->result[demod].locked = TRUE; in stv0900_algo()
1990 if (intp->result[demod].standard == in stv0900_algo()
1992 stv0900_set_dvbs2_rolloff(intp, demod); in stv0900_algo()
1993 stv0900_write_bits(intp, RESET_UPKO_COUNT, 1); in stv0900_algo()
1994 stv0900_write_bits(intp, RESET_UPKO_COUNT, 0); in stv0900_algo()
1995 stv0900_write_reg(intp, ERRCTRL1, 0x67); in stv0900_algo()
1997 stv0900_write_reg(intp, ERRCTRL1, 0x75); in stv0900_algo()
2000 stv0900_write_reg(intp, FBERCPT4, 0); in stv0900_algo()
2001 stv0900_write_reg(intp, ERRCTRL2, 0xc1); in stv0900_algo()
2005 no_signal = stv0900_check_signal_presence(intp, demod); in stv0900_algo()
2007 intp->result[demod].locked = FALSE; in stv0900_algo()
2014 if (intp->chip_id > 0x11) { in stv0900_algo()
2015 intp->result[demod].locked = FALSE; in stv0900_algo()
2019 if ((stv0900_get_bits(intp, HEADER_MODE) == STV0900_DVBS_FOUND) && in stv0900_algo()
2020 (intp->srch_iq_inv[demod] <= STV0900_IQ_AUTO_NORMAL_FIRST)) in stv0900_algo()