111 static int lgdt3305_write_reg(struct lgdt3305_state *state, u16 reg, u8 val)  in lgdt3305_write_reg()  function
185 	ret = lgdt3305_write_reg(state, reg, val);  in lgdt3305_set_reg_bit()
203 		ret = lgdt3305_write_reg(state, regs[i].reg, regs[i].val);  in lgdt3305_write_regs()
258 	ret = lgdt3305_write_reg(state, LGDT3305_TP_CTRL_1, val);  in lgdt3305_mpeg_mode_polarity()
294 	ret = lgdt3305_write_reg(state, LGDT3305_GEN_CTRL_1, opermode);  in lgdt3305_set_modulation()
343 	lgdt3305_write_reg(state, LGDT3305_DGTL_AGC_REF_1, agc_ref >> 8);  in lgdt3305_passband_digital_agc()
344 	lgdt3305_write_reg(state, LGDT3305_DGTL_AGC_REF_2, agc_ref & 0xff);  in lgdt3305_passband_digital_agc()
379 		lgdt3305_write_reg(state, LGDT3305_AGC_DELAY_PT_1,  in lgdt3305_rfagc_loop()
381 		lgdt3305_write_reg(state, LGDT3305_AGC_DELAY_PT_2,  in lgdt3305_rfagc_loop()
384 		lgdt3305_write_reg(state, LGDT3305_RFAGC_LOOP_FLTR_BW_1,  in lgdt3305_rfagc_loop()
386 		lgdt3305_write_reg(state, LGDT3305_RFAGC_LOOP_FLTR_BW_2,  in lgdt3305_rfagc_loop()
392 		lgdt3305_write_reg(state, LGDT3305_IFBW_1, ifbw >> 8);  in lgdt3305_rfagc_loop()
393 		lgdt3305_write_reg(state, LGDT3305_IFBW_2, ifbw & 0xff);  in lgdt3305_rfagc_loop()
423 		lgdt3305_write_reg(state, 0x0314, 0xe1 | lockdten << 1);  in lgdt3305_agc_setup()
427 		lgdt3305_write_reg(state, LGDT3305_AGC_CTRL_4, 0xe1 | lockdten << 1);  in lgdt3305_agc_setup()
464 		lgdt3305_write_reg(state, LGDT3305_AGC_POWER_REF_1,  in lgdt3305_set_agc_power_ref()
466 		lgdt3305_write_reg(state, LGDT3305_AGC_POWER_REF_2,  in lgdt3305_set_agc_power_ref()
484 		ret = lgdt3305_write_reg(state, LGDT3305_CR_CTRL_7,  in lgdt3305_spectral_inversion()
489 		ret = lgdt3305_write_reg(state, LGDT3305_FEC_BLOCK_CTRL,  in lgdt3305_spectral_inversion()
539 	lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_1, nco1);  in lgdt3305_set_if()
540 	lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_2, nco2);  in lgdt3305_set_if()
541 	lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_3, nco3);  in lgdt3305_set_if()
542 	lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_4, nco4);  in lgdt3305_set_if()
587 	lgdt3305_write_reg(state, LGDT3305_GEN_CTRL_3, gen_ctrl_3);  in lgdt3305_sleep()
588 	lgdt3305_write_reg(state, LGDT3305_GEN_CTRL_4, gen_ctrl_4);  in lgdt3305_sleep()
711 		lgdt3305_write_reg(state, 0x030d, 0x00);  in lgdt3304_set_parameters()
712 		lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_1, 0x4f);  in lgdt3304_set_parameters()
713 		lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_2, 0x0c);  in lgdt3304_set_parameters()
714 		lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_3, 0xac);  in lgdt3304_set_parameters()
715 		lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_4, 0xba);  in lgdt3304_set_parameters()
719 		lgdt3305_write_reg(state, 0x030d, 0x14);  in lgdt3304_set_parameters()
779 	ret = lgdt3305_write_reg(state, LGDT3305_GEN_CONTROL, 0x2f);  in lgdt3305_set_parameters()
1141 	ret = lgdt3305_write_reg(state, 0x0808, 0x80);  in lgdt3305_attach()
1147 	ret = lgdt3305_write_reg(state, 0x0808, 0x00);  in lgdt3305_attach()