Lines Matching refs:write16
399 static int write16(struct drxk_state *state, u32 reg, u16 data) in write16() function
519 status = write16(state, SIO_CC_PWD_MODE__A, SIO_CC_PWD_MODE_LEVEL_NONE); in power_up_device()
522 status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); in power_up_device()
526 status = write16(state, SIO_CC_PLL_LOCK__A, 1); in power_up_device()
784 status = write16(state, SCU_RAM_GPIO__A, in drxx_open()
792 status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); in drxx_open()
801 status = write16(state, SIO_TOP_COMM_KEY__A, key); in drxx_open()
819 status = write16(state, SCU_RAM_GPIO__A, in get_device_capabilities()
823 status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); in get_device_capabilities()
829 status = write16(state, SIO_TOP_COMM_KEY__A, 0x0000); in get_device_capabilities()
1016 status = write16(state, SIO_HI_RA_RAM_CMD__A, cmd); in hi_command()
1058 status = write16(state, SIO_HI_RA_RAM_PAR_6__A, in hi_cfg_command()
1062 status = write16(state, SIO_HI_RA_RAM_PAR_5__A, in hi_cfg_command()
1066 status = write16(state, SIO_HI_RA_RAM_PAR_4__A, in hi_cfg_command()
1070 status = write16(state, SIO_HI_RA_RAM_PAR_3__A, in hi_cfg_command()
1074 status = write16(state, SIO_HI_RA_RAM_PAR_2__A, in hi_cfg_command()
1078 status = write16(state, SIO_HI_RA_RAM_PAR_1__A, in hi_cfg_command()
1118 status = write16(state, SCU_RAM_GPIO__A, in mpegts_configure_pins()
1124 status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); in mpegts_configure_pins()
1130 status = write16(state, SIO_PDR_MSTRT_CFG__A, 0x0000); in mpegts_configure_pins()
1133 status = write16(state, SIO_PDR_MERR_CFG__A, 0x0000); in mpegts_configure_pins()
1136 status = write16(state, SIO_PDR_MCLK_CFG__A, 0x0000); in mpegts_configure_pins()
1139 status = write16(state, SIO_PDR_MVAL_CFG__A, 0x0000); in mpegts_configure_pins()
1142 status = write16(state, SIO_PDR_MD0_CFG__A, 0x0000); in mpegts_configure_pins()
1145 status = write16(state, SIO_PDR_MD1_CFG__A, 0x0000); in mpegts_configure_pins()
1148 status = write16(state, SIO_PDR_MD2_CFG__A, 0x0000); in mpegts_configure_pins()
1151 status = write16(state, SIO_PDR_MD3_CFG__A, 0x0000); in mpegts_configure_pins()
1154 status = write16(state, SIO_PDR_MD4_CFG__A, 0x0000); in mpegts_configure_pins()
1157 status = write16(state, SIO_PDR_MD5_CFG__A, 0x0000); in mpegts_configure_pins()
1160 status = write16(state, SIO_PDR_MD6_CFG__A, 0x0000); in mpegts_configure_pins()
1163 status = write16(state, SIO_PDR_MD7_CFG__A, 0x0000); in mpegts_configure_pins()
1175 status = write16(state, SIO_PDR_MSTRT_CFG__A, sio_pdr_mdx_cfg); in mpegts_configure_pins()
1182 status = write16(state, SIO_PDR_MERR_CFG__A, err_cfg); in mpegts_configure_pins()
1185 status = write16(state, SIO_PDR_MVAL_CFG__A, err_cfg); in mpegts_configure_pins()
1191 status = write16(state, SIO_PDR_MD1_CFG__A, in mpegts_configure_pins()
1195 status = write16(state, SIO_PDR_MD2_CFG__A, in mpegts_configure_pins()
1199 status = write16(state, SIO_PDR_MD3_CFG__A, in mpegts_configure_pins()
1203 status = write16(state, SIO_PDR_MD4_CFG__A, in mpegts_configure_pins()
1207 status = write16(state, SIO_PDR_MD5_CFG__A, in mpegts_configure_pins()
1211 status = write16(state, SIO_PDR_MD6_CFG__A, in mpegts_configure_pins()
1215 status = write16(state, SIO_PDR_MD7_CFG__A, in mpegts_configure_pins()
1224 status = write16(state, SIO_PDR_MD1_CFG__A, 0x0000); in mpegts_configure_pins()
1227 status = write16(state, SIO_PDR_MD2_CFG__A, 0x0000); in mpegts_configure_pins()
1230 status = write16(state, SIO_PDR_MD3_CFG__A, 0x0000); in mpegts_configure_pins()
1233 status = write16(state, SIO_PDR_MD4_CFG__A, 0x0000); in mpegts_configure_pins()
1236 status = write16(state, SIO_PDR_MD5_CFG__A, 0x0000); in mpegts_configure_pins()
1239 status = write16(state, SIO_PDR_MD6_CFG__A, 0x0000); in mpegts_configure_pins()
1242 status = write16(state, SIO_PDR_MD7_CFG__A, 0x0000); in mpegts_configure_pins()
1246 status = write16(state, SIO_PDR_MCLK_CFG__A, sio_pdr_mclk_cfg); in mpegts_configure_pins()
1249 status = write16(state, SIO_PDR_MD0_CFG__A, sio_pdr_mdx_cfg); in mpegts_configure_pins()
1254 status = write16(state, SIO_PDR_MON_CFG__A, 0x0000); in mpegts_configure_pins()
1258 status = write16(state, SIO_TOP_COMM_KEY__A, 0x0000); in mpegts_configure_pins()
1281 status = write16(state, SIO_BL_MODE__A, SIO_BL_MODE_CHAIN); in bl_chain_cmd()
1284 status = write16(state, SIO_BL_CHAIN_ADDR__A, rom_offset); in bl_chain_cmd()
1287 status = write16(state, SIO_BL_CHAIN_LEN__A, nr_of_elements); in bl_chain_cmd()
1290 status = write16(state, SIO_BL_ENABLE__A, SIO_BL_ENABLE_ON); in bl_chain_cmd()
1402 status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A, desired_ctrl); in dvbt_enable_ofdm_token_ring()
1432 status = write16(state, FEC_OC_SNC_MODE__A, fec_oc_snc_mode); in mpegts_stop()
1441 status = write16(state, FEC_OC_IPR_MODE__A, fec_oc_ipr_mode); in mpegts_stop()
1574 status = write16(state, IQM_AF_STDBY__A, data); in set_iqm_af()
1664 status = write16(state, SIO_CC_PWD_MODE__A, sio_cc_pwd_mode); in ctrl_power_mode()
1667 status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); in ctrl_power_mode()
1718 status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP); in power_down_dvbt()
1721 status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP); in power_down_dvbt()
1724 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP); in power_down_dvbt()
1758 status = write16(state, SCU_RAM_GPIO__A, in setoperation_mode()
1928 status = write16(state, FEC_OC_SNC_MODE__A, fec_oc_snc_mode); in mpegts_start()
1931 status = write16(state, FEC_OC_SNC_UNLOCK__A, 1); in mpegts_start()
1945 status = write16(state, FEC_OC_RCN_CTL_STEP_LO__A, 0x0000); in mpegts_dto_init()
1948 status = write16(state, FEC_OC_RCN_CTL_STEP_HI__A, 0x000C); in mpegts_dto_init()
1951 status = write16(state, FEC_OC_RCN_GAIN__A, 0x000A); in mpegts_dto_init()
1954 status = write16(state, FEC_OC_AVR_PARM_A__A, 0x0008); in mpegts_dto_init()
1957 status = write16(state, FEC_OC_AVR_PARM_B__A, 0x0006); in mpegts_dto_init()
1960 status = write16(state, FEC_OC_TMD_HI_MARGIN__A, 0x0680); in mpegts_dto_init()
1963 status = write16(state, FEC_OC_TMD_LO_MARGIN__A, 0x0080); in mpegts_dto_init()
1966 status = write16(state, FEC_OC_TMD_COUNT__A, 0x03F4); in mpegts_dto_init()
1971 status = write16(state, FEC_OC_OCR_INVERT__A, 0); in mpegts_dto_init()
1974 status = write16(state, FEC_OC_SNC_LWM__A, 2); in mpegts_dto_init()
1977 status = write16(state, FEC_OC_SNC_HWM__A, 12); in mpegts_dto_init()
2088 status = write16(state, FEC_OC_DTO_BURST_LEN__A, fec_oc_dto_burst_len); in mpegts_dto_setup()
2091 status = write16(state, FEC_OC_DTO_PERIOD__A, fec_oc_dto_period); in mpegts_dto_setup()
2094 status = write16(state, FEC_OC_DTO_MODE__A, fec_oc_dto_mode); in mpegts_dto_setup()
2097 status = write16(state, FEC_OC_FCT_MODE__A, fec_oc_fct_mode); in mpegts_dto_setup()
2100 status = write16(state, FEC_OC_MODE__A, fec_oc_reg_mode); in mpegts_dto_setup()
2103 status = write16(state, FEC_OC_IPR_MODE__A, fec_oc_reg_ipr_mode); in mpegts_dto_setup()
2111 status = write16(state, FEC_OC_TMD_INT_UPD_RATE__A, in mpegts_dto_setup()
2115 status = write16(state, FEC_OC_TMD_MODE__A, fec_oc_tmd_mode); in mpegts_dto_setup()
2152 return write16(state, FEC_OC_IPR_INVERT__A, fec_oc_reg_ipr_invert); in mpegts_configure_polarity()
2176 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_rf()
2191 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_rf()
2205 status = write16(state, SCU_RAM_AGC_KI_RED__A, data); in set_agc_rf()
2222 status = write16(state, in set_agc_rf()
2230 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI_CO__A, in set_agc_rf()
2236 status = write16(state, SCU_RAM_AGC_RF_MAX__A, in set_agc_rf()
2249 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_rf()
2262 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_rf()
2267 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI_CO__A, 0); in set_agc_rf()
2272 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI__A, in set_agc_rf()
2284 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_rf()
2293 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_rf()
2327 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_if()
2343 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_if()
2356 status = write16(state, SCU_RAM_AGC_KI_RED__A, data); in set_agc_if()
2367 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A, in set_agc_if()
2380 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_if()
2396 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_if()
2401 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A, in set_agc_if()
2414 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_if()
2423 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_if()
2431 status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MIN__A, p_agc_cfg->top); in set_agc_if()
2767 status = write16(state, SIO_HI_RA_RAM_PAR_1__A, in ConfigureI2CBridge()
2772 status = write16(state, SIO_HI_RA_RAM_PAR_2__A, in ConfigureI2CBridge()
2777 status = write16(state, SIO_HI_RA_RAM_PAR_2__A, in ConfigureI2CBridge()
2802 status = write16(state, IQM_AF_PDREF__A, p_pre_saw_cfg->reference); in set_pre_saw()
2821 status = write16(state, SIO_BL_MODE__A, SIO_BL_MODE_DIRECT); in bl_direct_cmd()
2824 status = write16(state, SIO_BL_TGT_HDR__A, blockbank); in bl_direct_cmd()
2827 status = write16(state, SIO_BL_TGT_ADDR__A, offset); in bl_direct_cmd()
2830 status = write16(state, SIO_BL_SRC_ADDR__A, rom_offset); in bl_direct_cmd()
2833 status = write16(state, SIO_BL_SRC_LEN__A, nr_of_elements); in bl_direct_cmd()
2836 status = write16(state, SIO_BL_ENABLE__A, SIO_BL_ENABLE_ON); in bl_direct_cmd()
2868 status = write16(state, IQM_AF_COMM_EXEC__A, IQM_AF_COMM_EXEC_ACTIVE); in adc_sync_measurement()
2871 status = write16(state, IQM_AF_START_LOCK__A, 1); in adc_sync_measurement()
2926 status = write16(state, IQM_AF_CLKNEG__A, clk_neg); in adc_synchronization()
3060 status = write16(state, SCU_RAM_AGC_FAST_CLP_CTRL_DELAY__A, in init_agc()
3065 status = write16(state, SCU_RAM_AGC_CLP_CTRL_MODE__A, clp_ctrl_mode); in init_agc()
3068 status = write16(state, SCU_RAM_AGC_INGAIN_TGT__A, ingain_tgt); in init_agc()
3071 status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MIN__A, ingain_tgt_min); in init_agc()
3074 status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MAX__A, ingain_tgt_max); in init_agc()
3077 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MIN__A, in init_agc()
3081 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A, in init_agc()
3085 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI__A, 0); in init_agc()
3088 status = write16(state, SCU_RAM_AGC_IF_IACCU_LO__A, 0); in init_agc()
3091 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI__A, 0); in init_agc()
3094 status = write16(state, SCU_RAM_AGC_RF_IACCU_LO__A, 0); in init_agc()
3097 status = write16(state, SCU_RAM_AGC_CLP_SUM_MAX__A, clp_sum_max); in init_agc()
3100 status = write16(state, SCU_RAM_AGC_SNS_SUM_MAX__A, sns_sum_max); in init_agc()
3104 status = write16(state, SCU_RAM_AGC_KI_INNERGAIN_MIN__A, in init_agc()
3108 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT__A, in init_agc()
3112 status = write16(state, SCU_RAM_AGC_CLP_CYCLEN__A, clp_cyclen); in init_agc()
3116 status = write16(state, SCU_RAM_AGC_RF_SNS_DEV_MAX__A, 1023); in init_agc()
3119 status = write16(state, SCU_RAM_AGC_RF_SNS_DEV_MIN__A, (u16) -1023); in init_agc()
3122 status = write16(state, SCU_RAM_AGC_FAST_SNS_CTRL_DELAY__A, 50); in init_agc()
3126 status = write16(state, SCU_RAM_AGC_KI_MAXMINGAIN_TH__A, 20); in init_agc()
3129 status = write16(state, SCU_RAM_AGC_CLP_SUM_MIN__A, clp_sum_min); in init_agc()
3132 status = write16(state, SCU_RAM_AGC_SNS_SUM_MIN__A, sns_sum_min); in init_agc()
3135 status = write16(state, SCU_RAM_AGC_CLP_DIR_TO__A, clp_dir_to); in init_agc()
3138 status = write16(state, SCU_RAM_AGC_SNS_DIR_TO__A, sns_dir_to); in init_agc()
3141 status = write16(state, SCU_RAM_AGC_KI_MINGAIN__A, 0x7fff); in init_agc()
3144 status = write16(state, SCU_RAM_AGC_KI_MAXGAIN__A, 0x0); in init_agc()
3147 status = write16(state, SCU_RAM_AGC_KI_MIN__A, 0x0117); in init_agc()
3150 status = write16(state, SCU_RAM_AGC_KI_MAX__A, 0x0657); in init_agc()
3153 status = write16(state, SCU_RAM_AGC_CLP_SUM__A, 0); in init_agc()
3156 status = write16(state, SCU_RAM_AGC_CLP_CYCCNT__A, 0); in init_agc()
3159 status = write16(state, SCU_RAM_AGC_CLP_DIR_WD__A, 0); in init_agc()
3162 status = write16(state, SCU_RAM_AGC_CLP_DIR_STP__A, 1); in init_agc()
3165 status = write16(state, SCU_RAM_AGC_SNS_SUM__A, 0); in init_agc()
3168 status = write16(state, SCU_RAM_AGC_SNS_CYCCNT__A, 0); in init_agc()
3171 status = write16(state, SCU_RAM_AGC_SNS_DIR_WD__A, 0); in init_agc()
3174 status = write16(state, SCU_RAM_AGC_SNS_DIR_STP__A, 1); in init_agc()
3177 status = write16(state, SCU_RAM_AGC_SNS_CYCLEN__A, 500); in init_agc()
3180 status = write16(state, SCU_RAM_AGC_KI_CYCLEN__A, 500); in init_agc()
3195 status = write16(state, SCU_RAM_AGC_KI__A, data); in init_agc()
3208 status = write16(state, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A, 0); in dvbtqam_get_acc_pkt_err()
3253 status = write16(state, OFDM_SC_RA_RAM_CMD_ADDR__A, subcmd); in dvbt_sc_command()
3272 status |= write16(state, OFDM_SC_RA_RAM_PARAM1__A, param1); in dvbt_sc_command()
3276 status |= write16(state, OFDM_SC_RA_RAM_PARAM0__A, param0); in dvbt_sc_command()
3281 status |= write16(state, OFDM_SC_RA_RAM_CMD__A, cmd); in dvbt_sc_command()
3356 status = write16(state, IQM_CF_BYPASSDET__A, 0); in dvbt_ctrl_set_inc_enable()
3358 status = write16(state, IQM_CF_BYPASSDET__A, 1); in dvbt_ctrl_set_inc_enable()
3373 status = write16(state, OFDM_SC_RA_RAM_FR_THRES_8K__A, in dvbt_ctrl_set_fr_enable()
3377 status = write16(state, OFDM_SC_RA_RAM_FR_THRES_8K__A, 0); in dvbt_ctrl_set_fr_enable()
3413 status = write16(state, OFDM_SC_RA_RAM_ECHO_THRES__A, data); in dvbt_ctrl_set_echo_threshold()
3435 status = write16(state, SCU_RAM_FEC_PRE_RS_BER_FILTER_SH__A, in dvbt_ctrl_set_sqi_speed()
3475 status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MAX__A, in dvbt_activate_presets()
3521 status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP); in set_dvbt_standard()
3524 status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP); in set_dvbt_standard()
3527 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP); in set_dvbt_standard()
3533 status = write16(state, IQM_AF_UPD_SEL__A, 1); in set_dvbt_standard()
3537 status = write16(state, IQM_AF_CLP_LEN__A, 0); in set_dvbt_standard()
3541 status = write16(state, IQM_AF_SNS_LEN__A, 0); in set_dvbt_standard()
3545 status = write16(state, IQM_AF_AMUX__A, IQM_AF_AMUX_SIGNAL2ADC); in set_dvbt_standard()
3552 status = write16(state, IQM_AF_AGC_RF__A, 0); in set_dvbt_standard()
3557 status = write16(state, IQM_AF_INC_LCT__A, 0); /* crunch in IQM_CF */ in set_dvbt_standard()
3560 status = write16(state, IQM_CF_DET_LCT__A, 0); /* detect in IQM_CF */ in set_dvbt_standard()
3563 status = write16(state, IQM_CF_WND_LEN__A, 3); /* peak detector window length */ in set_dvbt_standard()
3567 status = write16(state, IQM_RC_STRETCH__A, 16); in set_dvbt_standard()
3570 status = write16(state, IQM_CF_OUT_ENA__A, 0x4); /* enable output 2 */ in set_dvbt_standard()
3573 status = write16(state, IQM_CF_DS_ENA__A, 0x4); /* decimate output 2 */ in set_dvbt_standard()
3576 status = write16(state, IQM_CF_SCALE__A, 1600); in set_dvbt_standard()
3579 status = write16(state, IQM_CF_SCALE_SH__A, 0); in set_dvbt_standard()
3584 status = write16(state, IQM_AF_CLP_TH__A, 448); in set_dvbt_standard()
3587 status = write16(state, IQM_CF_DATATH__A, 495); /* crunching threshold */ in set_dvbt_standard()
3596 status = write16(state, IQM_CF_PKDTH__A, 2); /* peak detector threshold */ in set_dvbt_standard()
3599 status = write16(state, IQM_CF_POW_MEAS_LEN__A, 2); in set_dvbt_standard()
3603 status = write16(state, IQM_CF_COMM_INT_MSK__A, 1); in set_dvbt_standard()
3606 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_ACTIVE); in set_dvbt_standard()
3619 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); in set_dvbt_standard()
3635 status = write16(state, OFDM_SC_RA_RAM_CONFIG__A, data); in set_dvbt_standard()
3640 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in set_dvbt_standard()
3646 status = write16(state, SCU_RAM_AGC_FAST_CLP_CTRL_DELAY__A, in set_dvbt_standard()
3654 status = write16(state, OFDM_SC_RA_RAM_BE_OPT_DELAY__A, 1); in set_dvbt_standard()
3657 status = write16(state, OFDM_SC_RA_RAM_BE_OPT_INIT_DELAY__A, 2); in set_dvbt_standard()
3663 status = write16(state, FEC_DI_INPUT_CTL__A, 1); /* OFDM input */ in set_dvbt_standard()
3669 status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, 0x400); in set_dvbt_standard()
3673 status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, 0x1000); in set_dvbt_standard()
3677 status = write16(state, FEC_RS_MEASUREMENT_PRESCALE__A, 0x0001); in set_dvbt_standard()
3721 status = write16(state, FEC_COMM_EXEC__A, FEC_COMM_EXEC_ACTIVE); in dvbt_start()
3760 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); in set_dvbt()
3765 status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP); in set_dvbt()
3768 status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP); in set_dvbt()
3774 status = write16(state, OFDM_CP_COMM_EXEC__A, OFDM_CP_COMM_EXEC_STOP); in set_dvbt()
3873 status = write16(state, OFDM_EC_SB_PRIOR__A, OFDM_EC_SB_PRIOR_HI); in set_dvbt()
3920 status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, in set_dvbt()
3925 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A, in set_dvbt()
3929 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A, in set_dvbt()
3933 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A, in set_dvbt()
3937 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A, in set_dvbt()
3944 status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, in set_dvbt()
3949 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A, in set_dvbt()
3953 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A, in set_dvbt()
3957 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A, in set_dvbt()
3961 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A, in set_dvbt()
3968 status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, in set_dvbt()
3973 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A, in set_dvbt()
3977 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A, in set_dvbt()
3981 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A, in set_dvbt()
3985 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A, in set_dvbt()
4041 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in set_dvbt()
4046 status = write16(state, OFDM_SC_COMM_STATE__A, 0); in set_dvbt()
4049 status = write16(state, OFDM_SC_COMM_EXEC__A, 1); in set_dvbt()
4162 status = write16(state, QAM_COMM_EXEC__A, QAM_COMM_EXEC_STOP); in power_down_qam()
4255 status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, fec_rs_period); in set_qam_measurement()
4258 status = write16(state, FEC_RS_MEASUREMENT_PRESCALE__A, in set_qam_measurement()
4262 status = write16(state, FEC_OC_SNC_FAIL_PERIOD__A, fec_rs_period); in set_qam_measurement()
4276 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 13517); in set_qam16()
4279 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 13517); in set_qam16()
4282 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 13517); in set_qam16()
4285 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 13517); in set_qam16()
4288 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 13517); in set_qam16()
4291 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 13517); in set_qam16()
4295 status = write16(state, QAM_DQ_QUAL_FUN0__A, 2); in set_qam16()
4298 status = write16(state, QAM_DQ_QUAL_FUN1__A, 2); in set_qam16()
4301 status = write16(state, QAM_DQ_QUAL_FUN2__A, 2); in set_qam16()
4304 status = write16(state, QAM_DQ_QUAL_FUN3__A, 2); in set_qam16()
4307 status = write16(state, QAM_DQ_QUAL_FUN4__A, 2); in set_qam16()
4310 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam16()
4314 status = write16(state, QAM_SY_SYNC_HWM__A, 5); in set_qam16()
4317 status = write16(state, QAM_SY_SYNC_AWM__A, 4); in set_qam16()
4320 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam16()
4325 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam16()
4331 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam16()
4334 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam16()
4337 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam16()
4340 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam16()
4343 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam16()
4346 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam16()
4349 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam16()
4352 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam16()
4356 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam16()
4359 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 20); in set_qam16()
4362 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 80); in set_qam16()
4365 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam16()
4368 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 20); in set_qam16()
4371 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 50); in set_qam16()
4374 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam16()
4377 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 16); in set_qam16()
4380 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 32); in set_qam16()
4383 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam16()
4386 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam16()
4389 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 10); in set_qam16()
4396 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 140); in set_qam16()
4399 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 50); in set_qam16()
4402 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 95); in set_qam16()
4405 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 120); in set_qam16()
4408 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 230); in set_qam16()
4411 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 105); in set_qam16()
4415 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam16()
4418 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); in set_qam16()
4421 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 24); in set_qam16()
4428 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 16); in set_qam16()
4431 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 220); in set_qam16()
4434 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 25); in set_qam16()
4437 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 6); in set_qam16()
4440 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -24); in set_qam16()
4443 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -65); in set_qam16()
4446 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -127); in set_qam16()
4471 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 6707); in set_qam32()
4474 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 6707); in set_qam32()
4477 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 6707); in set_qam32()
4480 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 6707); in set_qam32()
4483 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 6707); in set_qam32()
4486 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 6707); in set_qam32()
4491 status = write16(state, QAM_DQ_QUAL_FUN0__A, 3); in set_qam32()
4494 status = write16(state, QAM_DQ_QUAL_FUN1__A, 3); in set_qam32()
4497 status = write16(state, QAM_DQ_QUAL_FUN2__A, 3); in set_qam32()
4500 status = write16(state, QAM_DQ_QUAL_FUN3__A, 3); in set_qam32()
4503 status = write16(state, QAM_DQ_QUAL_FUN4__A, 3); in set_qam32()
4506 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam32()
4510 status = write16(state, QAM_SY_SYNC_HWM__A, 6); in set_qam32()
4513 status = write16(state, QAM_SY_SYNC_AWM__A, 5); in set_qam32()
4516 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam32()
4522 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam32()
4530 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam32()
4533 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam32()
4536 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam32()
4539 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam32()
4542 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam32()
4545 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam32()
4548 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam32()
4551 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam32()
4555 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam32()
4558 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 20); in set_qam32()
4561 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 80); in set_qam32()
4564 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam32()
4567 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 20); in set_qam32()
4570 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 50); in set_qam32()
4573 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam32()
4576 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 16); in set_qam32()
4579 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 16); in set_qam32()
4582 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam32()
4585 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam32()
4588 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 0); in set_qam32()
4595 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 90); in set_qam32()
4598 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 50); in set_qam32()
4601 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); in set_qam32()
4604 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 100); in set_qam32()
4607 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 170); in set_qam32()
4610 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 100); in set_qam32()
4614 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam32()
4617 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); in set_qam32()
4620 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 10); in set_qam32()
4627 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 12); in set_qam32()
4630 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 140); in set_qam32()
4633 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) -8); in set_qam32()
4636 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) -16); in set_qam32()
4639 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -26); in set_qam32()
4642 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -56); in set_qam32()
4645 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -86); in set_qam32()
4666 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 13336); in set_qam64()
4669 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 12618); in set_qam64()
4672 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 11988); in set_qam64()
4675 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 13809); in set_qam64()
4678 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 13809); in set_qam64()
4681 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 15609); in set_qam64()
4686 status = write16(state, QAM_DQ_QUAL_FUN0__A, 4); in set_qam64()
4689 status = write16(state, QAM_DQ_QUAL_FUN1__A, 4); in set_qam64()
4692 status = write16(state, QAM_DQ_QUAL_FUN2__A, 4); in set_qam64()
4695 status = write16(state, QAM_DQ_QUAL_FUN3__A, 4); in set_qam64()
4698 status = write16(state, QAM_DQ_QUAL_FUN4__A, 3); in set_qam64()
4701 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam64()
4705 status = write16(state, QAM_SY_SYNC_HWM__A, 5); in set_qam64()
4708 status = write16(state, QAM_SY_SYNC_AWM__A, 4); in set_qam64()
4711 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam64()
4716 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam64()
4724 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam64()
4727 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam64()
4730 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam64()
4733 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam64()
4736 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam64()
4739 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam64()
4742 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam64()
4745 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam64()
4749 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam64()
4752 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 30); in set_qam64()
4755 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 100); in set_qam64()
4758 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam64()
4761 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 30); in set_qam64()
4764 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 50); in set_qam64()
4767 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam64()
4770 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 25); in set_qam64()
4773 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 48); in set_qam64()
4776 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam64()
4779 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam64()
4782 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 10); in set_qam64()
4789 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 100); in set_qam64()
4792 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 60); in set_qam64()
4795 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); in set_qam64()
4798 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 110); in set_qam64()
4801 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 200); in set_qam64()
4804 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 95); in set_qam64()
4808 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam64()
4811 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); in set_qam64()
4814 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 15); in set_qam64()
4821 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 12); in set_qam64()
4824 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 141); in set_qam64()
4827 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 7); in set_qam64()
4830 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 0); in set_qam64()
4833 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -15); in set_qam64()
4836 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -45); in set_qam64()
4839 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -80); in set_qam64()
4861 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 6564); in set_qam128()
4864 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 6598); in set_qam128()
4867 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 6394); in set_qam128()
4870 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 6409); in set_qam128()
4873 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 6656); in set_qam128()
4876 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 7238); in set_qam128()
4881 status = write16(state, QAM_DQ_QUAL_FUN0__A, 6); in set_qam128()
4884 status = write16(state, QAM_DQ_QUAL_FUN1__A, 6); in set_qam128()
4887 status = write16(state, QAM_DQ_QUAL_FUN2__A, 6); in set_qam128()
4890 status = write16(state, QAM_DQ_QUAL_FUN3__A, 6); in set_qam128()
4893 status = write16(state, QAM_DQ_QUAL_FUN4__A, 5); in set_qam128()
4896 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam128()
4900 status = write16(state, QAM_SY_SYNC_HWM__A, 6); in set_qam128()
4903 status = write16(state, QAM_SY_SYNC_AWM__A, 5); in set_qam128()
4906 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam128()
4913 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam128()
4921 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam128()
4924 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam128()
4927 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam128()
4930 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam128()
4933 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam128()
4936 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam128()
4939 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam128()
4942 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam128()
4946 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam128()
4949 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 40); in set_qam128()
4952 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 120); in set_qam128()
4955 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam128()
4958 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 40); in set_qam128()
4961 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 60); in set_qam128()
4964 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam128()
4967 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 25); in set_qam128()
4970 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 64); in set_qam128()
4973 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam128()
4976 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam128()
4979 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 0); in set_qam128()
4986 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 50); in set_qam128()
4989 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 60); in set_qam128()
4992 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); in set_qam128()
4995 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 100); in set_qam128()
4998 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 140); in set_qam128()
5001 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 100); in set_qam128()
5005 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam128()
5008 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 5); in set_qam128()
5012 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 12); in set_qam128()
5018 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 8); in set_qam128()
5021 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 65); in set_qam128()
5024 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 5); in set_qam128()
5027 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 3); in set_qam128()
5030 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -1); in set_qam128()
5033 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -12); in set_qam128()
5036 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -23); in set_qam128()
5058 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 11502); in set_qam256()
5061 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 12084); in set_qam256()
5064 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 12543); in set_qam256()
5067 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 12931); in set_qam256()
5070 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 13629); in set_qam256()
5073 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 15385); in set_qam256()
5078 status = write16(state, QAM_DQ_QUAL_FUN0__A, 8); in set_qam256()
5081 status = write16(state, QAM_DQ_QUAL_FUN1__A, 8); in set_qam256()
5084 status = write16(state, QAM_DQ_QUAL_FUN2__A, 8); in set_qam256()
5087 status = write16(state, QAM_DQ_QUAL_FUN3__A, 8); in set_qam256()
5090 status = write16(state, QAM_DQ_QUAL_FUN4__A, 6); in set_qam256()
5093 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam256()
5097 status = write16(state, QAM_SY_SYNC_HWM__A, 5); in set_qam256()
5100 status = write16(state, QAM_SY_SYNC_AWM__A, 4); in set_qam256()
5103 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam256()
5109 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam256()
5117 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam256()
5120 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam256()
5123 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam256()
5126 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam256()
5129 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam256()
5132 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam256()
5135 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam256()
5138 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam256()
5142 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam256()
5145 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 50); in set_qam256()
5148 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 250); in set_qam256()
5151 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam256()
5154 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 50); in set_qam256()
5157 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 125); in set_qam256()
5160 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam256()
5163 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 25); in set_qam256()
5166 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 48); in set_qam256()
5169 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam256()
5172 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam256()
5175 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 10); in set_qam256()
5182 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 50); in set_qam256()
5185 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 60); in set_qam256()
5188 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); in set_qam256()
5191 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 100); in set_qam256()
5194 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 150); in set_qam256()
5197 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 110); in set_qam256()
5201 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam256()
5204 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); in set_qam256()
5207 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 12); in set_qam256()
5214 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 8); in set_qam256()
5217 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 74); in set_qam256()
5220 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 18); in set_qam256()
5223 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 13); in set_qam256()
5226 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) 7); in set_qam256()
5229 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) 0); in set_qam256()
5232 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -8); in set_qam256()
5254 status = write16(state, QAM_COMM_EXEC__A, QAM_COMM_EXEC_STOP); in qam_reset_qam()
5294 status = write16(state, IQM_FD_RATESEL__A, ratesel); in qam_set_symbolrate()
5328 status = write16(state, QAM_LC_SYMBOL_FREQ__A, (u16) lc_symb_rate); in qam_set_symbolrate()
5458 status = write16(state, FEC_DI_COMM_EXEC__A, FEC_DI_COMM_EXEC_STOP); in set_qam()
5461 status = write16(state, FEC_RS_COMM_EXEC__A, FEC_RS_COMM_EXEC_STOP); in set_qam()
5559 status = write16(state, IQM_CF_SCALE_SH__A, IQM_CF_SCALE_SH__PRE); in set_qam()
5562 status = write16(state, QAM_SY_TIMEOUT__A, QAM_SY_TIMEOUT__PRE); in set_qam()
5567 status = write16(state, QAM_LC_RATE_LIMIT__A, 3); in set_qam()
5570 status = write16(state, QAM_LC_LPF_FACTORP__A, 4); in set_qam()
5573 status = write16(state, QAM_LC_LPF_FACTORI__A, 4); in set_qam()
5576 status = write16(state, QAM_LC_MODE__A, 7); in set_qam()
5580 status = write16(state, QAM_LC_QUAL_TAB0__A, 1); in set_qam()
5583 status = write16(state, QAM_LC_QUAL_TAB1__A, 1); in set_qam()
5586 status = write16(state, QAM_LC_QUAL_TAB2__A, 1); in set_qam()
5589 status = write16(state, QAM_LC_QUAL_TAB3__A, 1); in set_qam()
5592 status = write16(state, QAM_LC_QUAL_TAB4__A, 2); in set_qam()
5595 status = write16(state, QAM_LC_QUAL_TAB5__A, 2); in set_qam()
5598 status = write16(state, QAM_LC_QUAL_TAB6__A, 2); in set_qam()
5601 status = write16(state, QAM_LC_QUAL_TAB8__A, 2); in set_qam()
5604 status = write16(state, QAM_LC_QUAL_TAB9__A, 2); in set_qam()
5607 status = write16(state, QAM_LC_QUAL_TAB10__A, 2); in set_qam()
5610 status = write16(state, QAM_LC_QUAL_TAB12__A, 2); in set_qam()
5613 status = write16(state, QAM_LC_QUAL_TAB15__A, 3); in set_qam()
5616 status = write16(state, QAM_LC_QUAL_TAB16__A, 3); in set_qam()
5619 status = write16(state, QAM_LC_QUAL_TAB20__A, 4); in set_qam()
5622 status = write16(state, QAM_LC_QUAL_TAB25__A, 4); in set_qam()
5627 status = write16(state, QAM_SY_SP_INV__A, in set_qam()
5633 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); in set_qam()
5663 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in set_qam()
5678 status = write16(state, FEC_COMM_EXEC__A, FEC_COMM_EXEC_ACTIVE); in set_qam()
5681 status = write16(state, QAM_COMM_EXEC__A, QAM_COMM_EXEC_ACTIVE); in set_qam()
5684 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_ACTIVE); in set_qam()
5730 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP); in set_qam_standard()
5733 status = write16(state, IQM_AF_AMUX__A, IQM_AF_AMUX_SIGNAL2ADC); in set_qam_standard()
5764 status = write16(state, IQM_CF_OUT_ENA__A, 1 << IQM_CF_OUT_ENA_QAM__B); in set_qam_standard()
5767 status = write16(state, IQM_CF_SYMMETRIC__A, 0); in set_qam_standard()
5770 status = write16(state, IQM_CF_MIDTAP__A, in set_qam_standard()
5775 status = write16(state, IQM_RC_STRETCH__A, 21); in set_qam_standard()
5778 status = write16(state, IQM_AF_CLP_LEN__A, 0); in set_qam_standard()
5781 status = write16(state, IQM_AF_CLP_TH__A, 448); in set_qam_standard()
5784 status = write16(state, IQM_AF_SNS_LEN__A, 0); in set_qam_standard()
5787 status = write16(state, IQM_CF_POW_MEAS_LEN__A, 0); in set_qam_standard()
5791 status = write16(state, IQM_FS_ADJ_SEL__A, 1); in set_qam_standard()
5794 status = write16(state, IQM_RC_ADJ_SEL__A, 1); in set_qam_standard()
5797 status = write16(state, IQM_CF_ADJ_SEL__A, 1); in set_qam_standard()
5800 status = write16(state, IQM_AF_UPD_SEL__A, 0); in set_qam_standard()
5805 status = write16(state, IQM_CF_CLP_VAL__A, 500); in set_qam_standard()
5808 status = write16(state, IQM_CF_DATATH__A, 1000); in set_qam_standard()
5811 status = write16(state, IQM_CF_BYPASSDET__A, 1); in set_qam_standard()
5814 status = write16(state, IQM_CF_DET_LCT__A, 0); in set_qam_standard()
5817 status = write16(state, IQM_CF_WND_LEN__A, 1); in set_qam_standard()
5820 status = write16(state, IQM_CF_PKDTH__A, 1); in set_qam_standard()
5823 status = write16(state, IQM_AF_INC_BYPASS__A, 1); in set_qam_standard()
5831 status = write16(state, IQM_AF_START_LOCK__A, 0x01); in set_qam_standard()
5841 status = write16(state, SCU_RAM_QAM_FSM_STEP_PERIOD__A, 2000); in set_qam_standard()
5846 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); in set_qam_standard()
5869 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in set_qam_standard()
5883 status = write16(state, SCU_RAM_GPIO__A, in write_gpio()
5889 status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); in write_gpio()
5896 status = write16(state, SIO_PDR_SMA_TX_CFG__A, in write_gpio()
5910 status = write16(state, SIO_PDR_UIO_OUT_LO__A, value); in write_gpio()
5916 status = write16(state, SIO_PDR_SMA_RX_CFG__A, in write_gpio()
5930 status = write16(state, SIO_PDR_UIO_OUT_LO__A, value); in write_gpio()
5936 status = write16(state, SIO_PDR_GPIO_CFG__A, in write_gpio()
5950 status = write16(state, SIO_PDR_UIO_OUT_LO__A, value); in write_gpio()
5956 status = write16(state, SIO_TOP_COMM_KEY__A, 0x0000); in write_gpio()
6036 status = write16(state, SIO_CC_PWD_MODE__A, in power_down_device()
6040 status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); in power_down_device()
6068 status = write16(state, SIO_CC_SOFT_RST__A, in init_drxk()
6074 status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); in init_drxk()
6113 status = write16(state, SCU_RAM_GPIO__A, in init_drxk()
6125 status = write16(state, AUD_COMM_EXEC__A, AUD_COMM_EXEC_STOP); in init_drxk()
6128 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_STOP); in init_drxk()
6133 status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A, in init_drxk()
6139 status = write16(state, SIO_BL_COMM_EXEC__A, in init_drxk()
6155 status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A, in init_drxk()
6161 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in init_drxk()
6186 status = write16(state, SCU_RAM_DRIVER_VER_HI__A, in init_drxk()
6195 status = write16(state, SCU_RAM_DRIVER_VER_LO__A, in init_drxk()
6215 status = write16(state, SCU_RAM_DRIVER_DEBUG__A, 0); in init_drxk()
6221 status = write16(state, FEC_COMM_EXEC__A, FEC_COMM_EXEC_STOP); in init_drxk()
6613 write16(state, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A, 0); in drxk_get_stats()