251 	int status;  in i2c_write()  local
262 	status = drxk_i2c_transfer(state, &msg, 1);  in i2c_write()
263 	if (status >= 0 && status != 1)  in i2c_write()
264 		status = -EIO;  in i2c_write()
266 	if (status < 0)  in i2c_write()
269 	return status;  in i2c_write()
275 	int status;  in i2c_read()  local
283 	status = drxk_i2c_transfer(state, msgs, 2);  in i2c_read()
284 	if (status != 2) {  in i2c_read()
287 		if (status >= 0)  in i2c_read()
288 			status = -EIO;  in i2c_read()
291 		return status;  in i2c_read()
308 	int status;  in read16_flags()  local
326 	status = i2c_read(state, adr, mm1, len, mm2, 2);  in read16_flags()
327 	if (status < 0)  in read16_flags()
328 		return status;  in read16_flags()
342 	int status;  in read32_flags()  local
360 	status = i2c_read(state, adr, mm1, len, mm2, 4);  in read32_flags()
361 	if (status < 0)  in read32_flags()
362 		return status;  in read32_flags()
438 	int status = 0, blk_size = block_size;  in write_block()  local
474 		status = i2c_write(state, state->demod_address,  in write_block()
476 		if (status < 0) {  in write_block()
485 	return status;  in write_block()
494 	int status;  in power_up_device()  local
500 	status = i2c_read1(state, state->demod_address, &data);  in power_up_device()
501 	if (status < 0) {  in power_up_device()
504 			status = i2c_write(state, state->demod_address,  in power_up_device()
508 			if (status < 0)  in power_up_device()
510 			status = i2c_read1(state, state->demod_address,  in power_up_device()
512 		} while (status < 0 &&  in power_up_device()
514 		if (status < 0 && retry_count >= DRXK_MAX_RETRIES_POWERUP)  in power_up_device()
519 	status = write16(state, SIO_CC_PWD_MODE__A, SIO_CC_PWD_MODE_LEVEL_NONE);  in power_up_device()
520 	if (status < 0)  in power_up_device()
522 	status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY);  in power_up_device()
523 	if (status < 0)  in power_up_device()
526 	status = write16(state, SIO_CC_PLL_LOCK__A, 1);  in power_up_device()
527 	if (status < 0)  in power_up_device()
533 	if (status < 0)  in power_up_device()
534 		pr_err("Error %d on %s\n", status, __func__);  in power_up_device()
536 	return status;  in power_up_device()
777 	int status = 0;  in drxx_open()  local
784 	status = write16(state, SCU_RAM_GPIO__A,  in drxx_open()
786 	if (status < 0)  in drxx_open()
789 	status = read16(state, SIO_TOP_COMM_KEY__A, &key);  in drxx_open()
790 	if (status < 0)  in drxx_open()
792 	status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY);  in drxx_open()
793 	if (status < 0)  in drxx_open()
795 	status = read32(state, SIO_TOP_JTAGID_LO__A, &jtag);  in drxx_open()
796 	if (status < 0)  in drxx_open()
798 	status = read16(state, SIO_PDR_UIO_IN_HI__A, &bid);  in drxx_open()
799 	if (status < 0)  in drxx_open()
801 	status = write16(state, SIO_TOP_COMM_KEY__A, key);  in drxx_open()
803 	if (status < 0)  in drxx_open()
804 		pr_err("Error %d on %s\n", status, __func__);  in drxx_open()
805 	return status;  in drxx_open()
812 	int status;  in get_device_capabilities()  local
819 	status = write16(state, SCU_RAM_GPIO__A,  in get_device_capabilities()
821 	if (status < 0)  in get_device_capabilities()
823 	status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY);  in get_device_capabilities()
824 	if (status < 0)  in get_device_capabilities()
826 	status = read16(state, SIO_PDR_OHW_CFG__A, &sio_pdr_ohw_cfg);  in get_device_capabilities()
827 	if (status < 0)  in get_device_capabilities()
829 	status = write16(state, SIO_TOP_COMM_KEY__A, 0x0000);  in get_device_capabilities()
830 	if (status < 0)  in get_device_capabilities()
857 	status = read32(state, SIO_TOP_JTAGID_LO__A, &sio_top_jtagid_lo);  in get_device_capabilities()
858 	if (status < 0)  in get_device_capabilities()
879 		status = -EINVAL;  in get_device_capabilities()
991 		status = -EINVAL;  in get_device_capabilities()
1001 	if (status < 0)  in get_device_capabilities()
1002 		pr_err("Error %d on %s\n", status, __func__);  in get_device_capabilities()
1005 	return status;  in get_device_capabilities()
1010 	int status;  in hi_command()  local
1016 	status = write16(state, SIO_HI_RA_RAM_CMD__A, cmd);  in hi_command()
1017 	if (status < 0)  in hi_command()
1035 			status = read16(state, SIO_HI_RA_RAM_CMD__A,  in hi_command()
1037 		} while ((status < 0) && (retry_count < DRXK_MAX_RETRIES)  in hi_command()
1039 		if (status < 0)  in hi_command()
1041 		status = read16(state, SIO_HI_RA_RAM_RES__A, p_result);  in hi_command()
1044 	if (status < 0)  in hi_command()
1045 		pr_err("Error %d on %s\n", status, __func__);  in hi_command()
1047 	return status;  in hi_command()
1052 	int status;  in hi_cfg_command()  local
1058 	status = write16(state, SIO_HI_RA_RAM_PAR_6__A,  in hi_cfg_command()
1060 	if (status < 0)  in hi_cfg_command()
1062 	status = write16(state, SIO_HI_RA_RAM_PAR_5__A,  in hi_cfg_command()
1064 	if (status < 0)  in hi_cfg_command()
1066 	status = write16(state, SIO_HI_RA_RAM_PAR_4__A,  in hi_cfg_command()
1068 	if (status < 0)  in hi_cfg_command()
1070 	status = write16(state, SIO_HI_RA_RAM_PAR_3__A,  in hi_cfg_command()
1072 	if (status < 0)  in hi_cfg_command()
1074 	status = write16(state, SIO_HI_RA_RAM_PAR_2__A,  in hi_cfg_command()
1076 	if (status < 0)  in hi_cfg_command()
1078 	status = write16(state, SIO_HI_RA_RAM_PAR_1__A,  in hi_cfg_command()
1080 	if (status < 0)  in hi_cfg_command()
1082 	status = hi_command(state, SIO_HI_RA_RAM_CMD_CONFIG, NULL);  in hi_cfg_command()
1083 	if (status < 0)  in hi_cfg_command()
1089 	if (status < 0)  in hi_cfg_command()
1090 		pr_err("Error %d on %s\n", status, __func__);  in hi_cfg_command()
1091 	return status;  in hi_cfg_command()
1108 	int status = -1;  in mpegts_configure_pins()  local
1118 	status = write16(state, SCU_RAM_GPIO__A,  in mpegts_configure_pins()
1120 	if (status < 0)  in mpegts_configure_pins()
1124 	status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY);  in mpegts_configure_pins()
1125 	if (status < 0)  in mpegts_configure_pins()
1130 		status = write16(state, SIO_PDR_MSTRT_CFG__A, 0x0000);  in mpegts_configure_pins()
1131 		if (status < 0)  in mpegts_configure_pins()
1133 		status = write16(state, SIO_PDR_MERR_CFG__A, 0x0000);  in mpegts_configure_pins()
1134 		if (status < 0)  in mpegts_configure_pins()
1136 		status = write16(state, SIO_PDR_MCLK_CFG__A, 0x0000);  in mpegts_configure_pins()
1137 		if (status < 0)  in mpegts_configure_pins()
1139 		status = write16(state, SIO_PDR_MVAL_CFG__A, 0x0000);  in mpegts_configure_pins()
1140 		if (status < 0)  in mpegts_configure_pins()
1142 		status = write16(state, SIO_PDR_MD0_CFG__A, 0x0000);  in mpegts_configure_pins()
1143 		if (status < 0)  in mpegts_configure_pins()
1145 		status = write16(state, SIO_PDR_MD1_CFG__A, 0x0000);  in mpegts_configure_pins()
1146 		if (status < 0)  in mpegts_configure_pins()
1148 		status = write16(state, SIO_PDR_MD2_CFG__A, 0x0000);  in mpegts_configure_pins()
1149 		if (status < 0)  in mpegts_configure_pins()
1151 		status = write16(state, SIO_PDR_MD3_CFG__A, 0x0000);  in mpegts_configure_pins()
1152 		if (status < 0)  in mpegts_configure_pins()
1154 		status = write16(state, SIO_PDR_MD4_CFG__A, 0x0000);  in mpegts_configure_pins()
1155 		if (status < 0)  in mpegts_configure_pins()
1157 		status = write16(state, SIO_PDR_MD5_CFG__A, 0x0000);  in mpegts_configure_pins()
1158 		if (status < 0)  in mpegts_configure_pins()
1160 		status = write16(state, SIO_PDR_MD6_CFG__A, 0x0000);  in mpegts_configure_pins()
1161 		if (status < 0)  in mpegts_configure_pins()
1163 		status = write16(state, SIO_PDR_MD7_CFG__A, 0x0000);  in mpegts_configure_pins()
1164 		if (status < 0)  in mpegts_configure_pins()
1175 		status = write16(state, SIO_PDR_MSTRT_CFG__A, sio_pdr_mdx_cfg);  in mpegts_configure_pins()
1176 		if (status < 0)  in mpegts_configure_pins()
1182 		status = write16(state, SIO_PDR_MERR_CFG__A, err_cfg);  in mpegts_configure_pins()
1183 		if (status < 0)  in mpegts_configure_pins()
1185 		status = write16(state, SIO_PDR_MVAL_CFG__A, err_cfg);  in mpegts_configure_pins()
1186 		if (status < 0)  in mpegts_configure_pins()
1191 			status = write16(state, SIO_PDR_MD1_CFG__A,  in mpegts_configure_pins()
1193 			if (status < 0)  in mpegts_configure_pins()
1195 			status = write16(state, SIO_PDR_MD2_CFG__A,  in mpegts_configure_pins()
1197 			if (status < 0)  in mpegts_configure_pins()
1199 			status = write16(state, SIO_PDR_MD3_CFG__A,  in mpegts_configure_pins()
1201 			if (status < 0)  in mpegts_configure_pins()
1203 			status = write16(state, SIO_PDR_MD4_CFG__A,  in mpegts_configure_pins()
1205 			if (status < 0)  in mpegts_configure_pins()
1207 			status = write16(state, SIO_PDR_MD5_CFG__A,  in mpegts_configure_pins()
1209 			if (status < 0)  in mpegts_configure_pins()
1211 			status = write16(state, SIO_PDR_MD6_CFG__A,  in mpegts_configure_pins()
1213 			if (status < 0)  in mpegts_configure_pins()
1215 			status = write16(state, SIO_PDR_MD7_CFG__A,  in mpegts_configure_pins()
1217 			if (status < 0)  in mpegts_configure_pins()
1224 			status = write16(state, SIO_PDR_MD1_CFG__A, 0x0000);  in mpegts_configure_pins()
1225 			if (status < 0)  in mpegts_configure_pins()
1227 			status = write16(state, SIO_PDR_MD2_CFG__A, 0x0000);  in mpegts_configure_pins()
1228 			if (status < 0)  in mpegts_configure_pins()
1230 			status = write16(state, SIO_PDR_MD3_CFG__A, 0x0000);  in mpegts_configure_pins()
1231 			if (status < 0)  in mpegts_configure_pins()
1233 			status = write16(state, SIO_PDR_MD4_CFG__A, 0x0000);  in mpegts_configure_pins()
1234 			if (status < 0)  in mpegts_configure_pins()
1236 			status = write16(state, SIO_PDR_MD5_CFG__A, 0x0000);  in mpegts_configure_pins()
1237 			if (status < 0)  in mpegts_configure_pins()
1239 			status = write16(state, SIO_PDR_MD6_CFG__A, 0x0000);  in mpegts_configure_pins()
1240 			if (status < 0)  in mpegts_configure_pins()
1242 			status = write16(state, SIO_PDR_MD7_CFG__A, 0x0000);  in mpegts_configure_pins()
1243 			if (status < 0)  in mpegts_configure_pins()
1246 		status = write16(state, SIO_PDR_MCLK_CFG__A, sio_pdr_mclk_cfg);  in mpegts_configure_pins()
1247 		if (status < 0)  in mpegts_configure_pins()
1249 		status = write16(state, SIO_PDR_MD0_CFG__A, sio_pdr_mdx_cfg);  in mpegts_configure_pins()
1250 		if (status < 0)  in mpegts_configure_pins()
1254 	status = write16(state, SIO_PDR_MON_CFG__A, 0x0000);  in mpegts_configure_pins()
1255 	if (status < 0)  in mpegts_configure_pins()
1258 	status = write16(state, SIO_TOP_COMM_KEY__A, 0x0000);  in mpegts_configure_pins()
1260 	if (status < 0)  in mpegts_configure_pins()
1261 		pr_err("Error %d on %s\n", status, __func__);  in mpegts_configure_pins()
1262 	return status;  in mpegts_configure_pins()
1276 	int status;  in bl_chain_cmd()  local
1281 	status = write16(state, SIO_BL_MODE__A, SIO_BL_MODE_CHAIN);  in bl_chain_cmd()
1282 	if (status < 0)  in bl_chain_cmd()
1284 	status = write16(state, SIO_BL_CHAIN_ADDR__A, rom_offset);  in bl_chain_cmd()
1285 	if (status < 0)  in bl_chain_cmd()
1287 	status = write16(state, SIO_BL_CHAIN_LEN__A, nr_of_elements);  in bl_chain_cmd()
1288 	if (status < 0)  in bl_chain_cmd()
1290 	status = write16(state, SIO_BL_ENABLE__A, SIO_BL_ENABLE_ON);  in bl_chain_cmd()
1291 	if (status < 0)  in bl_chain_cmd()
1297 		status = read16(state, SIO_BL_STATUS__A, &bl_status);  in bl_chain_cmd()
1298 		if (status < 0)  in bl_chain_cmd()
1305 		status = -EINVAL;  in bl_chain_cmd()
1309 	if (status < 0)  in bl_chain_cmd()
1310 		pr_err("Error %d on %s\n", status, __func__);  in bl_chain_cmd()
1313 	return status;  in bl_chain_cmd()
1326 	int status = 0;  in download_microcode()  local
1370 		status = write_block(state, address, block_size, p_src);  in download_microcode()
1371 		if (status < 0) {  in download_microcode()
1372 			pr_err("Error %d while loading firmware\n", status);  in download_microcode()
1378 	return status;  in download_microcode()
1383 	int status;  in dvbt_enable_ofdm_token_ring()  local
1396 	status = read16(state, SIO_OFDM_SH_OFDM_RING_STATUS__A, &data);  in dvbt_enable_ofdm_token_ring()
1397 	if (status >= 0 && data == desired_status) {  in dvbt_enable_ofdm_token_ring()
1399 		return status;  in dvbt_enable_ofdm_token_ring()
1402 	status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A, desired_ctrl);  in dvbt_enable_ofdm_token_ring()
1406 		status = read16(state, SIO_OFDM_SH_OFDM_RING_STATUS__A, &data);  in dvbt_enable_ofdm_token_ring()
1407 		if ((status >= 0 && data == desired_status)  in dvbt_enable_ofdm_token_ring()
1416 	return status;  in dvbt_enable_ofdm_token_ring()
1421 	int status = 0;  in mpegts_stop()  local
1428 	status = read16(state, FEC_OC_SNC_MODE__A, &fec_oc_snc_mode);  in mpegts_stop()
1429 	if (status < 0)  in mpegts_stop()
1432 	status = write16(state, FEC_OC_SNC_MODE__A, fec_oc_snc_mode);  in mpegts_stop()
1433 	if (status < 0)  in mpegts_stop()
1437 	status = read16(state, FEC_OC_IPR_MODE__A, &fec_oc_ipr_mode);  in mpegts_stop()
1438 	if (status < 0)  in mpegts_stop()
1441 	status = write16(state, FEC_OC_IPR_MODE__A, fec_oc_ipr_mode);  in mpegts_stop()
1444 	if (status < 0)  in mpegts_stop()
1445 		pr_err("Error %d on %s\n", status, __func__);  in mpegts_stop()
1447 	return status;  in mpegts_stop()
1458 	int status = -EINVAL;  in scu_command()  local
1469 		pr_err("Error %d on %s\n", status, __func__);  in scu_command()
1470 		return status;  in scu_command()
1490 		status = read16(state, SCU_RAM_COMMAND__A, &cur_cmd);  in scu_command()
1491 		if (status < 0)  in scu_command()
1496 		status = -EIO;  in scu_command()
1505 			status = read16(state, SCU_RAM_PARAM_0__A - ii,  in scu_command()
1507 			if (status < 0)  in scu_command()
1536 		status = -EINVAL;  in scu_command()
1541 	if (status < 0)  in scu_command()
1542 		pr_err("Error %d on %s\n", status, __func__);  in scu_command()
1545 	return status;  in scu_command()
1551 	int status;  in set_iqm_af()  local
1556 	status = read16(state, IQM_AF_STDBY__A, &data);  in set_iqm_af()
1557 	if (status < 0)  in set_iqm_af()
1574 	status = write16(state, IQM_AF_STDBY__A, data);  in set_iqm_af()
1577 	if (status < 0)  in set_iqm_af()
1578 		pr_err("Error %d on %s\n", status, __func__);  in set_iqm_af()
1579 	return status;  in set_iqm_af()
1584 	int status = 0;  in ctrl_power_mode()  local
1620 		status = power_up_device(state);  in ctrl_power_mode()
1621 		if (status < 0)  in ctrl_power_mode()
1623 		status = dvbt_enable_ofdm_token_ring(state, true);  in ctrl_power_mode()
1624 		if (status < 0)  in ctrl_power_mode()
1642 			status = mpegts_stop(state);  in ctrl_power_mode()
1643 			if (status < 0)  in ctrl_power_mode()
1645 			status = power_down_dvbt(state, false);  in ctrl_power_mode()
1646 			if (status < 0)  in ctrl_power_mode()
1651 			status = mpegts_stop(state);  in ctrl_power_mode()
1652 			if (status < 0)  in ctrl_power_mode()
1654 			status = power_down_qam(state);  in ctrl_power_mode()
1655 			if (status < 0)  in ctrl_power_mode()
1661 		status = dvbt_enable_ofdm_token_ring(state, false);  in ctrl_power_mode()
1662 		if (status < 0)  in ctrl_power_mode()
1664 		status = write16(state, SIO_CC_PWD_MODE__A, sio_cc_pwd_mode);  in ctrl_power_mode()
1665 		if (status < 0)  in ctrl_power_mode()
1667 		status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY);  in ctrl_power_mode()
1668 		if (status < 0)  in ctrl_power_mode()
1674 			status = hi_cfg_command(state);  in ctrl_power_mode()
1675 			if (status < 0)  in ctrl_power_mode()
1682 	if (status < 0)  in ctrl_power_mode()
1683 		pr_err("Error %d on %s\n", status, __func__);  in ctrl_power_mode()
1685 	return status;  in ctrl_power_mode()
1693 	int status;  in power_down_dvbt()  local
1697 	status = read16(state, SCU_COMM_EXEC__A, &data);  in power_down_dvbt()
1698 	if (status < 0)  in power_down_dvbt()
1702 		status = scu_command(state,  in power_down_dvbt()
1706 		if (status < 0)  in power_down_dvbt()
1709 		status = scu_command(state,  in power_down_dvbt()
1713 		if (status < 0)  in power_down_dvbt()
1718 	status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP);  in power_down_dvbt()
1719 	if (status < 0)  in power_down_dvbt()
1721 	status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP);  in power_down_dvbt()
1722 	if (status < 0)  in power_down_dvbt()
1724 	status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP);  in power_down_dvbt()
1725 	if (status < 0)  in power_down_dvbt()
1729 	status = set_iqm_af(state, false);  in power_down_dvbt()
1730 	if (status < 0)  in power_down_dvbt()
1735 		status = ctrl_power_mode(state, &power_mode);  in power_down_dvbt()
1736 		if (status < 0)  in power_down_dvbt()
1740 	if (status < 0)  in power_down_dvbt()
1741 		pr_err("Error %d on %s\n", status, __func__);  in power_down_dvbt()
1742 	return status;  in power_down_dvbt()
1748 	int status = 0;  in setoperation_mode()  local
1758 	status = write16(state, SCU_RAM_GPIO__A,  in setoperation_mode()
1760 	if (status < 0)  in setoperation_mode()
1772 		status = mpegts_stop(state);  in setoperation_mode()
1773 		if (status < 0)  in setoperation_mode()
1775 		status = power_down_dvbt(state, true);  in setoperation_mode()
1776 		if (status < 0)  in setoperation_mode()
1782 		status = mpegts_stop(state);  in setoperation_mode()
1783 		if (status < 0)  in setoperation_mode()
1785 		status = power_down_qam(state);  in setoperation_mode()
1786 		if (status < 0)  in setoperation_mode()
1792 		status = -EINVAL;  in setoperation_mode()
1803 		status = set_dvbt_standard(state, o_mode);  in setoperation_mode()
1804 		if (status < 0)  in setoperation_mode()
1812 		status = set_qam_standard(state, o_mode);  in setoperation_mode()
1813 		if (status < 0)  in setoperation_mode()
1818 		status = -EINVAL;  in setoperation_mode()
1821 	if (status < 0)  in setoperation_mode()
1822 		pr_err("Error %d on %s\n", status, __func__);  in setoperation_mode()
1823 	return status;  in setoperation_mode()
1829 	int status = -EINVAL;  in start()  local
1850 		status = set_qam(state, i_freqk_hz, offsetk_hz);  in start()
1851 		if (status < 0)  in start()
1857 		status = mpegts_stop(state);  in start()
1858 		if (status < 0)  in start()
1860 		status = set_dvbt(state, i_freqk_hz, offsetk_hz);  in start()
1861 		if (status < 0)  in start()
1863 		status = dvbt_start(state);  in start()
1864 		if (status < 0)  in start()
1872 	if (status < 0)  in start()
1873 		pr_err("Error %d on %s\n", status, __func__);  in start()
1874 	return status;  in start()
1887 	int status = -EINVAL;  in get_lock_status()  local
1901 		status = get_qam_lock_status(state, p_lock_status);  in get_lock_status()
1904 		status = get_dvbt_lock_status(state, p_lock_status);  in get_lock_status()
1912 	if (status < 0)  in get_lock_status()
1913 		pr_err("Error %d on %s\n", status, __func__);  in get_lock_status()
1914 	return status;  in get_lock_status()
1919 	int status;  in mpegts_start()  local
1924 	status = read16(state, FEC_OC_SNC_MODE__A, &fec_oc_snc_mode);  in mpegts_start()
1925 	if (status < 0)  in mpegts_start()
1928 	status = write16(state, FEC_OC_SNC_MODE__A, fec_oc_snc_mode);  in mpegts_start()
1929 	if (status < 0)  in mpegts_start()
1931 	status = write16(state, FEC_OC_SNC_UNLOCK__A, 1);  in mpegts_start()
1933 	if (status < 0)  in mpegts_start()
1934 		pr_err("Error %d on %s\n", status, __func__);  in mpegts_start()
1935 	return status;  in mpegts_start()
1940 	int status;  in mpegts_dto_init()  local
1945 	status = write16(state, FEC_OC_RCN_CTL_STEP_LO__A, 0x0000);  in mpegts_dto_init()
1946 	if (status < 0)  in mpegts_dto_init()
1948 	status = write16(state, FEC_OC_RCN_CTL_STEP_HI__A, 0x000C);  in mpegts_dto_init()
1949 	if (status < 0)  in mpegts_dto_init()
1951 	status = write16(state, FEC_OC_RCN_GAIN__A, 0x000A);  in mpegts_dto_init()
1952 	if (status < 0)  in mpegts_dto_init()
1954 	status = write16(state, FEC_OC_AVR_PARM_A__A, 0x0008);  in mpegts_dto_init()
1955 	if (status < 0)  in mpegts_dto_init()
1957 	status = write16(state, FEC_OC_AVR_PARM_B__A, 0x0006);  in mpegts_dto_init()
1958 	if (status < 0)  in mpegts_dto_init()
1960 	status = write16(state, FEC_OC_TMD_HI_MARGIN__A, 0x0680);  in mpegts_dto_init()
1961 	if (status < 0)  in mpegts_dto_init()
1963 	status = write16(state, FEC_OC_TMD_LO_MARGIN__A, 0x0080);  in mpegts_dto_init()
1964 	if (status < 0)  in mpegts_dto_init()
1966 	status = write16(state, FEC_OC_TMD_COUNT__A, 0x03F4);  in mpegts_dto_init()
1967 	if (status < 0)  in mpegts_dto_init()
1971 	status = write16(state, FEC_OC_OCR_INVERT__A, 0);  in mpegts_dto_init()
1972 	if (status < 0)  in mpegts_dto_init()
1974 	status = write16(state, FEC_OC_SNC_LWM__A, 2);  in mpegts_dto_init()
1975 	if (status < 0)  in mpegts_dto_init()
1977 	status = write16(state, FEC_OC_SNC_HWM__A, 12);  in mpegts_dto_init()
1979 	if (status < 0)  in mpegts_dto_init()
1980 		pr_err("Error %d on %s\n", status, __func__);  in mpegts_dto_init()
1982 	return status;  in mpegts_dto_init()
1988 	int status;  in mpegts_dto_setup()  local
2005 	status = read16(state, FEC_OC_MODE__A, &fec_oc_reg_mode);  in mpegts_dto_setup()
2006 	if (status < 0)  in mpegts_dto_setup()
2008 	status = read16(state, FEC_OC_IPR_MODE__A, &fec_oc_reg_ipr_mode);  in mpegts_dto_setup()
2009 	if (status < 0)  in mpegts_dto_setup()
2044 		status = -EINVAL;  in mpegts_dto_setup()
2046 	if (status < 0)  in mpegts_dto_setup()
2088 	status = write16(state, FEC_OC_DTO_BURST_LEN__A, fec_oc_dto_burst_len);  in mpegts_dto_setup()
2089 	if (status < 0)  in mpegts_dto_setup()
2091 	status = write16(state, FEC_OC_DTO_PERIOD__A, fec_oc_dto_period);  in mpegts_dto_setup()
2092 	if (status < 0)  in mpegts_dto_setup()
2094 	status = write16(state, FEC_OC_DTO_MODE__A, fec_oc_dto_mode);  in mpegts_dto_setup()
2095 	if (status < 0)  in mpegts_dto_setup()
2097 	status = write16(state, FEC_OC_FCT_MODE__A, fec_oc_fct_mode);  in mpegts_dto_setup()
2098 	if (status < 0)  in mpegts_dto_setup()
2100 	status = write16(state, FEC_OC_MODE__A, fec_oc_reg_mode);  in mpegts_dto_setup()
2101 	if (status < 0)  in mpegts_dto_setup()
2103 	status = write16(state, FEC_OC_IPR_MODE__A, fec_oc_reg_ipr_mode);  in mpegts_dto_setup()
2104 	if (status < 0)  in mpegts_dto_setup()
2108 	status = write32(state, FEC_OC_RCN_CTL_RATE_LO__A, fec_oc_rcn_ctl_rate);  in mpegts_dto_setup()
2109 	if (status < 0)  in mpegts_dto_setup()
2111 	status = write16(state, FEC_OC_TMD_INT_UPD_RATE__A,  in mpegts_dto_setup()
2113 	if (status < 0)  in mpegts_dto_setup()
2115 	status = write16(state, FEC_OC_TMD_MODE__A, fec_oc_tmd_mode);  in mpegts_dto_setup()
2117 	if (status < 0)  in mpegts_dto_setup()
2118 		pr_err("Error %d on %s\n", status, __func__);  in mpegts_dto_setup()
2119 	return status;  in mpegts_dto_setup()
2160 	int status = -EINVAL;  in set_agc_rf()  local
2172 		status = read16(state, IQM_AF_STDBY__A, &data);  in set_agc_rf()
2173 		if (status < 0)  in set_agc_rf()
2176 		status = write16(state, IQM_AF_STDBY__A, data);  in set_agc_rf()
2177 		if (status < 0)  in set_agc_rf()
2179 		status = read16(state, SCU_RAM_AGC_CONFIG__A, &data);  in set_agc_rf()
2180 		if (status < 0)  in set_agc_rf()
2191 		status = write16(state, SCU_RAM_AGC_CONFIG__A, data);  in set_agc_rf()
2192 		if (status < 0)  in set_agc_rf()
2196 		status = read16(state, SCU_RAM_AGC_KI_RED__A, &data);  in set_agc_rf()
2197 		if (status < 0)  in set_agc_rf()
2205 		status = write16(state, SCU_RAM_AGC_KI_RED__A, data);  in set_agc_rf()
2206 		if (status < 0)  in set_agc_rf()
2216 			status = -EINVAL;  in set_agc_rf()
2222 			status = write16(state,  in set_agc_rf()
2225 			if (status < 0)  in set_agc_rf()
2230 		status = write16(state, SCU_RAM_AGC_RF_IACCU_HI_CO__A,  in set_agc_rf()
2232 		if (status < 0)  in set_agc_rf()
2236 		status = write16(state, SCU_RAM_AGC_RF_MAX__A,  in set_agc_rf()
2238 		if (status < 0)  in set_agc_rf()
2245 		status = read16(state, IQM_AF_STDBY__A, &data);  in set_agc_rf()
2246 		if (status < 0)  in set_agc_rf()
2249 		status = write16(state, IQM_AF_STDBY__A, data);  in set_agc_rf()
2250 		if (status < 0)  in set_agc_rf()
2254 		status = read16(state, SCU_RAM_AGC_CONFIG__A, &data);  in set_agc_rf()
2255 		if (status < 0)  in set_agc_rf()
2262 		status = write16(state, SCU_RAM_AGC_CONFIG__A, data);  in set_agc_rf()
2263 		if (status < 0)  in set_agc_rf()
2267 		status = write16(state, SCU_RAM_AGC_RF_IACCU_HI_CO__A, 0);  in set_agc_rf()
2268 		if (status < 0)  in set_agc_rf()
2272 		status = write16(state, SCU_RAM_AGC_RF_IACCU_HI__A,  in set_agc_rf()
2274 		if (status < 0)  in set_agc_rf()
2280 		status = read16(state, IQM_AF_STDBY__A, &data);  in set_agc_rf()
2281 		if (status < 0)  in set_agc_rf()
2284 		status = write16(state, IQM_AF_STDBY__A, data);  in set_agc_rf()
2285 		if (status < 0)  in set_agc_rf()
2289 		status = read16(state, SCU_RAM_AGC_CONFIG__A, &data);  in set_agc_rf()
2290 		if (status < 0)  in set_agc_rf()
2293 		status = write16(state, SCU_RAM_AGC_CONFIG__A, data);  in set_agc_rf()
2294 		if (status < 0)  in set_agc_rf()
2299 		status = -EINVAL;  in set_agc_rf()
2303 	if (status < 0)  in set_agc_rf()
2304 		pr_err("Error %d on %s\n", status, __func__);  in set_agc_rf()
2305 	return status;  in set_agc_rf()
2314 	int status = 0;  in set_agc_if()  local
2323 		status = read16(state, IQM_AF_STDBY__A, &data);  in set_agc_if()
2324 		if (status < 0)  in set_agc_if()
2327 		status = write16(state, IQM_AF_STDBY__A, data);  in set_agc_if()
2328 		if (status < 0)  in set_agc_if()
2331 		status = read16(state, SCU_RAM_AGC_CONFIG__A, &data);  in set_agc_if()
2332 		if (status < 0)  in set_agc_if()
2343 		status = write16(state, SCU_RAM_AGC_CONFIG__A, data);  in set_agc_if()
2344 		if (status < 0)  in set_agc_if()
2348 		status = read16(state, SCU_RAM_AGC_KI_RED__A, &data);  in set_agc_if()
2349 		if (status < 0)  in set_agc_if()
2356 		status = write16(state, SCU_RAM_AGC_KI_RED__A, data);  in set_agc_if()
2357 		if (status < 0)  in set_agc_if()
2367 		status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A,  in set_agc_if()
2369 		if (status < 0)  in set_agc_if()
2376 		status = read16(state, IQM_AF_STDBY__A, &data);  in set_agc_if()
2377 		if (status < 0)  in set_agc_if()
2380 		status = write16(state, IQM_AF_STDBY__A, data);  in set_agc_if()
2381 		if (status < 0)  in set_agc_if()
2384 		status = read16(state, SCU_RAM_AGC_CONFIG__A, &data);  in set_agc_if()
2385 		if (status < 0)  in set_agc_if()
2396 		status = write16(state, SCU_RAM_AGC_CONFIG__A, data);  in set_agc_if()
2397 		if (status < 0)  in set_agc_if()
2401 		status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A,  in set_agc_if()
2403 		if (status < 0)  in set_agc_if()
2410 		status = read16(state, IQM_AF_STDBY__A, &data);  in set_agc_if()
2411 		if (status < 0)  in set_agc_if()
2414 		status = write16(state, IQM_AF_STDBY__A, data);  in set_agc_if()
2415 		if (status < 0)  in set_agc_if()
2419 		status = read16(state, SCU_RAM_AGC_CONFIG__A, &data);  in set_agc_if()
2420 		if (status < 0)  in set_agc_if()
2423 		status = write16(state, SCU_RAM_AGC_CONFIG__A, data);  in set_agc_if()
2424 		if (status < 0)  in set_agc_if()
2431 	status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MIN__A, p_agc_cfg->top);  in set_agc_if()
2433 	if (status < 0)  in set_agc_if()
2434 		pr_err("Error %d on %s\n", status, __func__);  in set_agc_if()
2435 	return status;  in set_agc_if()
2441 	int status = 0;  in get_qam_signal_to_noise()  local
2453 	status = read16(state, QAM_SL_ERR_POWER__A, &qam_sl_err_power);  in get_qam_signal_to_noise()
2454 	if (status < 0) {  in get_qam_signal_to_noise()
2455 		pr_err("Error %d on %s\n", status, __func__);  in get_qam_signal_to_noise()
2484 	return status;  in get_qam_signal_to_noise()
2490 	int status;  in get_dvbt_signal_to_noise()  local
2507 	status = read16(state, OFDM_EQ_TOP_TD_TPS_PWR_OFS__A,  in get_dvbt_signal_to_noise()
2509 	if (status < 0)  in get_dvbt_signal_to_noise()
2511 	status = read16(state, OFDM_EQ_TOP_TD_REQ_SMB_CNT__A,  in get_dvbt_signal_to_noise()
2513 	if (status < 0)  in get_dvbt_signal_to_noise()
2515 	status = read16(state, OFDM_EQ_TOP_TD_SQR_ERR_EXP__A,  in get_dvbt_signal_to_noise()
2517 	if (status < 0)  in get_dvbt_signal_to_noise()
2519 	status = read16(state, OFDM_EQ_TOP_TD_SQR_ERR_I__A,  in get_dvbt_signal_to_noise()
2521 	if (status < 0)  in get_dvbt_signal_to_noise()
2529 	status = read16(state, OFDM_EQ_TOP_TD_SQR_ERR_Q__A, &reg_data);  in get_dvbt_signal_to_noise()
2530 	if (status < 0)  in get_dvbt_signal_to_noise()
2538 	status = read16(state, OFDM_SC_RA_RAM_OP_PARAM__A,  in get_dvbt_signal_to_noise()
2540 	if (status < 0)  in get_dvbt_signal_to_noise()
2586 	if (status < 0)  in get_dvbt_signal_to_noise()
2587 		pr_err("Error %d on %s\n", status, __func__);  in get_dvbt_signal_to_noise()
2588 	return status;  in get_dvbt_signal_to_noise()
2612 	int status = 0;
2643 		status = get_dvbt_signal_to_noise(state, &signal_to_noise);
2644 		if (status < 0)
2646 		status = read16(state, OFDM_EQ_TOP_TD_TPS_CONST__A,
2648 		if (status < 0)
2652 		status = read16(state, OFDM_EQ_TOP_TD_TPS_CODE_HP__A,
2654 		if (status < 0)
2678 	int status = 0;
2688 		status = get_qam_signal_to_noise(state, &signal_to_noise);
2689 		if (status < 0)
2720 	return status;
2755 	int status = -EINVAL;  in ConfigureI2CBridge()  local
2767 	status = write16(state, SIO_HI_RA_RAM_PAR_1__A,  in ConfigureI2CBridge()
2769 	if (status < 0)  in ConfigureI2CBridge()
2772 		status = write16(state, SIO_HI_RA_RAM_PAR_2__A,  in ConfigureI2CBridge()
2774 		if (status < 0)  in ConfigureI2CBridge()
2777 		status = write16(state, SIO_HI_RA_RAM_PAR_2__A,  in ConfigureI2CBridge()
2779 		if (status < 0)  in ConfigureI2CBridge()
2783 	status = hi_command(state, SIO_HI_RA_RAM_CMD_BRDCTRL, NULL);  in ConfigureI2CBridge()
2786 	if (status < 0)  in ConfigureI2CBridge()
2787 		pr_err("Error %d on %s\n", status, __func__);  in ConfigureI2CBridge()
2788 	return status;  in ConfigureI2CBridge()
2794 	int status = -EINVAL;  in set_pre_saw()  local
2802 	status = write16(state, IQM_AF_PDREF__A, p_pre_saw_cfg->reference);  in set_pre_saw()
2804 	if (status < 0)  in set_pre_saw()
2805 		pr_err("Error %d on %s\n", status, __func__);  in set_pre_saw()
2806 	return status;  in set_pre_saw()
2815 	int status;  in bl_direct_cmd()  local
2821 	status = write16(state, SIO_BL_MODE__A, SIO_BL_MODE_DIRECT);  in bl_direct_cmd()
2822 	if (status < 0)  in bl_direct_cmd()
2824 	status = write16(state, SIO_BL_TGT_HDR__A, blockbank);  in bl_direct_cmd()
2825 	if (status < 0)  in bl_direct_cmd()
2827 	status = write16(state, SIO_BL_TGT_ADDR__A, offset);  in bl_direct_cmd()
2828 	if (status < 0)  in bl_direct_cmd()
2830 	status = write16(state, SIO_BL_SRC_ADDR__A, rom_offset);  in bl_direct_cmd()
2831 	if (status < 0)  in bl_direct_cmd()
2833 	status = write16(state, SIO_BL_SRC_LEN__A, nr_of_elements);  in bl_direct_cmd()
2834 	if (status < 0)  in bl_direct_cmd()
2836 	status = write16(state, SIO_BL_ENABLE__A, SIO_BL_ENABLE_ON);  in bl_direct_cmd()
2837 	if (status < 0)  in bl_direct_cmd()
2842 		status = read16(state, SIO_BL_STATUS__A, &bl_status);  in bl_direct_cmd()
2843 		if (status < 0)  in bl_direct_cmd()
2848 		status = -EINVAL;  in bl_direct_cmd()
2852 	if (status < 0)  in bl_direct_cmd()
2853 		pr_err("Error %d on %s\n", status, __func__);  in bl_direct_cmd()
2856 	return status;  in bl_direct_cmd()
2863 	int status;  in adc_sync_measurement()  local
2868 	status = write16(state, IQM_AF_COMM_EXEC__A, IQM_AF_COMM_EXEC_ACTIVE);  in adc_sync_measurement()
2869 	if (status < 0)  in adc_sync_measurement()
2871 	status = write16(state, IQM_AF_START_LOCK__A, 1);  in adc_sync_measurement()
2872 	if (status < 0)  in adc_sync_measurement()
2876 	status = read16(state, IQM_AF_PHASE0__A, &data);  in adc_sync_measurement()
2877 	if (status < 0)  in adc_sync_measurement()
2881 	status = read16(state, IQM_AF_PHASE1__A, &data);  in adc_sync_measurement()
2882 	if (status < 0)  in adc_sync_measurement()
2886 	status = read16(state, IQM_AF_PHASE2__A, &data);  in adc_sync_measurement()
2887 	if (status < 0)  in adc_sync_measurement()
2893 	if (status < 0)  in adc_sync_measurement()
2894 		pr_err("Error %d on %s\n", status, __func__);  in adc_sync_measurement()
2895 	return status;  in adc_sync_measurement()
2901 	int status;  in adc_synchronization()  local
2905 	status = adc_sync_measurement(state, &count);  in adc_synchronization()
2906 	if (status < 0)  in adc_synchronization()
2913 		status = read16(state, IQM_AF_CLKNEG__A, &clk_neg);  in adc_synchronization()
2914 		if (status < 0)  in adc_synchronization()
2926 		status = write16(state, IQM_AF_CLKNEG__A, clk_neg);  in adc_synchronization()
2927 		if (status < 0)  in adc_synchronization()
2929 		status = adc_sync_measurement(state, &count);  in adc_synchronization()
2930 		if (status < 0)  in adc_synchronization()
2935 		status = -EINVAL;  in adc_synchronization()
2937 	if (status < 0)  in adc_synchronization()
2938 		pr_err("Error %d on %s\n", status, __func__);  in adc_synchronization()
2939 	return status;  in adc_synchronization()
2952 	int status;  in set_frequency_shifter()  local
3001 	status = write32(state, IQM_FS_RATE_OFS_LO__A,  in set_frequency_shifter()
3003 	if (status < 0)  in set_frequency_shifter()
3004 		pr_err("Error %d on %s\n", status, __func__);  in set_frequency_shifter()
3005 	return status;  in set_frequency_shifter()
3027 	int status = 0;  in init_agc()  local
3060 	status = write16(state, SCU_RAM_AGC_FAST_CLP_CTRL_DELAY__A,  in init_agc()
3062 	if (status < 0)  in init_agc()
3065 	status = write16(state, SCU_RAM_AGC_CLP_CTRL_MODE__A, clp_ctrl_mode);  in init_agc()
3066 	if (status < 0)  in init_agc()
3068 	status = write16(state, SCU_RAM_AGC_INGAIN_TGT__A, ingain_tgt);  in init_agc()
3069 	if (status < 0)  in init_agc()
3071 	status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MIN__A, ingain_tgt_min);  in init_agc()
3072 	if (status < 0)  in init_agc()
3074 	status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MAX__A, ingain_tgt_max);  in init_agc()
3075 	if (status < 0)  in init_agc()
3077 	status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MIN__A,  in init_agc()
3079 	if (status < 0)  in init_agc()
3081 	status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A,  in init_agc()
3083 	if (status < 0)  in init_agc()
3085 	status = write16(state, SCU_RAM_AGC_IF_IACCU_HI__A, 0);  in init_agc()
3086 	if (status < 0)  in init_agc()
3088 	status = write16(state, SCU_RAM_AGC_IF_IACCU_LO__A, 0);  in init_agc()
3089 	if (status < 0)  in init_agc()
3091 	status = write16(state, SCU_RAM_AGC_RF_IACCU_HI__A, 0);  in init_agc()
3092 	if (status < 0)  in init_agc()
3094 	status = write16(state, SCU_RAM_AGC_RF_IACCU_LO__A, 0);  in init_agc()
3095 	if (status < 0)  in init_agc()
3097 	status = write16(state, SCU_RAM_AGC_CLP_SUM_MAX__A, clp_sum_max);  in init_agc()
3098 	if (status < 0)  in init_agc()
3100 	status = write16(state, SCU_RAM_AGC_SNS_SUM_MAX__A, sns_sum_max);  in init_agc()
3101 	if (status < 0)  in init_agc()
3104 	status = write16(state, SCU_RAM_AGC_KI_INNERGAIN_MIN__A,  in init_agc()
3106 	if (status < 0)  in init_agc()
3108 	status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT__A,  in init_agc()
3110 	if (status < 0)  in init_agc()
3112 	status = write16(state, SCU_RAM_AGC_CLP_CYCLEN__A, clp_cyclen);  in init_agc()
3113 	if (status < 0)  in init_agc()
3116 	status = write16(state, SCU_RAM_AGC_RF_SNS_DEV_MAX__A, 1023);  in init_agc()
3117 	if (status < 0)  in init_agc()
3119 	status = write16(state, SCU_RAM_AGC_RF_SNS_DEV_MIN__A, (u16) -1023);  in init_agc()
3120 	if (status < 0)  in init_agc()
3122 	status = write16(state, SCU_RAM_AGC_FAST_SNS_CTRL_DELAY__A, 50);  in init_agc()
3123 	if (status < 0)  in init_agc()
3126 	status = write16(state, SCU_RAM_AGC_KI_MAXMINGAIN_TH__A, 20);  in init_agc()
3127 	if (status < 0)  in init_agc()
3129 	status = write16(state, SCU_RAM_AGC_CLP_SUM_MIN__A, clp_sum_min);  in init_agc()
3130 	if (status < 0)  in init_agc()
3132 	status = write16(state, SCU_RAM_AGC_SNS_SUM_MIN__A, sns_sum_min);  in init_agc()
3133 	if (status < 0)  in init_agc()
3135 	status = write16(state, SCU_RAM_AGC_CLP_DIR_TO__A, clp_dir_to);  in init_agc()
3136 	if (status < 0)  in init_agc()
3138 	status = write16(state, SCU_RAM_AGC_SNS_DIR_TO__A, sns_dir_to);  in init_agc()
3139 	if (status < 0)  in init_agc()
3141 	status = write16(state, SCU_RAM_AGC_KI_MINGAIN__A, 0x7fff);  in init_agc()
3142 	if (status < 0)  in init_agc()
3144 	status = write16(state, SCU_RAM_AGC_KI_MAXGAIN__A, 0x0);  in init_agc()
3145 	if (status < 0)  in init_agc()
3147 	status = write16(state, SCU_RAM_AGC_KI_MIN__A, 0x0117);  in init_agc()
3148 	if (status < 0)  in init_agc()
3150 	status = write16(state, SCU_RAM_AGC_KI_MAX__A, 0x0657);  in init_agc()
3151 	if (status < 0)  in init_agc()
3153 	status = write16(state, SCU_RAM_AGC_CLP_SUM__A, 0);  in init_agc()
3154 	if (status < 0)  in init_agc()
3156 	status = write16(state, SCU_RAM_AGC_CLP_CYCCNT__A, 0);  in init_agc()
3157 	if (status < 0)  in init_agc()
3159 	status = write16(state, SCU_RAM_AGC_CLP_DIR_WD__A, 0);  in init_agc()
3160 	if (status < 0)  in init_agc()
3162 	status = write16(state, SCU_RAM_AGC_CLP_DIR_STP__A, 1);  in init_agc()
3163 	if (status < 0)  in init_agc()
3165 	status = write16(state, SCU_RAM_AGC_SNS_SUM__A, 0);  in init_agc()
3166 	if (status < 0)  in init_agc()
3168 	status = write16(state, SCU_RAM_AGC_SNS_CYCCNT__A, 0);  in init_agc()
3169 	if (status < 0)  in init_agc()
3171 	status = write16(state, SCU_RAM_AGC_SNS_DIR_WD__A, 0);  in init_agc()
3172 	if (status < 0)  in init_agc()
3174 	status = write16(state, SCU_RAM_AGC_SNS_DIR_STP__A, 1);  in init_agc()
3175 	if (status < 0)  in init_agc()
3177 	status = write16(state, SCU_RAM_AGC_SNS_CYCLEN__A, 500);  in init_agc()
3178 	if (status < 0)  in init_agc()
3180 	status = write16(state, SCU_RAM_AGC_KI_CYCLEN__A, 500);  in init_agc()
3181 	if (status < 0)  in init_agc()
3185 	status = read16(state, SCU_RAM_AGC_KI__A, &data);  in init_agc()
3186 	if (status < 0)  in init_agc()
3195 	status = write16(state, SCU_RAM_AGC_KI__A, data);  in init_agc()
3197 	if (status < 0)  in init_agc()
3198 		pr_err("Error %d on %s\n", status, __func__);  in init_agc()
3199 	return status;  in init_agc()
3204 	int status;  in dvbtqam_get_acc_pkt_err()  local
3208 		status = write16(state, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A, 0);  in dvbtqam_get_acc_pkt_err()
3210 		status = read16(state, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A,  in dvbtqam_get_acc_pkt_err()
3212 	if (status < 0)  in dvbtqam_get_acc_pkt_err()
3213 		pr_err("Error %d on %s\n", status, __func__);  in dvbtqam_get_acc_pkt_err()
3214 	return status;  in dvbtqam_get_acc_pkt_err()
3226 	int status;  in dvbt_sc_command()  local
3229 	status = read16(state, OFDM_SC_COMM_EXEC__A, &sc_exec);  in dvbt_sc_command()
3232 		status = -EINVAL;  in dvbt_sc_command()
3234 	if (status < 0)  in dvbt_sc_command()
3241 		status = read16(state, OFDM_SC_RA_RAM_CMD__A, &cur_cmd);  in dvbt_sc_command()
3244 	if (retry_cnt >= DRXK_MAX_RETRIES && (status < 0))  in dvbt_sc_command()
3253 		status = write16(state, OFDM_SC_RA_RAM_CMD_ADDR__A, subcmd);  in dvbt_sc_command()
3254 		if (status < 0)  in dvbt_sc_command()
3263 	status = 0;  in dvbt_sc_command()
3272 		status |= write16(state, OFDM_SC_RA_RAM_PARAM1__A, param1);  in dvbt_sc_command()
3276 		status |= write16(state, OFDM_SC_RA_RAM_PARAM0__A, param0);  in dvbt_sc_command()
3281 		status |= write16(state, OFDM_SC_RA_RAM_CMD__A, cmd);  in dvbt_sc_command()
3285 		status = -EINVAL;  in dvbt_sc_command()
3287 	if (status < 0)  in dvbt_sc_command()
3294 		status = read16(state, OFDM_SC_RA_RAM_CMD__A, &cur_cmd);  in dvbt_sc_command()
3297 	if (retry_cnt >= DRXK_MAX_RETRIES && (status < 0))  in dvbt_sc_command()
3301 	status = read16(state, OFDM_SC_RA_RAM_CMD_ADDR__A, &err_code);  in dvbt_sc_command()
3304 		status = -EINVAL;  in dvbt_sc_command()
3306 	if (status < 0)  in dvbt_sc_command()
3318 		status = read16(state, OFDM_SC_RA_RAM_PARAM0__A, &(param0));  in dvbt_sc_command()
3329 		status = -EINVAL;  in dvbt_sc_command()
3333 	if (status < 0)  in dvbt_sc_command()
3334 		pr_err("Error %d on %s\n", status, __func__);  in dvbt_sc_command()
3335 	return status;  in dvbt_sc_command()
3341 	int status;  in power_up_dvbt()  local
3344 	status = ctrl_power_mode(state, &power_mode);  in power_up_dvbt()
3345 	if (status < 0)  in power_up_dvbt()
3346 		pr_err("Error %d on %s\n", status, __func__);  in power_up_dvbt()
3347 	return status;  in power_up_dvbt()
3352 	int status;  in dvbt_ctrl_set_inc_enable()  local
3356 		status = write16(state, IQM_CF_BYPASSDET__A, 0);  in dvbt_ctrl_set_inc_enable()
3358 		status = write16(state, IQM_CF_BYPASSDET__A, 1);  in dvbt_ctrl_set_inc_enable()
3359 	if (status < 0)  in dvbt_ctrl_set_inc_enable()
3360 		pr_err("Error %d on %s\n", status, __func__);  in dvbt_ctrl_set_inc_enable()
3361 	return status;  in dvbt_ctrl_set_inc_enable()
3368 	int status;  in dvbt_ctrl_set_fr_enable()  local
3373 		status = write16(state, OFDM_SC_RA_RAM_FR_THRES_8K__A,  in dvbt_ctrl_set_fr_enable()
3377 		status = write16(state, OFDM_SC_RA_RAM_FR_THRES_8K__A, 0);  in dvbt_ctrl_set_fr_enable()
3379 	if (status < 0)  in dvbt_ctrl_set_fr_enable()
3380 		pr_err("Error %d on %s\n", status, __func__);  in dvbt_ctrl_set_fr_enable()
3382 	return status;  in dvbt_ctrl_set_fr_enable()
3389 	int status;  in dvbt_ctrl_set_echo_threshold()  local
3392 	status = read16(state, OFDM_SC_RA_RAM_ECHO_THRES__A, &data);  in dvbt_ctrl_set_echo_threshold()
3393 	if (status < 0)  in dvbt_ctrl_set_echo_threshold()
3413 	status = write16(state, OFDM_SC_RA_RAM_ECHO_THRES__A, data);  in dvbt_ctrl_set_echo_threshold()
3415 	if (status < 0)  in dvbt_ctrl_set_echo_threshold()
3416 		pr_err("Error %d on %s\n", status, __func__);  in dvbt_ctrl_set_echo_threshold()
3417 	return status;  in dvbt_ctrl_set_echo_threshold()
3423 	int status = -EINVAL;  in dvbt_ctrl_set_sqi_speed()  local
3435 	status = write16(state, SCU_RAM_FEC_PRE_RS_BER_FILTER_SH__A,  in dvbt_ctrl_set_sqi_speed()
3438 	if (status < 0)  in dvbt_ctrl_set_sqi_speed()
3439 		pr_err("Error %d on %s\n", status, __func__);  in dvbt_ctrl_set_sqi_speed()
3440 	return status;  in dvbt_ctrl_set_sqi_speed()
3455 	int status;  in dvbt_activate_presets()  local
3463 	status = dvbt_ctrl_set_inc_enable(state, &setincenable);  in dvbt_activate_presets()
3464 	if (status < 0)  in dvbt_activate_presets()
3466 	status = dvbt_ctrl_set_fr_enable(state, &setfrenable);  in dvbt_activate_presets()
3467 	if (status < 0)  in dvbt_activate_presets()
3469 	status = dvbt_ctrl_set_echo_threshold(state, &echo_thres2k);  in dvbt_activate_presets()
3470 	if (status < 0)  in dvbt_activate_presets()
3472 	status = dvbt_ctrl_set_echo_threshold(state, &echo_thres8k);  in dvbt_activate_presets()
3473 	if (status < 0)  in dvbt_activate_presets()
3475 	status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MAX__A,  in dvbt_activate_presets()
3478 	if (status < 0)  in dvbt_activate_presets()
3479 		pr_err("Error %d on %s\n", status, __func__);  in dvbt_activate_presets()
3480 	return status;  in dvbt_activate_presets()
3498 	int status;  in set_dvbt_standard()  local
3506 	status = scu_command(state,  in set_dvbt_standard()
3510 	if (status < 0)  in set_dvbt_standard()
3514 	status = scu_command(state, SCU_RAM_COMMAND_STANDARD_OFDM  in set_dvbt_standard()
3517 	if (status < 0)  in set_dvbt_standard()
3521 	status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP);  in set_dvbt_standard()
3522 	if (status < 0)  in set_dvbt_standard()
3524 	status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP);  in set_dvbt_standard()
3525 	if (status < 0)  in set_dvbt_standard()
3527 	status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP);  in set_dvbt_standard()
3528 	if (status < 0)  in set_dvbt_standard()
3533 	status = write16(state, IQM_AF_UPD_SEL__A, 1);  in set_dvbt_standard()
3534 	if (status < 0)  in set_dvbt_standard()
3537 	status = write16(state, IQM_AF_CLP_LEN__A, 0);  in set_dvbt_standard()
3538 	if (status < 0)  in set_dvbt_standard()
3541 	status = write16(state, IQM_AF_SNS_LEN__A, 0);  in set_dvbt_standard()
3542 	if (status < 0)  in set_dvbt_standard()
3545 	status = write16(state, IQM_AF_AMUX__A, IQM_AF_AMUX_SIGNAL2ADC);  in set_dvbt_standard()
3546 	if (status < 0)  in set_dvbt_standard()
3548 	status = set_iqm_af(state, true);  in set_dvbt_standard()
3549 	if (status < 0)  in set_dvbt_standard()
3552 	status = write16(state, IQM_AF_AGC_RF__A, 0);  in set_dvbt_standard()
3553 	if (status < 0)  in set_dvbt_standard()
3557 	status = write16(state, IQM_AF_INC_LCT__A, 0);	/* crunch in IQM_CF */  in set_dvbt_standard()
3558 	if (status < 0)  in set_dvbt_standard()
3560 	status = write16(state, IQM_CF_DET_LCT__A, 0);	/* detect in IQM_CF */  in set_dvbt_standard()
3561 	if (status < 0)  in set_dvbt_standard()
3563 	status = write16(state, IQM_CF_WND_LEN__A, 3);	/* peak detector window length */  in set_dvbt_standard()
3564 	if (status < 0)  in set_dvbt_standard()
3567 	status = write16(state, IQM_RC_STRETCH__A, 16);  in set_dvbt_standard()
3568 	if (status < 0)  in set_dvbt_standard()
3570 	status = write16(state, IQM_CF_OUT_ENA__A, 0x4); /* enable output 2 */  in set_dvbt_standard()
3571 	if (status < 0)  in set_dvbt_standard()
3573 	status = write16(state, IQM_CF_DS_ENA__A, 0x4);	/* decimate output 2 */  in set_dvbt_standard()
3574 	if (status < 0)  in set_dvbt_standard()
3576 	status = write16(state, IQM_CF_SCALE__A, 1600);  in set_dvbt_standard()
3577 	if (status < 0)  in set_dvbt_standard()
3579 	status = write16(state, IQM_CF_SCALE_SH__A, 0);  in set_dvbt_standard()
3580 	if (status < 0)  in set_dvbt_standard()
3584 	status = write16(state, IQM_AF_CLP_TH__A, 448);  in set_dvbt_standard()
3585 	if (status < 0)  in set_dvbt_standard()
3587 	status = write16(state, IQM_CF_DATATH__A, 495);	/* crunching threshold */  in set_dvbt_standard()
3588 	if (status < 0)  in set_dvbt_standard()
3591 	status = bl_chain_cmd(state, DRXK_BL_ROM_OFFSET_TAPS_DVBT,  in set_dvbt_standard()
3593 	if (status < 0)  in set_dvbt_standard()
3596 	status = write16(state, IQM_CF_PKDTH__A, 2);	/* peak detector threshold */  in set_dvbt_standard()
3597 	if (status < 0)  in set_dvbt_standard()
3599 	status = write16(state, IQM_CF_POW_MEAS_LEN__A, 2);  in set_dvbt_standard()
3600 	if (status < 0)  in set_dvbt_standard()
3603 	status = write16(state, IQM_CF_COMM_INT_MSK__A, 1);  in set_dvbt_standard()
3604 	if (status < 0)  in set_dvbt_standard()
3606 	status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_ACTIVE);  in set_dvbt_standard()
3607 	if (status < 0)  in set_dvbt_standard()
3611 	status = adc_synchronization(state);  in set_dvbt_standard()
3612 	if (status < 0)  in set_dvbt_standard()
3614 	status = set_pre_saw(state, &state->m_dvbt_pre_saw_cfg);  in set_dvbt_standard()
3615 	if (status < 0)  in set_dvbt_standard()
3619 	status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD);  in set_dvbt_standard()
3620 	if (status < 0)  in set_dvbt_standard()
3623 	status = set_agc_rf(state, &state->m_dvbt_rf_agc_cfg, true);  in set_dvbt_standard()
3624 	if (status < 0)  in set_dvbt_standard()
3626 	status = set_agc_if(state, &state->m_dvbt_if_agc_cfg, true);  in set_dvbt_standard()
3627 	if (status < 0)  in set_dvbt_standard()
3631 	status = read16(state, OFDM_SC_RA_RAM_CONFIG__A, &data);  in set_dvbt_standard()
3632 	if (status < 0)  in set_dvbt_standard()
3635 	status = write16(state, OFDM_SC_RA_RAM_CONFIG__A, data);  in set_dvbt_standard()
3636 	if (status < 0)  in set_dvbt_standard()
3640 	status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE);  in set_dvbt_standard()
3641 	if (status < 0)  in set_dvbt_standard()
3646 		status = write16(state, SCU_RAM_AGC_FAST_CLP_CTRL_DELAY__A,  in set_dvbt_standard()
3648 		if (status < 0)  in set_dvbt_standard()
3654 	status = write16(state, OFDM_SC_RA_RAM_BE_OPT_DELAY__A, 1);  in set_dvbt_standard()
3655 	if (status < 0)  in set_dvbt_standard()
3657 	status = write16(state, OFDM_SC_RA_RAM_BE_OPT_INIT_DELAY__A, 2);  in set_dvbt_standard()
3658 	if (status < 0)  in set_dvbt_standard()
3663 	status = write16(state, FEC_DI_INPUT_CTL__A, 1);	/* OFDM input */  in set_dvbt_standard()
3664 	if (status < 0)  in set_dvbt_standard()
3669 	status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, 0x400);  in set_dvbt_standard()
3670 	if (status < 0)  in set_dvbt_standard()
3673 	status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, 0x1000);  in set_dvbt_standard()
3674 	if (status < 0)  in set_dvbt_standard()
3677 	status = write16(state, FEC_RS_MEASUREMENT_PRESCALE__A, 0x0001);  in set_dvbt_standard()
3678 	if (status < 0)  in set_dvbt_standard()
3682 	status = mpegts_dto_setup(state, OM_DVBT);  in set_dvbt_standard()
3683 	if (status < 0)  in set_dvbt_standard()
3686 	status = dvbt_activate_presets(state);  in set_dvbt_standard()
3687 	if (status < 0)  in set_dvbt_standard()
3691 	if (status < 0)  in set_dvbt_standard()
3692 		pr_err("Error %d on %s\n", status, __func__);  in set_dvbt_standard()
3693 	return status;  in set_dvbt_standard()
3705 	int status;  in dvbt_start()  local
3712 	status = dvbt_sc_command(state, OFDM_SC_RA_RAM_CMD_PROC_START, 0,  in dvbt_start()
3715 	if (status < 0)  in dvbt_start()
3718 	status = mpegts_start(state);  in dvbt_start()
3719 	if (status < 0)  in dvbt_start()
3721 	status = write16(state, FEC_COMM_EXEC__A, FEC_COMM_EXEC_ACTIVE);  in dvbt_start()
3722 	if (status < 0)  in dvbt_start()
3725 	if (status < 0)  in dvbt_start()
3726 		pr_err("Error %d on %s\n", status, __func__);  in dvbt_start()
3727 	return status;  in dvbt_start()
3748 	int status;  in set_dvbt()  local
3753 	status = scu_command(state, SCU_RAM_COMMAND_STANDARD_OFDM  in set_dvbt()
3756 	if (status < 0)  in set_dvbt()
3760 	status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD);  in set_dvbt()
3761 	if (status < 0)  in set_dvbt()
3765 	status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP);  in set_dvbt()
3766 	if (status < 0)  in set_dvbt()
3768 	status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP);  in set_dvbt()
3769 	if (status < 0)  in set_dvbt()
3774 	status = write16(state, OFDM_CP_COMM_EXEC__A, OFDM_CP_COMM_EXEC_STOP);  in set_dvbt()
3775 	if (status < 0)  in set_dvbt()
3867 		status = -EINVAL;  in set_dvbt()
3873 	status = write16(state, OFDM_EC_SB_PRIOR__A, OFDM_EC_SB_PRIOR_HI);  in set_dvbt()
3874 	if (status < 0)  in set_dvbt()
3920 		status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A,  in set_dvbt()
3922 		if (status < 0)  in set_dvbt()
3925 		status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A,  in set_dvbt()
3927 		if (status < 0)  in set_dvbt()
3929 		status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A,  in set_dvbt()
3931 		if (status < 0)  in set_dvbt()
3933 		status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A,  in set_dvbt()
3935 		if (status < 0)  in set_dvbt()
3937 		status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A,  in set_dvbt()
3939 		if (status < 0)  in set_dvbt()
3944 		status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A,  in set_dvbt()
3946 		if (status < 0)  in set_dvbt()
3949 		status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A,  in set_dvbt()
3951 		if (status < 0)  in set_dvbt()
3953 		status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A,  in set_dvbt()
3955 		if (status < 0)  in set_dvbt()
3957 		status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A,  in set_dvbt()
3959 		if (status < 0)  in set_dvbt()
3961 		status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A,  in set_dvbt()
3963 		if (status < 0)  in set_dvbt()
3968 		status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A,  in set_dvbt()
3970 		if (status < 0)  in set_dvbt()
3973 		status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A,  in set_dvbt()
3975 		if (status < 0)  in set_dvbt()
3977 		status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A,  in set_dvbt()
3979 		if (status < 0)  in set_dvbt()
3981 		status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A,  in set_dvbt()
3983 		if (status < 0)  in set_dvbt()
3985 		status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A,  in set_dvbt()
3987 		if (status < 0)  in set_dvbt()
3991 		status = -EINVAL;  in set_dvbt()
4022 	status = write32(state, IQM_RC_RATE_OFS_LO__A, iqm_rc_rate_ofs);  in set_dvbt()
4023 	if (status < 0)  in set_dvbt()
4029 	status = dvbt_set_frequency_shift(demod, channel, tuner_offset);  in set_dvbt()
4030 	if (status < 0)  in set_dvbt()
4033 	status = set_frequency_shifter(state, intermediate_freqk_hz,  in set_dvbt()
4035 	if (status < 0)  in set_dvbt()
4041 	status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE);  in set_dvbt()
4042 	if (status < 0)  in set_dvbt()
4046 	status = write16(state, OFDM_SC_COMM_STATE__A, 0);  in set_dvbt()
4047 	if (status < 0)  in set_dvbt()
4049 	status = write16(state, OFDM_SC_COMM_EXEC__A, 1);  in set_dvbt()
4050 	if (status < 0)  in set_dvbt()
4054 	status = scu_command(state, SCU_RAM_COMMAND_STANDARD_OFDM  in set_dvbt()
4057 	if (status < 0)  in set_dvbt()
4066 	status = dvbt_sc_command(state, OFDM_SC_RA_RAM_CMD_SET_PREF_PARAM,  in set_dvbt()
4068 	if (status < 0)  in set_dvbt()
4072 		status = dvbt_ctrl_set_sqi_speed(state, &state->m_sqi_speed);  in set_dvbt()
4074 	if (status < 0)  in set_dvbt()
4075 		pr_err("Error %d on %s\n", status, __func__);  in set_dvbt()
4077 	return status;  in set_dvbt()
4092 	int status;  in get_dvbt_lock_status()  local
4106 	status = read16(state, OFDM_SC_COMM_EXEC__A, &sc_comm_exec);  in get_dvbt_lock_status()
4107 	if (status < 0)  in get_dvbt_lock_status()
4112 	status = read16(state, OFDM_SC_RA_RAM_LOCK__A, &sc_ra_ram_lock);  in get_dvbt_lock_status()
4113 	if (status < 0)  in get_dvbt_lock_status()
4125 	if (status < 0)  in get_dvbt_lock_status()
4126 		pr_err("Error %d on %s\n", status, __func__);  in get_dvbt_lock_status()
4128 	return status;  in get_dvbt_lock_status()
4134 	int status;  in power_up_qam()  local
4137 	status = ctrl_power_mode(state, &power_mode);  in power_up_qam()
4138 	if (status < 0)  in power_up_qam()
4139 		pr_err("Error %d on %s\n", status, __func__);  in power_up_qam()
4141 	return status;  in power_up_qam()
4150 	int status = 0;  in power_down_qam()  local
4153 	status = read16(state, SCU_COMM_EXEC__A, &data);  in power_down_qam()
4154 	if (status < 0)  in power_down_qam()
4162 		status = write16(state, QAM_COMM_EXEC__A, QAM_COMM_EXEC_STOP);  in power_down_qam()
4163 		if (status < 0)  in power_down_qam()
4165 		status = scu_command(state, SCU_RAM_COMMAND_STANDARD_QAM  in power_down_qam()
4168 		if (status < 0)  in power_down_qam()
4172 	status = set_iqm_af(state, false);  in power_down_qam()
4175 	if (status < 0)  in power_down_qam()
4176 		pr_err("Error %d on %s\n", status, __func__);  in power_down_qam()
4178 	return status;  in power_down_qam()
4202 	int status = 0;  in set_qam_measurement()  local
4230 		status = -EINVAL;  in set_qam_measurement()
4232 	if (status < 0)  in set_qam_measurement()
4246 		status = -EINVAL;  in set_qam_measurement()
4247 		if (status < 0)  in set_qam_measurement()
4255 	status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, fec_rs_period);  in set_qam_measurement()
4256 	if (status < 0)  in set_qam_measurement()
4258 	status = write16(state, FEC_RS_MEASUREMENT_PRESCALE__A,  in set_qam_measurement()
4260 	if (status < 0)  in set_qam_measurement()
4262 	status = write16(state, FEC_OC_SNC_FAIL_PERIOD__A, fec_rs_period);  in set_qam_measurement()
4264 	if (status < 0)  in set_qam_measurement()
4265 		pr_err("Error %d on %s\n", status, __func__);  in set_qam_measurement()
4266 	return status;  in set_qam_measurement()
4271 	int status = 0;  in set_qam16()  local
4276 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 13517);  in set_qam16()
4277 	if (status < 0)  in set_qam16()
4279 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 13517);  in set_qam16()
4280 	if (status < 0)  in set_qam16()
4282 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 13517);  in set_qam16()
4283 	if (status < 0)  in set_qam16()
4285 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 13517);  in set_qam16()
4286 	if (status < 0)  in set_qam16()
4288 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 13517);  in set_qam16()
4289 	if (status < 0)  in set_qam16()
4291 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 13517);  in set_qam16()
4292 	if (status < 0)  in set_qam16()
4295 	status = write16(state, QAM_DQ_QUAL_FUN0__A, 2);  in set_qam16()
4296 	if (status < 0)  in set_qam16()
4298 	status = write16(state, QAM_DQ_QUAL_FUN1__A, 2);  in set_qam16()
4299 	if (status < 0)  in set_qam16()
4301 	status = write16(state, QAM_DQ_QUAL_FUN2__A, 2);  in set_qam16()
4302 	if (status < 0)  in set_qam16()
4304 	status = write16(state, QAM_DQ_QUAL_FUN3__A, 2);  in set_qam16()
4305 	if (status < 0)  in set_qam16()
4307 	status = write16(state, QAM_DQ_QUAL_FUN4__A, 2);  in set_qam16()
4308 	if (status < 0)  in set_qam16()
4310 	status = write16(state, QAM_DQ_QUAL_FUN5__A, 0);  in set_qam16()
4311 	if (status < 0)  in set_qam16()
4314 	status = write16(state, QAM_SY_SYNC_HWM__A, 5);  in set_qam16()
4315 	if (status < 0)  in set_qam16()
4317 	status = write16(state, QAM_SY_SYNC_AWM__A, 4);  in set_qam16()
4318 	if (status < 0)  in set_qam16()
4320 	status = write16(state, QAM_SY_SYNC_LWM__A, 3);  in set_qam16()
4321 	if (status < 0)  in set_qam16()
4325 	status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A,  in set_qam16()
4327 	if (status < 0)  in set_qam16()
4331 	status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15);  in set_qam16()
4332 	if (status < 0)  in set_qam16()
4334 	status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40);  in set_qam16()
4335 	if (status < 0)  in set_qam16()
4337 	status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12);  in set_qam16()
4338 	if (status < 0)  in set_qam16()
4340 	status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24);  in set_qam16()
4341 	if (status < 0)  in set_qam16()
4343 	status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24);  in set_qam16()
4344 	if (status < 0)  in set_qam16()
4346 	status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12);  in set_qam16()
4347 	if (status < 0)  in set_qam16()
4349 	status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16);  in set_qam16()
4350 	if (status < 0)  in set_qam16()
4352 	status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16);  in set_qam16()
4353 	if (status < 0)  in set_qam16()
4356 	status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5);  in set_qam16()
4357 	if (status < 0)  in set_qam16()
4359 	status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 20);  in set_qam16()
4360 	if (status < 0)  in set_qam16()
4362 	status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 80);  in set_qam16()
4363 	if (status < 0)  in set_qam16()
4365 	status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5);  in set_qam16()
4366 	if (status < 0)  in set_qam16()
4368 	status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 20);  in set_qam16()
4369 	if (status < 0)  in set_qam16()
4371 	status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 50);  in set_qam16()
4372 	if (status < 0)  in set_qam16()
4374 	status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16);  in set_qam16()
4375 	if (status < 0)  in set_qam16()
4377 	status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 16);  in set_qam16()
4378 	if (status < 0)  in set_qam16()
4380 	status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 32);  in set_qam16()
4381 	if (status < 0)  in set_qam16()
4383 	status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5);  in set_qam16()
4384 	if (status < 0)  in set_qam16()
4386 	status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10);  in set_qam16()
4387 	if (status < 0)  in set_qam16()
4389 	status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 10);  in set_qam16()
4390 	if (status < 0)  in set_qam16()
4396 	status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 140);  in set_qam16()
4397 	if (status < 0)  in set_qam16()
4399 	status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 50);  in set_qam16()
4400 	if (status < 0)  in set_qam16()
4402 	status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 95);  in set_qam16()
4403 	if (status < 0)  in set_qam16()
4405 	status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 120);  in set_qam16()
4406 	if (status < 0)  in set_qam16()
4408 	status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 230);  in set_qam16()
4409 	if (status < 0)  in set_qam16()
4411 	status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 105);  in set_qam16()
4412 	if (status < 0)  in set_qam16()
4415 	status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40);  in set_qam16()
4416 	if (status < 0)  in set_qam16()
4418 	status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4);  in set_qam16()
4419 	if (status < 0)  in set_qam16()
4421 	status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 24);  in set_qam16()
4422 	if (status < 0)  in set_qam16()
4428 	status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 16);  in set_qam16()
4429 	if (status < 0)  in set_qam16()
4431 	status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 220);  in set_qam16()
4432 	if (status < 0)  in set_qam16()
4434 	status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 25);  in set_qam16()
4435 	if (status < 0)  in set_qam16()
4437 	status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 6);  in set_qam16()
4438 	if (status < 0)  in set_qam16()
4440 	status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -24);  in set_qam16()
4441 	if (status < 0)  in set_qam16()
4443 	status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -65);  in set_qam16()
4444 	if (status < 0)  in set_qam16()
4446 	status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -127);  in set_qam16()
4447 	if (status < 0)  in set_qam16()
4451 	if (status < 0)  in set_qam16()
4452 		pr_err("Error %d on %s\n", status, __func__);  in set_qam16()
4453 	return status;  in set_qam16()
4465 	int status = 0;  in set_qam32()  local
4471 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 6707);  in set_qam32()
4472 	if (status < 0)  in set_qam32()
4474 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 6707);  in set_qam32()
4475 	if (status < 0)  in set_qam32()
4477 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 6707);  in set_qam32()
4478 	if (status < 0)  in set_qam32()
4480 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 6707);  in set_qam32()
4481 	if (status < 0)  in set_qam32()
4483 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 6707);  in set_qam32()
4484 	if (status < 0)  in set_qam32()
4486 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 6707);  in set_qam32()
4487 	if (status < 0)  in set_qam32()
4491 	status = write16(state, QAM_DQ_QUAL_FUN0__A, 3);  in set_qam32()
4492 	if (status < 0)  in set_qam32()
4494 	status = write16(state, QAM_DQ_QUAL_FUN1__A, 3);  in set_qam32()
4495 	if (status < 0)  in set_qam32()
4497 	status = write16(state, QAM_DQ_QUAL_FUN2__A, 3);  in set_qam32()
4498 	if (status < 0)  in set_qam32()
4500 	status = write16(state, QAM_DQ_QUAL_FUN3__A, 3);  in set_qam32()
4501 	if (status < 0)  in set_qam32()
4503 	status = write16(state, QAM_DQ_QUAL_FUN4__A, 3);  in set_qam32()
4504 	if (status < 0)  in set_qam32()
4506 	status = write16(state, QAM_DQ_QUAL_FUN5__A, 0);  in set_qam32()
4507 	if (status < 0)  in set_qam32()
4510 	status = write16(state, QAM_SY_SYNC_HWM__A, 6);  in set_qam32()
4511 	if (status < 0)  in set_qam32()
4513 	status = write16(state, QAM_SY_SYNC_AWM__A, 5);  in set_qam32()
4514 	if (status < 0)  in set_qam32()
4516 	status = write16(state, QAM_SY_SYNC_LWM__A, 3);  in set_qam32()
4517 	if (status < 0)  in set_qam32()
4522 	status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A,  in set_qam32()
4524 	if (status < 0)  in set_qam32()
4530 	status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15);  in set_qam32()
4531 	if (status < 0)  in set_qam32()
4533 	status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40);  in set_qam32()
4534 	if (status < 0)  in set_qam32()
4536 	status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12);  in set_qam32()
4537 	if (status < 0)  in set_qam32()
4539 	status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24);  in set_qam32()
4540 	if (status < 0)  in set_qam32()
4542 	status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24);  in set_qam32()
4543 	if (status < 0)  in set_qam32()
4545 	status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12);  in set_qam32()
4546 	if (status < 0)  in set_qam32()
4548 	status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16);  in set_qam32()
4549 	if (status < 0)  in set_qam32()
4551 	status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16);  in set_qam32()
4552 	if (status < 0)  in set_qam32()
4555 	status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5);  in set_qam32()
4556 	if (status < 0)  in set_qam32()
4558 	status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 20);  in set_qam32()
4559 	if (status < 0)  in set_qam32()
4561 	status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 80);  in set_qam32()
4562 	if (status < 0)  in set_qam32()
4564 	status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5);  in set_qam32()
4565 	if (status < 0)  in set_qam32()
4567 	status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 20);  in set_qam32()
4568 	if (status < 0)  in set_qam32()
4570 	status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 50);  in set_qam32()
4571 	if (status < 0)  in set_qam32()
4573 	status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16);  in set_qam32()
4574 	if (status < 0)  in set_qam32()
4576 	status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 16);  in set_qam32()
4577 	if (status < 0)  in set_qam32()
4579 	status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 16);  in set_qam32()
4580 	if (status < 0)  in set_qam32()
4582 	status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5);  in set_qam32()
4583 	if (status < 0)  in set_qam32()
4585 	status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10);  in set_qam32()
4586 	if (status < 0)  in set_qam32()
4588 	status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 0);  in set_qam32()
4589 	if (status < 0)  in set_qam32()
4595 	status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 90);  in set_qam32()
4596 	if (status < 0)  in set_qam32()
4598 	status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 50);  in set_qam32()
4599 	if (status < 0)  in set_qam32()
4601 	status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80);  in set_qam32()
4602 	if (status < 0)  in set_qam32()
4604 	status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 100);  in set_qam32()
4605 	if (status < 0)  in set_qam32()
4607 	status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 170);  in set_qam32()
4608 	if (status < 0)  in set_qam32()
4610 	status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 100);  in set_qam32()
4611 	if (status < 0)  in set_qam32()
4614 	status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40);  in set_qam32()
4615 	if (status < 0)  in set_qam32()
4617 	status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4);  in set_qam32()
4618 	if (status < 0)  in set_qam32()
4620 	status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 10);  in set_qam32()
4621 	if (status < 0)  in set_qam32()
4627 	status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 12);  in set_qam32()
4628 	if (status < 0)  in set_qam32()
4630 	status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 140);  in set_qam32()
4631 	if (status < 0)  in set_qam32()
4633 	status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) -8);  in set_qam32()
4634 	if (status < 0)  in set_qam32()
4636 	status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) -16);  in set_qam32()
4637 	if (status < 0)  in set_qam32()
4639 	status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -26);  in set_qam32()
4640 	if (status < 0)  in set_qam32()
4642 	status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -56);  in set_qam32()
4643 	if (status < 0)  in set_qam32()
4645 	status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -86);  in set_qam32()
4647 	if (status < 0)  in set_qam32()
4648 		pr_err("Error %d on %s\n", status, __func__);  in set_qam32()
4649 	return status;  in set_qam32()
4661 	int status = 0;  in set_qam64()  local
4666 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 13336);  in set_qam64()
4667 	if (status < 0)  in set_qam64()
4669 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 12618);  in set_qam64()
4670 	if (status < 0)  in set_qam64()
4672 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 11988);  in set_qam64()
4673 	if (status < 0)  in set_qam64()
4675 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 13809);  in set_qam64()
4676 	if (status < 0)  in set_qam64()
4678 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 13809);  in set_qam64()
4679 	if (status < 0)  in set_qam64()
4681 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 15609);  in set_qam64()
4682 	if (status < 0)  in set_qam64()
4686 	status = write16(state, QAM_DQ_QUAL_FUN0__A, 4);  in set_qam64()
4687 	if (status < 0)  in set_qam64()
4689 	status = write16(state, QAM_DQ_QUAL_FUN1__A, 4);  in set_qam64()
4690 	if (status < 0)  in set_qam64()
4692 	status = write16(state, QAM_DQ_QUAL_FUN2__A, 4);  in set_qam64()
4693 	if (status < 0)  in set_qam64()
4695 	status = write16(state, QAM_DQ_QUAL_FUN3__A, 4);  in set_qam64()
4696 	if (status < 0)  in set_qam64()
4698 	status = write16(state, QAM_DQ_QUAL_FUN4__A, 3);  in set_qam64()
4699 	if (status < 0)  in set_qam64()
4701 	status = write16(state, QAM_DQ_QUAL_FUN5__A, 0);  in set_qam64()
4702 	if (status < 0)  in set_qam64()
4705 	status = write16(state, QAM_SY_SYNC_HWM__A, 5);  in set_qam64()
4706 	if (status < 0)  in set_qam64()
4708 	status = write16(state, QAM_SY_SYNC_AWM__A, 4);  in set_qam64()
4709 	if (status < 0)  in set_qam64()
4711 	status = write16(state, QAM_SY_SYNC_LWM__A, 3);  in set_qam64()
4712 	if (status < 0)  in set_qam64()
4716 	status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A,  in set_qam64()
4718 	if (status < 0)  in set_qam64()
4724 	status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15);  in set_qam64()
4725 	if (status < 0)  in set_qam64()
4727 	status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40);  in set_qam64()
4728 	if (status < 0)  in set_qam64()
4730 	status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12);  in set_qam64()
4731 	if (status < 0)  in set_qam64()
4733 	status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24);  in set_qam64()
4734 	if (status < 0)  in set_qam64()
4736 	status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24);  in set_qam64()
4737 	if (status < 0)  in set_qam64()
4739 	status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12);  in set_qam64()
4740 	if (status < 0)  in set_qam64()
4742 	status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16);  in set_qam64()
4743 	if (status < 0)  in set_qam64()
4745 	status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16);  in set_qam64()
4746 	if (status < 0)  in set_qam64()
4749 	status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5);  in set_qam64()
4750 	if (status < 0)  in set_qam64()
4752 	status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 30);  in set_qam64()
4753 	if (status < 0)  in set_qam64()
4755 	status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 100);  in set_qam64()
4756 	if (status < 0)  in set_qam64()
4758 	status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5);  in set_qam64()
4759 	if (status < 0)  in set_qam64()
4761 	status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 30);  in set_qam64()
4762 	if (status < 0)  in set_qam64()
4764 	status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 50);  in set_qam64()
4765 	if (status < 0)  in set_qam64()
4767 	status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16);  in set_qam64()
4768 	if (status < 0)  in set_qam64()
4770 	status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 25);  in set_qam64()
4771 	if (status < 0)  in set_qam64()
4773 	status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 48);  in set_qam64()
4774 	if (status < 0)  in set_qam64()
4776 	status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5);  in set_qam64()
4777 	if (status < 0)  in set_qam64()
4779 	status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10);  in set_qam64()
4780 	if (status < 0)  in set_qam64()
4782 	status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 10);  in set_qam64()
4783 	if (status < 0)  in set_qam64()
4789 	status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 100);  in set_qam64()
4790 	if (status < 0)  in set_qam64()
4792 	status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 60);  in set_qam64()
4793 	if (status < 0)  in set_qam64()
4795 	status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80);  in set_qam64()
4796 	if (status < 0)  in set_qam64()
4798 	status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 110);  in set_qam64()
4799 	if (status < 0)  in set_qam64()
4801 	status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 200);  in set_qam64()
4802 	if (status < 0)  in set_qam64()
4804 	status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 95);  in set_qam64()
4805 	if (status < 0)  in set_qam64()
4808 	status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40);  in set_qam64()
4809 	if (status < 0)  in set_qam64()
4811 	status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4);  in set_qam64()
4812 	if (status < 0)  in set_qam64()
4814 	status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 15);  in set_qam64()
4815 	if (status < 0)  in set_qam64()
4821 	status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 12);  in set_qam64()
4822 	if (status < 0)  in set_qam64()
4824 	status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 141);  in set_qam64()
4825 	if (status < 0)  in set_qam64()
4827 	status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 7);  in set_qam64()
4828 	if (status < 0)  in set_qam64()
4830 	status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 0);  in set_qam64()
4831 	if (status < 0)  in set_qam64()
4833 	status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -15);  in set_qam64()
4834 	if (status < 0)  in set_qam64()
4836 	status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -45);  in set_qam64()
4837 	if (status < 0)  in set_qam64()
4839 	status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -80);  in set_qam64()
4841 	if (status < 0)  in set_qam64()
4842 		pr_err("Error %d on %s\n", status, __func__);  in set_qam64()
4844 	return status;  in set_qam64()
4856 	int status = 0;  in set_qam128()  local
4861 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 6564);  in set_qam128()
4862 	if (status < 0)  in set_qam128()
4864 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 6598);  in set_qam128()
4865 	if (status < 0)  in set_qam128()
4867 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 6394);  in set_qam128()
4868 	if (status < 0)  in set_qam128()
4870 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 6409);  in set_qam128()
4871 	if (status < 0)  in set_qam128()
4873 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 6656);  in set_qam128()
4874 	if (status < 0)  in set_qam128()
4876 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 7238);  in set_qam128()
4877 	if (status < 0)  in set_qam128()
4881 	status = write16(state, QAM_DQ_QUAL_FUN0__A, 6);  in set_qam128()
4882 	if (status < 0)  in set_qam128()
4884 	status = write16(state, QAM_DQ_QUAL_FUN1__A, 6);  in set_qam128()
4885 	if (status < 0)  in set_qam128()
4887 	status = write16(state, QAM_DQ_QUAL_FUN2__A, 6);  in set_qam128()
4888 	if (status < 0)  in set_qam128()
4890 	status = write16(state, QAM_DQ_QUAL_FUN3__A, 6);  in set_qam128()
4891 	if (status < 0)  in set_qam128()
4893 	status = write16(state, QAM_DQ_QUAL_FUN4__A, 5);  in set_qam128()
4894 	if (status < 0)  in set_qam128()
4896 	status = write16(state, QAM_DQ_QUAL_FUN5__A, 0);  in set_qam128()
4897 	if (status < 0)  in set_qam128()
4900 	status = write16(state, QAM_SY_SYNC_HWM__A, 6);  in set_qam128()
4901 	if (status < 0)  in set_qam128()
4903 	status = write16(state, QAM_SY_SYNC_AWM__A, 5);  in set_qam128()
4904 	if (status < 0)  in set_qam128()
4906 	status = write16(state, QAM_SY_SYNC_LWM__A, 3);  in set_qam128()
4907 	if (status < 0)  in set_qam128()
4913 	status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A,  in set_qam128()
4915 	if (status < 0)  in set_qam128()
4921 	status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15);  in set_qam128()
4922 	if (status < 0)  in set_qam128()
4924 	status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40);  in set_qam128()
4925 	if (status < 0)  in set_qam128()
4927 	status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12);  in set_qam128()
4928 	if (status < 0)  in set_qam128()
4930 	status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24);  in set_qam128()
4931 	if (status < 0)  in set_qam128()
4933 	status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24);  in set_qam128()
4934 	if (status < 0)  in set_qam128()
4936 	status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12);  in set_qam128()
4937 	if (status < 0)  in set_qam128()
4939 	status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16);  in set_qam128()
4940 	if (status < 0)  in set_qam128()
4942 	status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16);  in set_qam128()
4943 	if (status < 0)  in set_qam128()
4946 	status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5);  in set_qam128()
4947 	if (status < 0)  in set_qam128()
4949 	status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 40);  in set_qam128()
4950 	if (status < 0)  in set_qam128()
4952 	status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 120);  in set_qam128()
4953 	if (status < 0)  in set_qam128()
4955 	status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5);  in set_qam128()
4956 	if (status < 0)  in set_qam128()
4958 	status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 40);  in set_qam128()
4959 	if (status < 0)  in set_qam128()
4961 	status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 60);  in set_qam128()
4962 	if (status < 0)  in set_qam128()
4964 	status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16);  in set_qam128()
4965 	if (status < 0)  in set_qam128()
4967 	status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 25);  in set_qam128()
4968 	if (status < 0)  in set_qam128()
4970 	status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 64);  in set_qam128()
4971 	if (status < 0)  in set_qam128()
4973 	status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5);  in set_qam128()
4974 	if (status < 0)  in set_qam128()
4976 	status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10);  in set_qam128()
4977 	if (status < 0)  in set_qam128()
4979 	status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 0);  in set_qam128()
4980 	if (status < 0)  in set_qam128()
4986 	status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 50);  in set_qam128()
4987 	if (status < 0)  in set_qam128()
4989 	status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 60);  in set_qam128()
4990 	if (status < 0)  in set_qam128()
4992 	status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80);  in set_qam128()
4993 	if (status < 0)  in set_qam128()
4995 	status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 100);  in set_qam128()
4996 	if (status < 0)  in set_qam128()
4998 	status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 140);  in set_qam128()
4999 	if (status < 0)  in set_qam128()
5001 	status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 100);  in set_qam128()
5002 	if (status < 0)  in set_qam128()
5005 	status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40);  in set_qam128()
5006 	if (status < 0)  in set_qam128()
5008 	status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 5);  in set_qam128()
5009 	if (status < 0)  in set_qam128()
5012 	status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 12);  in set_qam128()
5013 	if (status < 0)  in set_qam128()
5018 	status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 8);  in set_qam128()
5019 	if (status < 0)  in set_qam128()
5021 	status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 65);  in set_qam128()
5022 	if (status < 0)  in set_qam128()
5024 	status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 5);  in set_qam128()
5025 	if (status < 0)  in set_qam128()
5027 	status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 3);  in set_qam128()
5028 	if (status < 0)  in set_qam128()
5030 	status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -1);  in set_qam128()
5031 	if (status < 0)  in set_qam128()
5033 	status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -12);  in set_qam128()
5034 	if (status < 0)  in set_qam128()
5036 	status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -23);  in set_qam128()
5038 	if (status < 0)  in set_qam128()
5039 		pr_err("Error %d on %s\n", status, __func__);  in set_qam128()
5041 	return status;  in set_qam128()
5053 	int status = 0;  in set_qam256()  local
5058 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 11502);  in set_qam256()
5059 	if (status < 0)  in set_qam256()
5061 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 12084);  in set_qam256()
5062 	if (status < 0)  in set_qam256()
5064 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 12543);  in set_qam256()
5065 	if (status < 0)  in set_qam256()
5067 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 12931);  in set_qam256()
5068 	if (status < 0)  in set_qam256()
5070 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 13629);  in set_qam256()
5071 	if (status < 0)  in set_qam256()
5073 	status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 15385);  in set_qam256()
5074 	if (status < 0)  in set_qam256()
5078 	status = write16(state, QAM_DQ_QUAL_FUN0__A, 8);  in set_qam256()
5079 	if (status < 0)  in set_qam256()
5081 	status = write16(state, QAM_DQ_QUAL_FUN1__A, 8);  in set_qam256()
5082 	if (status < 0)  in set_qam256()
5084 	status = write16(state, QAM_DQ_QUAL_FUN2__A, 8);  in set_qam256()
5085 	if (status < 0)  in set_qam256()
5087 	status = write16(state, QAM_DQ_QUAL_FUN3__A, 8);  in set_qam256()
5088 	if (status < 0)  in set_qam256()
5090 	status = write16(state, QAM_DQ_QUAL_FUN4__A, 6);  in set_qam256()
5091 	if (status < 0)  in set_qam256()
5093 	status = write16(state, QAM_DQ_QUAL_FUN5__A, 0);  in set_qam256()
5094 	if (status < 0)  in set_qam256()
5097 	status = write16(state, QAM_SY_SYNC_HWM__A, 5);  in set_qam256()
5098 	if (status < 0)  in set_qam256()
5100 	status = write16(state, QAM_SY_SYNC_AWM__A, 4);  in set_qam256()
5101 	if (status < 0)  in set_qam256()
5103 	status = write16(state, QAM_SY_SYNC_LWM__A, 3);  in set_qam256()
5104 	if (status < 0)  in set_qam256()
5109 	status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A,  in set_qam256()
5111 	if (status < 0)  in set_qam256()
5117 	status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15);  in set_qam256()
5118 	if (status < 0)  in set_qam256()
5120 	status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40);  in set_qam256()
5121 	if (status < 0)  in set_qam256()
5123 	status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12);  in set_qam256()
5124 	if (status < 0)  in set_qam256()
5126 	status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24);  in set_qam256()
5127 	if (status < 0)  in set_qam256()
5129 	status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24);  in set_qam256()
5130 	if (status < 0)  in set_qam256()
5132 	status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12);  in set_qam256()
5133 	if (status < 0)  in set_qam256()
5135 	status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16);  in set_qam256()
5136 	if (status < 0)  in set_qam256()
5138 	status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16);  in set_qam256()
5139 	if (status < 0)  in set_qam256()
5142 	status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5);  in set_qam256()
5143 	if (status < 0)  in set_qam256()
5145 	status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 50);  in set_qam256()
5146 	if (status < 0)  in set_qam256()
5148 	status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 250);  in set_qam256()
5149 	if (status < 0)  in set_qam256()
5151 	status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5);  in set_qam256()
5152 	if (status < 0)  in set_qam256()
5154 	status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 50);  in set_qam256()
5155 	if (status < 0)  in set_qam256()
5157 	status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 125);  in set_qam256()
5158 	if (status < 0)  in set_qam256()
5160 	status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16);  in set_qam256()
5161 	if (status < 0)  in set_qam256()
5163 	status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 25);  in set_qam256()
5164 	if (status < 0)  in set_qam256()
5166 	status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 48);  in set_qam256()
5167 	if (status < 0)  in set_qam256()
5169 	status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5);  in set_qam256()
5170 	if (status < 0)  in set_qam256()
5172 	status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10);  in set_qam256()
5173 	if (status < 0)  in set_qam256()
5175 	status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 10);  in set_qam256()
5176 	if (status < 0)  in set_qam256()
5182 	status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 50);  in set_qam256()
5183 	if (status < 0)  in set_qam256()
5185 	status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 60);  in set_qam256()
5186 	if (status < 0)  in set_qam256()
5188 	status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80);  in set_qam256()
5189 	if (status < 0)  in set_qam256()
5191 	status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 100);  in set_qam256()
5192 	if (status < 0)  in set_qam256()
5194 	status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 150);  in set_qam256()
5195 	if (status < 0)  in set_qam256()
5197 	status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 110);  in set_qam256()
5198 	if (status < 0)  in set_qam256()
5201 	status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40);  in set_qam256()
5202 	if (status < 0)  in set_qam256()
5204 	status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4);  in set_qam256()
5205 	if (status < 0)  in set_qam256()
5207 	status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 12);  in set_qam256()
5208 	if (status < 0)  in set_qam256()
5214 	status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 8);  in set_qam256()
5215 	if (status < 0)  in set_qam256()
5217 	status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 74);  in set_qam256()
5218 	if (status < 0)  in set_qam256()
5220 	status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 18);  in set_qam256()
5221 	if (status < 0)  in set_qam256()
5223 	status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 13);  in set_qam256()
5224 	if (status < 0)  in set_qam256()
5226 	status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) 7);  in set_qam256()
5227 	if (status < 0)  in set_qam256()
5229 	status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) 0);  in set_qam256()
5230 	if (status < 0)  in set_qam256()
5232 	status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -8);  in set_qam256()
5234 	if (status < 0)  in set_qam256()
5235 		pr_err("Error %d on %s\n", status, __func__);  in set_qam256()
5236 	return status;  in set_qam256()
5249 	int status;  in qam_reset_qam()  local
5254 	status = write16(state, QAM_COMM_EXEC__A, QAM_COMM_EXEC_STOP);  in qam_reset_qam()
5255 	if (status < 0)  in qam_reset_qam()
5258 	status = scu_command(state, SCU_RAM_COMMAND_STANDARD_QAM  in qam_reset_qam()
5262 	if (status < 0)  in qam_reset_qam()
5263 		pr_err("Error %d on %s\n", status, __func__);  in qam_reset_qam()
5264 	return status;  in qam_reset_qam()
5282 	int status;  in qam_set_symbolrate()  local
5294 	status = write16(state, IQM_FD_RATESEL__A, ratesel);  in qam_set_symbolrate()
5295 	if (status < 0)  in qam_set_symbolrate()
5304 		status = -EINVAL;  in qam_set_symbolrate()
5310 	status = write32(state, IQM_RC_RATE_OFS_LO__A, iqm_rc_rate);  in qam_set_symbolrate()
5311 	if (status < 0)  in qam_set_symbolrate()
5320 		status = -EINVAL;  in qam_set_symbolrate()
5328 	status = write16(state, QAM_LC_SYMBOL_FREQ__A, (u16) lc_symb_rate);  in qam_set_symbolrate()
5331 	if (status < 0)  in qam_set_symbolrate()
5332 		pr_err("Error %d on %s\n", status, __func__);  in qam_set_symbolrate()
5333 	return status;  in qam_set_symbolrate()
5347 	int status;  in get_qam_lock_status()  local
5352 	status = scu_command(state,  in get_qam_lock_status()
5356 	if (status < 0)  in get_qam_lock_status()
5357 		pr_err("Error %d on %s\n", status, __func__);  in get_qam_lock_status()
5376 	return status;  in get_qam_lock_status()
5389 	int status;  in qam_demodulator_command()  local
5404 		status = scu_command(state,  in qam_demodulator_command()
5408 		if (status < 0)  in qam_demodulator_command()
5411 		status = scu_command(state,  in qam_demodulator_command()
5427 		status = scu_command(state,  in qam_demodulator_command()
5435 		status = -EINVAL;  in qam_demodulator_command()
5439 	if (status < 0)  in qam_demodulator_command()
5440 		pr_warn("Warning %d on %s\n", status, __func__);  in qam_demodulator_command()
5441 	return status;  in qam_demodulator_command()
5447 	int status;  in set_qam()  local
5458 	status = write16(state, FEC_DI_COMM_EXEC__A, FEC_DI_COMM_EXEC_STOP);  in set_qam()
5459 	if (status < 0)  in set_qam()
5461 	status = write16(state, FEC_RS_COMM_EXEC__A, FEC_RS_COMM_EXEC_STOP);  in set_qam()
5462 	if (status < 0)  in set_qam()
5464 	status = qam_reset_qam(state);  in set_qam()
5465 	if (status < 0)  in set_qam()
5473 	status = qam_set_symbolrate(state);  in set_qam()
5474 	if (status < 0)  in set_qam()
5496 		status = -EINVAL;  in set_qam()
5499 	if (status < 0)  in set_qam()
5507 		status = qam_demodulator_command(state, qam_demod_param_count);  in set_qam()
5514 		|| (!state->qam_demod_parameter_count && status < 0)) {  in set_qam()
5516 		status = qam_demodulator_command(state, qam_demod_param_count);  in set_qam()
5519 	if (status < 0) {  in set_qam()
5543 	status = set_frequency(channel, tuner_freq_offset));  in set_qam()
5544 	if (status < 0)  in set_qam()
5547 	status = set_frequency_shifter(state, intermediate_freqk_hz,  in set_qam()
5549 	if (status < 0)  in set_qam()
5553 	status = set_qam_measurement(state, state->m_constellation,  in set_qam()
5555 	if (status < 0)  in set_qam()
5559 	status = write16(state, IQM_CF_SCALE_SH__A, IQM_CF_SCALE_SH__PRE);  in set_qam()
5560 	if (status < 0)  in set_qam()
5562 	status = write16(state, QAM_SY_TIMEOUT__A, QAM_SY_TIMEOUT__PRE);  in set_qam()
5563 	if (status < 0)  in set_qam()
5567 	status = write16(state, QAM_LC_RATE_LIMIT__A, 3);  in set_qam()
5568 	if (status < 0)  in set_qam()
5570 	status = write16(state, QAM_LC_LPF_FACTORP__A, 4);  in set_qam()
5571 	if (status < 0)  in set_qam()
5573 	status = write16(state, QAM_LC_LPF_FACTORI__A, 4);  in set_qam()
5574 	if (status < 0)  in set_qam()
5576 	status = write16(state, QAM_LC_MODE__A, 7);  in set_qam()
5577 	if (status < 0)  in set_qam()
5580 	status = write16(state, QAM_LC_QUAL_TAB0__A, 1);  in set_qam()
5581 	if (status < 0)  in set_qam()
5583 	status = write16(state, QAM_LC_QUAL_TAB1__A, 1);  in set_qam()
5584 	if (status < 0)  in set_qam()
5586 	status = write16(state, QAM_LC_QUAL_TAB2__A, 1);  in set_qam()
5587 	if (status < 0)  in set_qam()
5589 	status = write16(state, QAM_LC_QUAL_TAB3__A, 1);  in set_qam()
5590 	if (status < 0)  in set_qam()
5592 	status = write16(state, QAM_LC_QUAL_TAB4__A, 2);  in set_qam()
5593 	if (status < 0)  in set_qam()
5595 	status = write16(state, QAM_LC_QUAL_TAB5__A, 2);  in set_qam()
5596 	if (status < 0)  in set_qam()
5598 	status = write16(state, QAM_LC_QUAL_TAB6__A, 2);  in set_qam()
5599 	if (status < 0)  in set_qam()
5601 	status = write16(state, QAM_LC_QUAL_TAB8__A, 2);  in set_qam()
5602 	if (status < 0)  in set_qam()
5604 	status = write16(state, QAM_LC_QUAL_TAB9__A, 2);  in set_qam()
5605 	if (status < 0)  in set_qam()
5607 	status = write16(state, QAM_LC_QUAL_TAB10__A, 2);  in set_qam()
5608 	if (status < 0)  in set_qam()
5610 	status = write16(state, QAM_LC_QUAL_TAB12__A, 2);  in set_qam()
5611 	if (status < 0)  in set_qam()
5613 	status = write16(state, QAM_LC_QUAL_TAB15__A, 3);  in set_qam()
5614 	if (status < 0)  in set_qam()
5616 	status = write16(state, QAM_LC_QUAL_TAB16__A, 3);  in set_qam()
5617 	if (status < 0)  in set_qam()
5619 	status = write16(state, QAM_LC_QUAL_TAB20__A, 4);  in set_qam()
5620 	if (status < 0)  in set_qam()
5622 	status = write16(state, QAM_LC_QUAL_TAB25__A, 4);  in set_qam()
5623 	if (status < 0)  in set_qam()
5627 	status = write16(state, QAM_SY_SP_INV__A,  in set_qam()
5629 	if (status < 0)  in set_qam()
5633 	status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD);  in set_qam()
5634 	if (status < 0)  in set_qam()
5640 		status = set_qam16(state);  in set_qam()
5643 		status = set_qam32(state);  in set_qam()
5647 		status = set_qam64(state);  in set_qam()
5650 		status = set_qam128(state);  in set_qam()
5653 		status = set_qam256(state);  in set_qam()
5656 		status = -EINVAL;  in set_qam()
5659 	if (status < 0)  in set_qam()
5663 	status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE);  in set_qam()
5664 	if (status < 0)  in set_qam()
5670 	status = mpegts_dto_setup(state, state->m_operation_mode);  in set_qam()
5671 	if (status < 0)  in set_qam()
5675 	status = mpegts_start(state);  in set_qam()
5676 	if (status < 0)  in set_qam()
5678 	status = write16(state, FEC_COMM_EXEC__A, FEC_COMM_EXEC_ACTIVE);  in set_qam()
5679 	if (status < 0)  in set_qam()
5681 	status = write16(state, QAM_COMM_EXEC__A, QAM_COMM_EXEC_ACTIVE);  in set_qam()
5682 	if (status < 0)  in set_qam()
5684 	status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_ACTIVE);  in set_qam()
5685 	if (status < 0)  in set_qam()
5689 	status = scu_command(state, SCU_RAM_COMMAND_STANDARD_QAM  in set_qam()
5692 	if (status < 0)  in set_qam()
5699 	if (status < 0)  in set_qam()
5700 		pr_err("Error %d on %s\n", status, __func__);  in set_qam()
5701 	return status;  in set_qam()
5707 	int status;  in set_qam_standard()  local
5720 	status = power_up_qam(state);  in set_qam_standard()
5721 	if (status < 0)  in set_qam_standard()
5724 	status = qam_reset_qam(state);  in set_qam_standard()
5725 	if (status < 0)  in set_qam_standard()
5730 	status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP);  in set_qam_standard()
5731 	if (status < 0)  in set_qam_standard()
5733 	status = write16(state, IQM_AF_AMUX__A, IQM_AF_AMUX_SIGNAL2ADC);  in set_qam_standard()
5734 	if (status < 0)  in set_qam_standard()
5741 		status = bl_chain_cmd(state, DRXK_BL_ROM_OFFSET_TAPS_ITU_A,  in set_qam_standard()
5746 		status = bl_direct_cmd(state, IQM_CF_TAP_RE0__A,  in set_qam_standard()
5750 		if (status < 0)  in set_qam_standard()
5752 		status = bl_direct_cmd(state,  in set_qam_standard()
5759 		status = -EINVAL;  in set_qam_standard()
5761 	if (status < 0)  in set_qam_standard()
5764 	status = write16(state, IQM_CF_OUT_ENA__A, 1 << IQM_CF_OUT_ENA_QAM__B);  in set_qam_standard()
5765 	if (status < 0)  in set_qam_standard()
5767 	status = write16(state, IQM_CF_SYMMETRIC__A, 0);  in set_qam_standard()
5768 	if (status < 0)  in set_qam_standard()
5770 	status = write16(state, IQM_CF_MIDTAP__A,  in set_qam_standard()
5772 	if (status < 0)  in set_qam_standard()
5775 	status = write16(state, IQM_RC_STRETCH__A, 21);  in set_qam_standard()
5776 	if (status < 0)  in set_qam_standard()
5778 	status = write16(state, IQM_AF_CLP_LEN__A, 0);  in set_qam_standard()
5779 	if (status < 0)  in set_qam_standard()
5781 	status = write16(state, IQM_AF_CLP_TH__A, 448);  in set_qam_standard()
5782 	if (status < 0)  in set_qam_standard()
5784 	status = write16(state, IQM_AF_SNS_LEN__A, 0);  in set_qam_standard()
5785 	if (status < 0)  in set_qam_standard()
5787 	status = write16(state, IQM_CF_POW_MEAS_LEN__A, 0);  in set_qam_standard()
5788 	if (status < 0)  in set_qam_standard()
5791 	status = write16(state, IQM_FS_ADJ_SEL__A, 1);  in set_qam_standard()
5792 	if (status < 0)  in set_qam_standard()
5794 	status = write16(state, IQM_RC_ADJ_SEL__A, 1);  in set_qam_standard()
5795 	if (status < 0)  in set_qam_standard()
5797 	status = write16(state, IQM_CF_ADJ_SEL__A, 1);  in set_qam_standard()
5798 	if (status < 0)  in set_qam_standard()
5800 	status = write16(state, IQM_AF_UPD_SEL__A, 0);  in set_qam_standard()
5801 	if (status < 0)  in set_qam_standard()
5805 	status = write16(state, IQM_CF_CLP_VAL__A, 500);  in set_qam_standard()
5806 	if (status < 0)  in set_qam_standard()
5808 	status = write16(state, IQM_CF_DATATH__A, 1000);  in set_qam_standard()
5809 	if (status < 0)  in set_qam_standard()
5811 	status = write16(state, IQM_CF_BYPASSDET__A, 1);  in set_qam_standard()
5812 	if (status < 0)  in set_qam_standard()
5814 	status = write16(state, IQM_CF_DET_LCT__A, 0);  in set_qam_standard()
5815 	if (status < 0)  in set_qam_standard()
5817 	status = write16(state, IQM_CF_WND_LEN__A, 1);  in set_qam_standard()
5818 	if (status < 0)  in set_qam_standard()
5820 	status = write16(state, IQM_CF_PKDTH__A, 1);  in set_qam_standard()
5821 	if (status < 0)  in set_qam_standard()
5823 	status = write16(state, IQM_AF_INC_BYPASS__A, 1);  in set_qam_standard()
5824 	if (status < 0)  in set_qam_standard()
5828 	status = set_iqm_af(state, true);  in set_qam_standard()
5829 	if (status < 0)  in set_qam_standard()
5831 	status = write16(state, IQM_AF_START_LOCK__A, 0x01);  in set_qam_standard()
5832 	if (status < 0)  in set_qam_standard()
5836 	status = adc_synchronization(state);  in set_qam_standard()
5837 	if (status < 0)  in set_qam_standard()
5841 	status = write16(state, SCU_RAM_QAM_FSM_STEP_PERIOD__A, 2000);  in set_qam_standard()
5842 	if (status < 0)  in set_qam_standard()
5846 	status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD);  in set_qam_standard()
5847 	if (status < 0)  in set_qam_standard()
5853 	status = init_agc(state, true);  in set_qam_standard()
5854 	if (status < 0)  in set_qam_standard()
5856 	status = set_pre_saw(state, &(state->m_qam_pre_saw_cfg));  in set_qam_standard()
5857 	if (status < 0)  in set_qam_standard()
5861 	status = set_agc_rf(state, &(state->m_qam_rf_agc_cfg), true);  in set_qam_standard()
5862 	if (status < 0)  in set_qam_standard()
5864 	status = set_agc_if(state, &(state->m_qam_if_agc_cfg), true);  in set_qam_standard()
5865 	if (status < 0)  in set_qam_standard()
5869 	status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE);  in set_qam_standard()
5871 	if (status < 0)  in set_qam_standard()
5872 		pr_err("Error %d on %s\n", status, __func__);  in set_qam_standard()
5873 	return status;  in set_qam_standard()
5878 	int status;  in write_gpio()  local
5883 	status = write16(state, SCU_RAM_GPIO__A,  in write_gpio()
5885 	if (status < 0)  in write_gpio()
5889 	status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY);  in write_gpio()
5890 	if (status < 0)  in write_gpio()
5896 			status = write16(state, SIO_PDR_SMA_TX_CFG__A,  in write_gpio()
5898 			if (status < 0)  in write_gpio()
5902 			status = read16(state, SIO_PDR_UIO_OUT_LO__A, &value);  in write_gpio()
5903 			if (status < 0)  in write_gpio()
5910 			status = write16(state, SIO_PDR_UIO_OUT_LO__A, value);  in write_gpio()
5911 			if (status < 0)  in write_gpio()
5916 			status = write16(state, SIO_PDR_SMA_RX_CFG__A,  in write_gpio()
5918 			if (status < 0)  in write_gpio()
5922 			status = read16(state, SIO_PDR_UIO_OUT_LO__A, &value);  in write_gpio()
5923 			if (status < 0)  in write_gpio()
5930 			status = write16(state, SIO_PDR_UIO_OUT_LO__A, value);  in write_gpio()
5931 			if (status < 0)  in write_gpio()
5936 			status = write16(state, SIO_PDR_GPIO_CFG__A,  in write_gpio()
5938 			if (status < 0)  in write_gpio()
5942 			status = read16(state, SIO_PDR_UIO_OUT_LO__A, &value);  in write_gpio()
5943 			if (status < 0)  in write_gpio()
5950 			status = write16(state, SIO_PDR_UIO_OUT_LO__A, value);  in write_gpio()
5951 			if (status < 0)  in write_gpio()
5956 	status = write16(state, SIO_TOP_COMM_KEY__A, 0x0000);  in write_gpio()
5958 	if (status < 0)  in write_gpio()
5959 		pr_err("Error %d on %s\n", status, __func__);  in write_gpio()
5960 	return status;  in write_gpio()
5965 	int status = 0;  in switch_antenna_to_qam()  local
5981 		status = write_gpio(state);  in switch_antenna_to_qam()
5983 	if (status < 0)  in switch_antenna_to_qam()
5984 		pr_err("Error %d on %s\n", status, __func__);  in switch_antenna_to_qam()
5985 	return status;  in switch_antenna_to_qam()
5990 	int status = 0;  in switch_antenna_to_dvbt()  local
6006 		status = write_gpio(state);  in switch_antenna_to_dvbt()
6008 	if (status < 0)  in switch_antenna_to_dvbt()
6009 		pr_err("Error %d on %s\n", status, __func__);  in switch_antenna_to_dvbt()
6010 	return status;  in switch_antenna_to_dvbt()
6022 	int status;  in power_down_device()  local
6027 		status = ConfigureI2CBridge(state, true);  in power_down_device()
6028 		if (status < 0)  in power_down_device()
6032 	status = dvbt_enable_ofdm_token_ring(state, false);  in power_down_device()
6033 	if (status < 0)  in power_down_device()
6036 	status = write16(state, SIO_CC_PWD_MODE__A,  in power_down_device()
6038 	if (status < 0)  in power_down_device()
6040 	status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY);  in power_down_device()
6041 	if (status < 0)  in power_down_device()
6044 	status = hi_cfg_command(state);  in power_down_device()
6046 	if (status < 0)  in power_down_device()
6047 		pr_err("Error %d on %s\n", status, __func__);  in power_down_device()
6049 	return status;  in power_down_device()
6054 	int status = 0, n = 0;  in init_drxk()  local
6061 		status = power_up_device(state);  in init_drxk()
6062 		if (status < 0)  in init_drxk()
6064 		status = drxx_open(state);  in init_drxk()
6065 		if (status < 0)  in init_drxk()
6068 		status = write16(state, SIO_CC_SOFT_RST__A,  in init_drxk()
6072 		if (status < 0)  in init_drxk()
6074 		status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY);  in init_drxk()
6075 		if (status < 0)  in init_drxk()
6083 		status = get_device_capabilities(state);  in init_drxk()
6084 		if (status < 0)  in init_drxk()
6104 		status = init_hi(state);  in init_drxk()
6105 		if (status < 0)  in init_drxk()
6113 			status = write16(state, SCU_RAM_GPIO__A,  in init_drxk()
6115 			if (status < 0)  in init_drxk()
6120 		status = mpegts_disable(state);  in init_drxk()
6121 		if (status < 0)  in init_drxk()
6125 		status = write16(state, AUD_COMM_EXEC__A, AUD_COMM_EXEC_STOP);  in init_drxk()
6126 		if (status < 0)  in init_drxk()
6128 		status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_STOP);  in init_drxk()
6129 		if (status < 0)  in init_drxk()
6133 		status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A,  in init_drxk()
6135 		if (status < 0)  in init_drxk()
6139 		status = write16(state, SIO_BL_COMM_EXEC__A,  in init_drxk()
6141 		if (status < 0)  in init_drxk()
6143 		status = bl_chain_cmd(state, 0, 6, 100);  in init_drxk()
6144 		if (status < 0)  in init_drxk()
6148 			status = download_microcode(state, state->fw->data,  in init_drxk()
6150 			if (status < 0)  in init_drxk()
6155 		status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A,  in init_drxk()
6157 		if (status < 0)  in init_drxk()
6161 		status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE);  in init_drxk()
6162 		if (status < 0)  in init_drxk()
6164 		status = drxx_open(state);  in init_drxk()
6165 		if (status < 0)  in init_drxk()
6171 		status = ctrl_power_mode(state, &power_mode);  in init_drxk()
6172 		if (status < 0)  in init_drxk()
6186 		status = write16(state, SCU_RAM_DRIVER_VER_HI__A,  in init_drxk()
6188 		if (status < 0)  in init_drxk()
6195 		status = write16(state, SCU_RAM_DRIVER_VER_LO__A,  in init_drxk()
6197 		if (status < 0)  in init_drxk()
6215 		status = write16(state, SCU_RAM_DRIVER_DEBUG__A, 0);  in init_drxk()
6216 		if (status < 0)  in init_drxk()
6221 		status = write16(state, FEC_COMM_EXEC__A, FEC_COMM_EXEC_STOP);  in init_drxk()
6222 		if (status < 0)  in init_drxk()
6225 		status = mpegts_dto_init(state);  in init_drxk()
6226 		if (status < 0)  in init_drxk()
6228 		status = mpegts_stop(state);  in init_drxk()
6229 		if (status < 0)  in init_drxk()
6231 		status = mpegts_configure_polarity(state);  in init_drxk()
6232 		if (status < 0)  in init_drxk()
6234 		status = mpegts_configure_pins(state, state->m_enable_mpeg_output);  in init_drxk()
6235 		if (status < 0)  in init_drxk()
6238 		status = write_gpio(state);  in init_drxk()
6239 		if (status < 0)  in init_drxk()
6245 			status = power_down_device(state);  in init_drxk()
6246 			if (status < 0)  in init_drxk()
6268 	if (status < 0) {  in init_drxk()
6271 		pr_err("Error %d on %s\n", status, __func__);  in init_drxk()
6274 	return status;  in init_drxk()
6417 	int status;  in get_strength()  local
6443 		status = read16(state, SCU_RAM_AGC_RF_IACCU_HI__A, &scu_lvl);  in get_strength()
6444 		if (status < 0)  in get_strength()
6445 			return status;  in get_strength()
6448 		status = read16(state, SCU_RAM_AGC_RF_IACCU_HI_CO__A, &scu_coc);  in get_strength()
6449 		if (status < 0)  in get_strength()
6450 			return status;  in get_strength()
6476 		status = read16(state, SCU_RAM_AGC_IF_IACCU_HI__A,  in get_strength()
6478 		if (status < 0)  in get_strength()
6479 			return status;  in get_strength()
6481 		status = read16(state, SCU_RAM_AGC_INGAIN_TGT_MIN__A,  in get_strength()
6483 		if (status < 0)  in get_strength()
6484 			return status;  in get_strength()
6520 	int status;  in drxk_get_stats()  local
6583 	status = read16(state, OFDM_EC_VD_ERR_BIT_CNT__A, &reg16);  in drxk_get_stats()
6584 	if (status < 0)  in drxk_get_stats()
6588 	status = read16(state, OFDM_EC_VD_IN_BIT_CNT__A , &reg16);  in drxk_get_stats()
6589 	if (status < 0)  in drxk_get_stats()
6594 	status = read16(state, FEC_RS_NR_BIT_ERRORS__A, &reg16);  in drxk_get_stats()
6595 	if (status < 0)  in drxk_get_stats()
6599 	status = read16(state, FEC_RS_MEASUREMENT_PRESCALE__A, &reg16);  in drxk_get_stats()
6600 	if (status < 0)  in drxk_get_stats()
6604 	status = read16(state, FEC_RS_MEASUREMENT_PERIOD__A, &reg16);  in drxk_get_stats()
6605 	if (status < 0)  in drxk_get_stats()
6609 	status = read16(state, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A, &reg16);  in drxk_get_stats()
6610 	if (status < 0)  in drxk_get_stats()
6636 	return status;  in drxk_get_stats()
6640 static int drxk_read_status(struct dvb_frontend *fe, enum fe_status *status)  in drxk_read_status()  argument
6651 	*status = state->fe_status;  in drxk_read_status()
6776 	int status;  in drxk_attach()  local
6833 		status = request_firmware(&fw, state->microcode_name,  in drxk_attach()
6835 		if (status < 0)  in drxk_attach()