80 	u32 timf;  member
623 	u32 timf;  in dib8000_set_bandwidth()  local
628 	if (state->timf == 0) {  in dib8000_set_bandwidth()
630 		timf = state->timf_default;  in dib8000_set_bandwidth()
633 		timf = state->timf;  in dib8000_set_bandwidth()
636 	dib8000_write_word(state, 29, (u16) ((timf >> 16) & 0xffff));  in dib8000_set_bandwidth()
637 	dib8000_write_word(state, 30, (u16) ((timf) & 0xffff));  in dib8000_set_bandwidth()
1964 	u32 timf = state->timf = dib8000_read32(state, 435);  in dib8000_update_timf()  local
1966 	dib8000_write_word(state, 29, (u16) (timf >> 16));  in dib8000_update_timf()
1967 	dib8000_write_word(state, 30, (u16) (timf & 0xffff));  in dib8000_update_timf()
1968 	dprintk("Updated timing frequency: %d (default: %d)\n", state->timf, state->timf_default);  in dib8000_update_timf()
1971 static u32 dib8000_ctrl_timf(struct dvb_frontend *fe, uint8_t op, uint32_t timf)  in dib8000_ctrl_timf()  argument
1977 			state->timf = timf;  in dib8000_ctrl_timf()
1987 	return state->timf;  in dib8000_ctrl_timf()
4453 	state->timf_default = cfg->pll->timf;  in dib8000_init()