181 static void setup_decoder_defaults(struct au8522_state *state, bool is_svideo)  in setup_decoder_defaults()  argument
187 	au8522_writereg(state, AU8522_TVDEC_SHARPNESSREG009H, 0x07);  in setup_decoder_defaults()
188 	au8522_writereg(state, AU8522_TVDEC_BRIGHTNESS_REG00AH, 0xed);  in setup_decoder_defaults()
189 	au8522_writereg(state, AU8522_TVDEC_CONTRAST_REG00BH, 0x79);  in setup_decoder_defaults()
190 	au8522_writereg(state, AU8522_TVDEC_SATURATION_CB_REG00CH, 0x80);  in setup_decoder_defaults()
191 	au8522_writereg(state, AU8522_TVDEC_SATURATION_CR_REG00DH, 0x80);  in setup_decoder_defaults()
192 	au8522_writereg(state, AU8522_TVDEC_HUE_H_REG00EH, 0x00);  in setup_decoder_defaults()
193 	au8522_writereg(state, AU8522_TVDEC_HUE_L_REG00FH, 0x00);  in setup_decoder_defaults()
196 	au8522_writereg(state, AU8522_TVDEC_INT_MASK_REG010H, 0x00);  in setup_decoder_defaults()
199 		au8522_writereg(state, AU8522_VIDEO_MODE_REG011H, 0x04);  in setup_decoder_defaults()
201 		au8522_writereg(state, AU8522_VIDEO_MODE_REG011H, 0x00);  in setup_decoder_defaults()
203 	au8522_writereg(state, AU8522_TVDEC_PGA_REG012H,  in setup_decoder_defaults()
205 	au8522_writereg(state, AU8522_TVDEC_COMB_MODE_REG015H,  in setup_decoder_defaults()
207 	au8522_writereg(state, AU8522_TVDED_DBG_MODE_REG060H,  in setup_decoder_defaults()
210 	if (state->std == V4L2_STD_PAL_M) {  in setup_decoder_defaults()
211 		au8522_writereg(state, AU8522_TVDEC_FORMAT_CTRL1_REG061H,  in setup_decoder_defaults()
215 		au8522_writereg(state, AU8522_TVDEC_FORMAT_CTRL2_REG062H,  in setup_decoder_defaults()
219 		au8522_writereg(state, AU8522_TVDEC_FORMAT_CTRL1_REG061H,  in setup_decoder_defaults()
223 		au8522_writereg(state, AU8522_TVDEC_FORMAT_CTRL2_REG062H,  in setup_decoder_defaults()
226 	au8522_writereg(state, AU8522_TVDEC_VCR_DET_LLIM_REG063H,  in setup_decoder_defaults()
228 	au8522_writereg(state, AU8522_TVDEC_VCR_DET_HLIM_REG064H,  in setup_decoder_defaults()
230 	au8522_writereg(state, AU8522_TVDEC_COMB_VDIF_THR1_REG065H,  in setup_decoder_defaults()
232 	au8522_writereg(state, AU8522_TVDEC_COMB_VDIF_THR2_REG066H,  in setup_decoder_defaults()
234 	au8522_writereg(state, AU8522_TVDEC_COMB_VDIF_THR3_REG067H,  in setup_decoder_defaults()
236 	au8522_writereg(state, AU8522_TVDEC_COMB_NOTCH_THR_REG068H,  in setup_decoder_defaults()
238 	au8522_writereg(state, AU8522_TVDEC_COMB_HDIF_THR1_REG069H,  in setup_decoder_defaults()
240 	au8522_writereg(state, AU8522_TVDEC_COMB_HDIF_THR2_REG06AH,  in setup_decoder_defaults()
242 	au8522_writereg(state, AU8522_TVDEC_COMB_HDIF_THR3_REG06BH,  in setup_decoder_defaults()
245 		au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH,  in setup_decoder_defaults()
247 		au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH,  in setup_decoder_defaults()
250 		au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH,  in setup_decoder_defaults()
252 		au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH,  in setup_decoder_defaults()
255 	au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR3_REG06EH,  in setup_decoder_defaults()
257 	au8522_writereg(state, AU8522_TVDEC_UV_SEP_THR_REG06FH,  in setup_decoder_defaults()
259 	au8522_writereg(state, AU8522_TVDEC_COMB_DC_THR1_NTSC_REG070H,  in setup_decoder_defaults()
261 	au8522_writereg(state, AU8522_REG071H, AU8522_REG071H_CVBS);  in setup_decoder_defaults()
262 	au8522_writereg(state, AU8522_REG072H, AU8522_REG072H_CVBS);  in setup_decoder_defaults()
263 	au8522_writereg(state, AU8522_TVDEC_COMB_DC_THR2_NTSC_REG073H,  in setup_decoder_defaults()
265 	au8522_writereg(state, AU8522_REG074H, AU8522_REG074H_CVBS);  in setup_decoder_defaults()
266 	au8522_writereg(state, AU8522_REG075H, AU8522_REG075H_CVBS);  in setup_decoder_defaults()
267 	au8522_writereg(state, AU8522_TVDEC_DCAGC_CTRL_REG077H,  in setup_decoder_defaults()
269 	au8522_writereg(state, AU8522_TVDEC_PIC_START_ADJ_REG078H,  in setup_decoder_defaults()
271 	au8522_writereg(state, AU8522_TVDEC_AGC_HIGH_LIMIT_REG079H,  in setup_decoder_defaults()
273 	au8522_writereg(state, AU8522_TVDEC_MACROVISION_SYNC_THR_REG07AH,  in setup_decoder_defaults()
275 	au8522_writereg(state, AU8522_TVDEC_INTRP_CTRL_REG07BH,  in setup_decoder_defaults()
277 	au8522_writereg(state, AU8522_TVDEC_AGC_LOW_LIMIT_REG0E4H,  in setup_decoder_defaults()
279 	au8522_writereg(state, AU8522_TOREGAAGC_REG0E5H,  in setup_decoder_defaults()
281 	au8522_writereg(state, AU8522_REG016H, AU8522_REG016H_CVBS);  in setup_decoder_defaults()
292 		au8522_writereg(state, filter_coef[i].reg_name,  in setup_decoder_defaults()
298 	au8522_writereg(state, AU8522_REG42EH, 0x87);  in setup_decoder_defaults()
299 	au8522_writereg(state, AU8522_REG42FH, 0xa2);  in setup_decoder_defaults()
300 	au8522_writereg(state, AU8522_REG430H, 0xbf);  in setup_decoder_defaults()
301 	au8522_writereg(state, AU8522_REG431H, 0xcb);  in setup_decoder_defaults()
302 	au8522_writereg(state, AU8522_REG432H, 0xa1);  in setup_decoder_defaults()
303 	au8522_writereg(state, AU8522_REG433H, 0x41);  in setup_decoder_defaults()
304 	au8522_writereg(state, AU8522_REG434H, 0x88);  in setup_decoder_defaults()
305 	au8522_writereg(state, AU8522_REG435H, 0xc2);  in setup_decoder_defaults()
306 	au8522_writereg(state, AU8522_REG436H, 0x3c);  in setup_decoder_defaults()
309 static void au8522_setup_cvbs_mode(struct au8522_state *state, u8 input_mode)  in au8522_setup_cvbs_mode()  argument
312 	au8522_writereg(state, AU8522_MODULE_CLOCK_CONTROL_REG0A3H,  in au8522_setup_cvbs_mode()
316 	au8522_writereg(state, AU8522_PGA_CONTROL_REG082H, 0x00);  in au8522_setup_cvbs_mode()
319 	au8522_writereg(state, AU8522_CLAMPING_CONTROL_REG083H, 0x00);  in au8522_setup_cvbs_mode()
321 	au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H, input_mode);  in au8522_setup_cvbs_mode()
323 	setup_decoder_defaults(state, false);  in au8522_setup_cvbs_mode()
325 	au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H,  in au8522_setup_cvbs_mode()
329 static void au8522_setup_cvbs_tuner_mode(struct au8522_state *state,  in au8522_setup_cvbs_tuner_mode()  argument
333 	au8522_writereg(state, AU8522_MODULE_CLOCK_CONTROL_REG0A3H,  in au8522_setup_cvbs_tuner_mode()
338 	au8522_writereg(state, AU8522_PGA_CONTROL_REG082H, 0x00);  in au8522_setup_cvbs_tuner_mode()
341 	au8522_writereg(state, AU8522_CLAMPING_CONTROL_REG083H, 0x0e);  in au8522_setup_cvbs_tuner_mode()
344 	au8522_writereg(state, AU8522_PGA_CONTROL_REG082H, 0x10);  in au8522_setup_cvbs_tuner_mode()
347 	au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H, input_mode);  in au8522_setup_cvbs_tuner_mode()
349 	setup_decoder_defaults(state, false);  in au8522_setup_cvbs_tuner_mode()
351 	au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H,  in au8522_setup_cvbs_tuner_mode()
355 static void au8522_setup_svideo_mode(struct au8522_state *state,  in au8522_setup_svideo_mode()  argument
358 	au8522_writereg(state, AU8522_MODULE_CLOCK_CONTROL_REG0A3H,  in au8522_setup_svideo_mode()
362 	au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H, input_mode);  in au8522_setup_svideo_mode()
365 	au8522_writereg(state, AU8522_PGA_CONTROL_REG082H, 0x00);  in au8522_setup_svideo_mode()
368 	au8522_writereg(state, AU8522_CLAMPING_CONTROL_REG083H, 0x00);  in au8522_setup_svideo_mode()
370 	setup_decoder_defaults(state, true);  in au8522_setup_svideo_mode()
372 	au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H,  in au8522_setup_svideo_mode()
378 static void disable_audio_input(struct au8522_state *state)  in disable_audio_input()  argument
380 	au8522_writereg(state, AU8522_AUDIO_VOLUME_L_REG0F2H, 0x00);  in disable_audio_input()
381 	au8522_writereg(state, AU8522_AUDIO_VOLUME_R_REG0F3H, 0x00);  in disable_audio_input()
382 	au8522_writereg(state, AU8522_AUDIO_VOLUME_REG0F4H, 0x00);  in disable_audio_input()
384 	au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H, 0x04);  in disable_audio_input()
385 	au8522_writereg(state, AU8522_I2S_CTRL_2_REG112H, 0x02);  in disable_audio_input()
387 	au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H,  in disable_audio_input()
392 static void set_audio_input(struct au8522_state *state)  in set_audio_input()  argument
394 	int aud_input = state->aud_input;  in set_audio_input()
401 		disable_audio_input(state);  in set_audio_input()
414 		au8522_writereg(state, lpfilter_coef[i].reg_name,  in set_audio_input()
419 	au8522_writereg(state, AU8522_AUDIO_VOLUME_L_REG0F2H, 0x7F);  in set_audio_input()
420 	au8522_writereg(state, AU8522_AUDIO_VOLUME_R_REG0F3H, 0x7F);  in set_audio_input()
421 	au8522_writereg(state, AU8522_AUDIO_VOLUME_REG0F4H, 0xff);  in set_audio_input()
424 	au8522_writereg(state, AU8522_REG0F9H, AU8522_REG0F9H_AUDIO);  in set_audio_input()
427 	au8522_writereg(state, AU8522_AUDIO_MODE_REG0F1H, 0x82);  in set_audio_input()
431 	au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, 0x9d);  in set_audio_input()
434 	au8522_writereg(state, AU8522_AUDIOFREQ_REG606H, 0x03);  in set_audio_input()
437 	au8522_writereg(state, AU8522_I2S_CTRL_2_REG112H, 0xc2);  in set_audio_input()
440 	au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H, 0x09);  in set_audio_input()
447 	struct au8522_state *state =  in au8522_s_ctrl()  local
452 		au8522_writereg(state, AU8522_TVDEC_BRIGHTNESS_REG00AH,  in au8522_s_ctrl()
456 		au8522_writereg(state, AU8522_TVDEC_CONTRAST_REG00BH,  in au8522_s_ctrl()
460 		au8522_writereg(state, AU8522_TVDEC_SATURATION_CB_REG00CH,  in au8522_s_ctrl()
462 		au8522_writereg(state, AU8522_TVDEC_SATURATION_CR_REG00DH,  in au8522_s_ctrl()
466 		au8522_writereg(state, AU8522_TVDEC_HUE_H_REG00EH,  in au8522_s_ctrl()
468 		au8522_writereg(state, AU8522_TVDEC_HUE_L_REG00FH,  in au8522_s_ctrl()
484 	struct au8522_state *state = to_state(sd);  in au8522_g_register()  local
486 	reg->val = au8522_readreg(state, reg->reg & 0xffff);  in au8522_g_register()
493 	struct au8522_state *state = to_state(sd);  in au8522_s_register()  local
495 	au8522_writereg(state, reg->reg, reg->val & 0xff);  in au8522_s_register()
500 static void au8522_video_set(struct au8522_state *state)  in au8522_video_set()  argument
504 	au8522_writereg(state, 0xa4, 1 << 5);  in au8522_video_set()
506 	switch (state->vid_input) {  in au8522_video_set()
509 		au8522_setup_cvbs_mode(state, input_mode);  in au8522_video_set()
513 		au8522_setup_cvbs_mode(state, input_mode);  in au8522_video_set()
517 		au8522_setup_cvbs_mode(state, input_mode);  in au8522_video_set()
521 		au8522_setup_cvbs_mode(state, input_mode);  in au8522_video_set()
525 		au8522_setup_svideo_mode(state, input_mode);  in au8522_video_set()
529 		au8522_setup_svideo_mode(state, input_mode);  in au8522_video_set()
534 		au8522_setup_cvbs_tuner_mode(state, input_mode);  in au8522_video_set()
541 	struct au8522_state *state = to_state(sd);  in au8522_s_stream()  local
549 		state->current_frequency = 0;  in au8522_s_stream()
551 		au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H,  in au8522_s_stream()
555 		au8522_video_set(state);  in au8522_s_stream()
556 		set_audio_input(state);  in au8522_s_stream()
558 		state->operational_mode = AU8522_ANALOG_MODE;  in au8522_s_stream()
562 		au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H,  in au8522_s_stream()
564 		state->operational_mode = AU8522_SUSPEND_MODE;  in au8522_s_stream()
572 	struct au8522_state *state = to_state(sd);  in au8522_s_video_routing()  local
578 		state->vid_input = input;  in au8522_s_video_routing()
585 	if (state->operational_mode == AU8522_ANALOG_MODE)  in au8522_s_video_routing()
586 		au8522_video_set(state);  in au8522_s_video_routing()
593 	struct au8522_state *state = to_state(sd);  in au8522_s_std()  local
598 	state->std = std;  in au8522_s_std()
600 	if (state->operational_mode == AU8522_ANALOG_MODE)  in au8522_s_std()
601 		au8522_video_set(state);  in au8522_s_std()
609 	struct au8522_state *state = to_state(sd);  in au8522_s_audio_routing()  local
611 	state->aud_input = input;  in au8522_s_audio_routing()
613 	if (state->operational_mode == AU8522_ANALOG_MODE)  in au8522_s_audio_routing()
614 		set_audio_input(state);  in au8522_s_audio_routing()
622 	struct au8522_state *state = to_state(sd);  in au8522_g_tuner()  local
627 	lock_status = au8522_readreg(state, 0x00);  in au8522_g_tuner()
628 	pll_status = au8522_readreg(state, 0x7e);  in au8522_g_tuner()
684 	struct au8522_state *state;  in au8522_probe()  local
699 	instance = au8522_get_state(&state, client->adapter, client->addr);  in au8522_probe()
714 	state->config.demod_address = 0x8e >> 1;  in au8522_probe()
715 	state->i2c = client->adapter;  in au8522_probe()
717 	sd = &state->sd;  in au8522_probe()
721 	state->pads[DEMOD_PAD_IF_INPUT].flags = MEDIA_PAD_FL_SINK;  in au8522_probe()
722 	state->pads[DEMOD_PAD_VID_OUT].flags = MEDIA_PAD_FL_SOURCE;  in au8522_probe()
723 	state->pads[DEMOD_PAD_VBI_OUT].flags = MEDIA_PAD_FL_SOURCE;  in au8522_probe()
724 	state->pads[DEMOD_PAD_AUDIO_OUT].flags = MEDIA_PAD_FL_SOURCE;  in au8522_probe()
727 	ret = media_entity_pads_init(&sd->entity, ARRAY_SIZE(state->pads),  in au8522_probe()
728 				state->pads);  in au8522_probe()
735 	hdl = &state->hdl;  in au8522_probe()
751 		au8522_release_state(state);  in au8522_probe()
755 	state->c = client;  in au8522_probe()
756 	state->std = V4L2_STD_NTSC_M;  in au8522_probe()
757 	state->vid_input = AU8522_COMPOSITE_CH1;  in au8522_probe()
758 	state->aud_input = AU8522_AUDIO_NONE;  in au8522_probe()
759 	state->id = 8522;  in au8522_probe()
760 	state->rev = 0;  in au8522_probe()
763 	au8522_writereg(state, 0x106, 1);  in au8522_probe()