Lines Matching refs:ttbr
142 u64 ttbr[2]; member
612 cb->ttbr[0] = pgtbl_cfg->arm_v7s_cfg.ttbr[0]; in arm_smmu_init_context_bank()
613 cb->ttbr[1] = pgtbl_cfg->arm_v7s_cfg.ttbr[1]; in arm_smmu_init_context_bank()
615 cb->ttbr[0] = pgtbl_cfg->arm_lpae_s1_cfg.ttbr[0]; in arm_smmu_init_context_bank()
616 cb->ttbr[0] |= (u64)cfg->asid << TTBRn_ASID_SHIFT; in arm_smmu_init_context_bank()
617 cb->ttbr[1] = pgtbl_cfg->arm_lpae_s1_cfg.ttbr[1]; in arm_smmu_init_context_bank()
618 cb->ttbr[1] |= (u64)cfg->asid << TTBRn_ASID_SHIFT; in arm_smmu_init_context_bank()
621 cb->ttbr[0] = pgtbl_cfg->arm_lpae_s2_cfg.vttbr; in arm_smmu_init_context_bank()
698 writel_relaxed(cb->ttbr[0], cb_base + ARM_SMMU_CB_TTBR0); in arm_smmu_write_context_bank()
699 writel_relaxed(cb->ttbr[1], cb_base + ARM_SMMU_CB_TTBR1); in arm_smmu_write_context_bank()
701 writeq_relaxed(cb->ttbr[0], cb_base + ARM_SMMU_CB_TTBR0); in arm_smmu_write_context_bank()
703 writeq_relaxed(cb->ttbr[1], cb_base + ARM_SMMU_CB_TTBR1); in arm_smmu_write_context_bank()