Lines Matching refs:dev_notice
281 dev_notice(smmu->dev, "option %s\n", in parse_driver_options()
1695 dev_notice(smmu->dev, "probing hardware configuration...\n"); in arm_smmu_device_cfg_probe()
1696 dev_notice(smmu->dev, "SMMUv%d with:\n", in arm_smmu_device_cfg_probe()
1710 dev_notice(smmu->dev, "\tstage 1 translation\n"); in arm_smmu_device_cfg_probe()
1715 dev_notice(smmu->dev, "\tstage 2 translation\n"); in arm_smmu_device_cfg_probe()
1720 dev_notice(smmu->dev, "\tnested translation\n"); in arm_smmu_device_cfg_probe()
1732 dev_notice(smmu->dev, "\taddress translation ops\n"); in arm_smmu_device_cfg_probe()
1743 dev_notice(smmu->dev, "\t%scoherent table walk\n", in arm_smmu_device_cfg_probe()
1746 dev_notice(smmu->dev, in arm_smmu_device_cfg_probe()
1772 dev_notice(smmu->dev, in arm_smmu_device_cfg_probe()
1811 dev_notice(smmu->dev, "\t%u context banks (%u stage-2 only)\n", in arm_smmu_device_cfg_probe()
1823 dev_notice(smmu->dev, "\tenabling workaround for Cavium erratum 27704\n"); in arm_smmu_device_cfg_probe()
1881 dev_notice(smmu->dev, "\tSupported page sizes: 0x%08lx\n", in arm_smmu_device_cfg_probe()
1886 dev_notice(smmu->dev, "\tStage-1: %lu-bit VA -> %lu-bit IPA\n", in arm_smmu_device_cfg_probe()
1890 dev_notice(smmu->dev, "\tStage-2: %lu-bit IPA -> %lu-bit PA\n", in arm_smmu_device_cfg_probe()