Lines Matching refs:hideep_pgm_w_reg
259 static int hideep_pgm_w_reg(struct hideep_ts *ts, u32 addr, u32 val) in hideep_pgm_w_reg() function
277 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CNT, (clk)); \
278 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CON, 0x03); \
279 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CON, 0x01); \
283 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CON, \
287 hideep_pgm_w_reg(ts, HIDEEP_FLASH_PIO_SIG + (x), (y))
290 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CON, 0x00)
301 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CON, 0x00); in hideep_pgm_set()
302 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_SPC_CON, 0x00); in hideep_pgm_set()
303 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_CLK_ENA, 0xFF); in hideep_pgm_set()
304 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_CLK_CON, 0x01); in hideep_pgm_set()
305 hideep_pgm_w_reg(ts, HIDEEP_SYSCON_PWR_CON, 0x01); in hideep_pgm_set()
306 hideep_pgm_w_reg(ts, HIDEEP_FLASH_TIM, 0x03); in hideep_pgm_set()
307 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CACHE_CFG, 0x00); in hideep_pgm_set()
327 error = hideep_pgm_w_reg(ts, HIDEEP_ESI_TX_INVALID, 0x01); in hideep_pgm_get_pattern()
371 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_SFR_RPAGE); in hideep_nvm_unlock()
373 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_DEFAULT_PAGE); in hideep_nvm_unlock()
384 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_SFR_WPAGE); in hideep_nvm_unlock()
389 hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_DEFAULT_PAGE); in hideep_nvm_unlock()