758 static inline void qib_write_kreg(const struct qib_devdata *dd,
859 static inline void qib_write_kreg(const struct qib_devdata *dd,  in qib_write_kreg()  function
897 	qib_write_kreg(dd, regno + ctxt, value);  in qib_write_kreg_ctxt()
1357 			qib_write_kreg(dd, kr_sendbuffererror + i, sbuf[i]);  in qib_disarm_7322_senderrbufs()
1500 		qib_write_kreg(dd, kr_scratch, 0);  in qib_7322_sdma_sendctrl()
1512 	qib_write_kreg(dd, kr_scratch, 0);  in qib_7322_sdma_sendctrl()
1517 		qib_write_kreg(dd, kr_scratch, 0);  in qib_7322_sdma_sendctrl()
1685 	qib_write_kreg(dd, kr_errclear, errs);  in handle_7322_errors()
1742 	qib_write_kreg(dd, kr_errmask, dd->cspec->errormask);  in qib_error_tasklet()
2019 		qib_write_kreg(dd, kr_intmask, dd->cspec->int_enable_mask);  in qib_7322_set_intr_state()
2021 		qib_write_kreg(dd, kr_intclear, 0ULL);  in qib_7322_set_intr_state()
2027 				qib_write_kreg(dd, kr_intgranted, val);  in qib_7322_set_intr_state()
2030 		qib_write_kreg(dd, kr_intmask, 0ULL);  in qib_7322_set_intr_state()
2053 	qib_write_kreg(dd, kr_errmask, 0ULL);  in qib_7322_clear_freeze()
2064 	qib_write_kreg(dd, kr_control, dd->control);  in qib_7322_clear_freeze()
2073 	qib_write_kreg(dd, kr_hwerrclear, 0ULL);  in qib_7322_clear_freeze()
2074 	qib_write_kreg(dd, kr_errclear, E_SPKT_ERRS_IGNORE);  in qib_7322_clear_freeze()
2075 	qib_write_kreg(dd, kr_errmask, dd->cspec->errormask);  in qib_7322_clear_freeze()
2116 	qib_write_kreg(dd, kr_hwerrclear, hwerrs &  in qib_7322_handle_hwerrors()
2155 		qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask);  in qib_7322_handle_hwerrors()
2225 	qib_write_kreg(dd, kr_hwerrclear, ~HWE_MASK(PowerOnBISTFailed));  in qib_7322_init_hwerrors()
2226 	qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask);  in qib_7322_init_hwerrors()
2229 	qib_write_kreg(dd, kr_errclear, ~0ULL);  in qib_7322_init_hwerrors()
2231 	qib_write_kreg(dd, kr_errmask, ~0ULL);  in qib_7322_init_hwerrors()
2248 		qib_write_kreg(dd, kr_errclear, QIB_E_SPIOARMLAUNCH);  in qib_set_7322_armlaunch()
2252 	qib_write_kreg(dd, kr_errmask, dd->cspec->errormask);  in qib_set_7322_armlaunch()
2302 	qib_write_kreg(dd, kr_scratch, 0);  in qib_set_ib_7322_lstate()
2348 	qib_write_kreg(dd, kr_scratch, 0ULL);  in set_vls()
2361 	qib_write_kreg(dd, kr_scratch, 0ULL);  in set_vls()
2389 	qib_write_kreg(dd, kr_scratch, 0ULL);  in qib_7322_bringup_serdes()
2488 	qib_write_kreg(dd, kr_scratch, 0);  in qib_7322_bringup_serdes()
2498 	qib_write_kreg(dd, kr_scratch, 0ULL);  in qib_7322_bringup_serdes()
2562 		qib_write_kreg(dd, kr_hwdiagctrl,  in qib_7322_mini_quiet_serdes()
2590 		qib_write_kreg(dd, kr_hwdiagctrl, diagc);  in qib_7322_mini_quiet_serdes()
2660 	qib_write_kreg(dd, kr_extctrl, dd->cspec->extctrl);  in qib_setup_7322_setextled()
2686 			qib_write_kreg(dd, KREG_IDX(DCACtrlA),  in qib_7322_notify_dca()
2712 		qib_write_kreg(dd, rmp->regno,  in qib_update_rhdrq_dca()
2715 		qib_write_kreg(dd, KREG_IDX(DCACtrlA), cspec->dca_ctrl);  in qib_update_rhdrq_dca()
2740 		qib_write_kreg(dd, KREG_IDX(DCACtrlF),  in qib_update_sdma_dca()
2745 		qib_write_kreg(dd, KREG_IDX(DCACtrlA), cspec->dca_ctrl);  in qib_update_sdma_dca()
2782 		qib_write_kreg(dd, KREG_IDX(DCACtrlB) + i,  in qib_setup_dca()
2859 		qib_write_kreg(dd, kr_intgranted, intgranted);  in qib_7322_free_irq()
2871 		qib_write_kreg(dd, KREG_IDX(DCACtrlA), dd->cspec->dca_ctrl);  in qib_setup_7322_cleanup()
2890 			qib_write_kreg(dd, kr_gpio_mask, dd->cspec->gpio_mask);  in qib_setup_7322_cleanup()
2929 	qib_write_kreg(dd, kr_sendctrl, dd->sendctrl);  in qib_wantpiobuf_7322_intr()
2930 	qib_write_kreg(dd, kr_scratch, 0ULL);  in qib_wantpiobuf_7322_intr()
2948 	qib_write_kreg(dd, kr_intmask, (dd->cspec->int_enable_mask & ~kills));  in unknown_7322_ibits()
2973 	qib_write_kreg(dd, kr_gpio_clear, gpiostatus);  in unknown_7322_gpio_intr()
3012 		qib_write_kreg(dd, kr_gpio_mask, dd->cspec->gpio_mask);  in unknown_7322_gpio_intr()
3027 		qib_write_kreg(dd, kr_errmask, 0ULL);  in unlikely_7322_intr()
3057 	qib_write_kreg(dd, kr_rcvavailtimeout + rcd->ctxt, timeout);  in adjust_rcv_timeout()
3120 	qib_write_kreg(dd, kr_intclear, istat);  in qib_7322intr()
3178 	qib_write_kreg(dd, kr_intclear, ((1ULL << QIB_I_RCVAVAIL_LSB) |  in qib_7322pintr()
3205 	qib_write_kreg(dd, kr_intclear, QIB_I_SPIOBUFAVAIL);  in qib_7322bufavail()
3236 	qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ?  in sdma_intr()
3263 	qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ?  in sdma_idle_intr()
3290 	qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ?  in sdma_progress_intr()
3318 	qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ?  in sdma_cleanup_intr()
3402 		qib_write_kreg(dd, kr_intclear, ~0ULL);  in qib_setup_7322_interrupt()
3405 		qib_write_kreg(dd, kr_intgranted, ~0ULL);  in qib_setup_7322_interrupt()
3406 		qib_write_kreg(dd, kr_vecclr_wo_int, ~0ULL);  in qib_setup_7322_interrupt()
3540 		qib_write_kreg(dd, kr_intredirect + i, redirect[i]);  in qib_setup_7322_interrupt()
3726 			qib_write_kreg(dd, 2 * i +  in qib_do_7322_reset()
3729 			qib_write_kreg(dd, 1 + 2 * i +  in qib_do_7322_reset()
3953 	qib_write_kreg(dd, kr_rcvctrl, dd->rcvctrl);  in qib_7322_config_ctxts()
4155 			qib_write_kreg(dd, kr_scratch, 0ULL);  in qib_7322_set_ib_cfg()
4169 			qib_write_kreg(dd, kr_scratch, 0ULL);  in qib_7322_set_ib_cfg()
4189 		qib_write_kreg(dd, kr_scratch, 0ULL);  in qib_7322_set_ib_cfg()
4206 		qib_write_kreg(dd, kr_scratch, 0ULL);  in qib_7322_set_ib_cfg()
4318 	qib_write_kreg(dd, kr_scratch, 0);  in qib_7322_set_ib_cfg()
4353 		qib_write_kreg(ppd->dd, kr_scratch, 0);  in qib_7322_set_loopback()
4394 		qib_write_kreg(dd, kr_scratch, 0);  in set_vl_weights()
4545 		qib_write_kreg(dd, kr_rcvctrl, dd->rcvctrl);  in rcvctrl_7322_mod()
4661 			qib_write_kreg(dd, kr_sendctrl,  in sendctrl_7322_mod()
4664 			qib_write_kreg(dd, kr_scratch, 0);  in sendctrl_7322_mod()
4680 		qib_write_kreg(dd, kr_scratch, 0);  in sendctrl_7322_mod()
4694 		qib_write_kreg(dd, kr_sendctrl, tmp_dd_sendctrl);  in sendctrl_7322_mod()
4695 		qib_write_kreg(dd, kr_scratch, 0);  in sendctrl_7322_mod()
4700 		qib_write_kreg(dd, kr_scratch, 0);  in sendctrl_7322_mod()
4704 		qib_write_kreg(dd, kr_sendctrl, dd->sendctrl);  in sendctrl_7322_mod()
4705 		qib_write_kreg(dd, kr_scratch, 0);  in sendctrl_7322_mod()
4719 		qib_write_kreg(dd, kr_scratch, v);  in sendctrl_7322_mod()
4721 		qib_write_kreg(dd, kr_scratch, v);  in sendctrl_7322_mod()
5198 	qib_write_kreg(dd, kr_hwerrmask,  in qib_7322_mini_pcs_reset()
5208 	qib_write_kreg(dd, kr_scratch, 0ULL);  in qib_7322_mini_pcs_reset()
5209 	qib_write_kreg(dd, kr_hwerrclear,  in qib_7322_mini_pcs_reset()
5211 	qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask);  in qib_7322_mini_pcs_reset()
5342 	qib_write_kreg(ppd->dd, kr_scratch, 0);  in set_7322_ibspeed_fast()
5714 		qib_write_kreg(dd, kr_extctrl, dd->cspec->extctrl);  in gpio_7322_mod()
5715 		qib_write_kreg(dd, kr_gpio_out, new_out);  in gpio_7322_mod()
5915 		qib_write_kreg(dd, idx, tval);  in sendctrl_hook()
5916 		qib_write_kreg(dd, kr_scratch, 0Ull);  in sendctrl_hook()
6035 	qib_write_kreg(dd, kr_extctrl, dd->cspec->extctrl);  in qib_init_7322_qsfp()
6036 	qib_write_kreg(dd, kr_gpio_mask, dd->cspec->gpio_mask);  in qib_init_7322_qsfp()
6176 	qib_write_kreg(dd, kr_rcvhdrentsize, dd->rcvhdrentsize);  in qib_late_7322_initreg()
6177 	qib_write_kreg(dd, kr_rcvhdrsize, dd->rcvhdrsize);  in qib_late_7322_initreg()
6178 	qib_write_kreg(dd, kr_rcvhdrcnt, dd->rcvhdrcnt);  in qib_late_7322_initreg()
6179 	qib_write_kreg(dd, kr_sendpioavailaddr, dd->pioavailregs_phys);  in qib_late_7322_initreg()
6198 	qib_write_kreg(dd, kr_control, dd->control);  in qib_late_7322_initreg()
6216 	qib_write_kreg(dd, kr_control, dd->control);  in qib_late_7322_initreg()
6245 		qib_write_kreg(ppd->dd, kr_scratch, 0);  in write_7322_init_portregs()
6294 	qib_write_kreg(dd, KREG_IDX(RcvQPMulticastContext_1), 1);  in write_7322_initregs()
6346 		qib_write_kreg(dd, kr_rcvavailtimeout + i, rcv_int_timeout);  in write_7322_initregs()
7154 		qib_write_kreg(dd, kr_sendcheckmask + i,  in qib_7322_txchk_change()
7158 		qib_write_kreg(dd, kr_sendgrhcheckmask + i,  in qib_7322_txchk_change()
7160 		qib_write_kreg(dd, kr_sendibpktmask + i,  in qib_7322_txchk_change()
7175 	qib_write_kreg(dd, kr_scratch, val);  in writescratch()
7314 	qib_write_kreg(dd, kr_hwdiagctrl, 0);  in qib_init_iba7322_funcs()
7372 	qib_write_kreg(dd, regidx, pack_ent);  in set_txdds()
7374 	qib_write_kreg(ppd->dd, kr_scratch, 0);  in set_txdds()
7753 	qib_write_kreg(dd, KR_AHB_ACC, acc);  in ahb_mod()
7772 		qib_write_kreg(dd, KR_AHB_TRANS, trans);  in ahb_mod()
7795 		qib_write_kreg(dd, KR_AHB_TRANS, trans);  in ahb_mod()
7810 	qib_write_kreg(dd, KR_AHB_ACC, prev_acc);  in ahb_mod()
8266 	qib_write_kreg(dd, kr_r_access, val);  in qib_r_grab()
8309 		qib_write_kreg(dd, kr_r_access, val);  in qib_r_shift()
8317 	qib_write_kreg(dd, kr_r_access, val);  in qib_r_shift()
8335 		qib_write_kreg(dd, kr_r_access, val);  in qib_r_update()
8477 	qib_write_kreg(dd, kr_control, dd->control |  in check_7322_rxe_status()
8490 		qib_write_kreg(dd, kr_fmask, 0ULL);  in check_7322_rxe_status()
8495 	qib_write_kreg(ppd->dd, kr_hwerrclear,  in check_7322_rxe_status()
8499 	qib_write_kreg(dd, kr_control, dd->control);  in check_7322_rxe_status()