Lines Matching refs:DB_ADDR_SHIFT
58 #define DB_ADDR_SHIFT(addr) ((addr) << DB_PWM_ADDR_OFFSET_SHIFT) macro
722 uresp.db_offset = DB_ADDR_SHIFT(DQ_PWM_OFFSET_UCM_RDMA_CQ_CONS_32BIT); in qedr_copy_cq_uresp()
966 DB_ADDR_SHIFT(DQ_PWM_OFFSET_UCM_RDMA_CQ_CONS_32BIT); in qedr_create_cq()
1224 DB_ADDR_SHIFT(DQ_PWM_OFFSET_TCM_IWARP_RQ_PROD); in qedr_copy_rq_uresp()
1225 uresp->rq_db2_offset = DB_ADDR_SHIFT(DQ_PWM_OFFSET_TCM_FLAGS); in qedr_copy_rq_uresp()
1228 DB_ADDR_SHIFT(DQ_PWM_OFFSET_TCM_ROCE_RQ_PROD); in qedr_copy_rq_uresp()
1238 uresp->sq_db_offset = DB_ADDR_SHIFT(DQ_PWM_OFFSET_XCM_RDMA_SQ_PROD); in qedr_copy_sq_uresp()
1307 DB_ADDR_SHIFT(DQ_PWM_OFFSET_XCM_RDMA_SQ_PROD); in qedr_set_roce_db_info()
1311 DB_ADDR_SHIFT(DQ_PWM_OFFSET_TCM_ROCE_RQ_PROD); in qedr_set_roce_db_info()
1788 DB_ADDR_SHIFT(DQ_PWM_OFFSET_XCM_RDMA_SQ_PROD); in qedr_set_iwarp_db_info()
1792 DB_ADDR_SHIFT(DQ_PWM_OFFSET_TCM_IWARP_RQ_PROD); in qedr_set_iwarp_db_info()
1795 DB_ADDR_SHIFT(DQ_PWM_OFFSET_TCM_FLAGS); in qedr_set_iwarp_db_info()