124 	offset24 = (offset24) ? 0 : LS_64(1, I40IWQPSQ_VALID);  in i40iw_puda_post_recvbuf()
128 		      LS_64(buf->mem.size, I40IWQPSQ_FRAG_LEN));  in i40iw_puda_post_recvbuf()
396 	header[0] = LS_64((info->maclen >> 1), I40IW_UDA_QPSQ_MACLEN) |  in i40iw_puda_send()
397 		    LS_64(iplen, I40IW_UDA_QPSQ_IPLEN) | LS_64(1, I40IW_UDA_QPSQ_L4T) |  in i40iw_puda_send()
398 		    LS_64(iipt, I40IW_UDA_QPSQ_IIPT) |  in i40iw_puda_send()
399 		    LS_64(l4len, I40IW_UDA_QPSQ_L4LEN);  in i40iw_puda_send()
401 	header[1] = LS_64(I40IW_OP_TYPE_SEND, I40IW_UDA_QPSQ_OPCODE) |  in i40iw_puda_send()
402 		    LS_64(1, I40IW_UDA_QPSQ_SIGCOMPL) |  in i40iw_puda_send()
403 		    LS_64(info->doloopback, I40IW_UDA_QPSQ_DOLOOPBACK) |  in i40iw_puda_send()
404 		    LS_64(qp->qp_uk.swqe_polarity, I40IW_UDA_QPSQ_VALID);  in i40iw_puda_send()
407 	set_64bit_val(wqe, 8, LS_64(info->len, I40IWQPSQ_FRAG_LEN));  in i40iw_puda_send()
487 		      LS_64(qp->hw_rq_size, I40IWQPC_RQSIZE) |  in i40iw_puda_qp_setctx()
488 		      LS_64(qp->hw_sq_size, I40IWQPC_SQSIZE));  in i40iw_puda_qp_setctx()
490 	set_64bit_val(qp_ctx, 48, LS_64(rsrc->buf_size, I40IW_UDA_QPC_MAXFRAMESIZE));  in i40iw_puda_qp_setctx()
495 		      LS_64(rsrc->cq_id, I40IWQPC_TXCQNUM) |  in i40iw_puda_qp_setctx()
496 		      LS_64(rsrc->cq_id, I40IWQPC_RXCQNUM));  in i40iw_puda_qp_setctx()
498 	set_64bit_val(qp_ctx, 160, LS_64(1, I40IWQPC_PRIVEN));  in i40iw_puda_qp_setctx()
501 		      LS_64((uintptr_t)qp, I40IWQPC_QPCOMPCTX));  in i40iw_puda_qp_setctx()
504 		      LS_64(qp->sq_tph_val, I40IWQPC_SQTPHVAL) |  in i40iw_puda_qp_setctx()
505 		      LS_64(qp->rq_tph_val, I40IWQPC_RQTPHVAL) |  in i40iw_puda_qp_setctx()
506 		      LS_64(qp->qs_handle, I40IWQPC_QSHANDLE));  in i40iw_puda_qp_setctx()
532 		 LS_64(I40IW_CQP_OP_CREATE_QP, I40IW_CQPSQ_OPCODE) |  in i40iw_puda_qp_wqe()
533 		 LS_64(I40IW_QP_TYPE_UDA, I40IW_CQPSQ_QP_QPTYPE) |  in i40iw_puda_qp_wqe()
534 		 LS_64(1, I40IW_CQPSQ_QP_CQNUMVALID) |  in i40iw_puda_qp_wqe()
535 		 LS_64(2, I40IW_CQPSQ_QP_NEXTIWSTATE) |  in i40iw_puda_qp_wqe()
536 		 LS_64(cqp->polarity, I40IW_CQPSQ_WQEVALID);  in i40iw_puda_qp_wqe()
644 		      LS_64(cq->shadow_read_threshold,  in i40iw_puda_cq_wqe()
651 	    LS_64(I40IW_CQP_OP_CREATE_CQ, I40IW_CQPSQ_OPCODE) |  in i40iw_puda_cq_wqe()
652 	    LS_64(1, I40IW_CQPSQ_CQ_CHKOVERFLOW) |  in i40iw_puda_cq_wqe()
653 	    LS_64(1, I40IW_CQPSQ_CQ_ENCEQEMASK) |  in i40iw_puda_cq_wqe()
654 	    LS_64(1, I40IW_CQPSQ_CQ_CEQIDVALID) |  in i40iw_puda_cq_wqe()
655 	    LS_64(cqp->polarity, I40IW_CQPSQ_WQEVALID);  in i40iw_puda_cq_wqe()
996 	offset24 = (offset24) ? 0 : LS_64(1, I40IWQPSQ_VALID);  in i40iw_ilq_putback_rcvbuf()