172 		dd_dev_err(dd, "chip PIO range does not match\n");  in hfi1_pcie_ddinit()
178 		dd_dev_err(dd, "UC mapping of kregbase1 failed\n");  in hfi1_pcie_ddinit()
186 		dd_dev_err(dd, "Cannot read chip CSRs\n");  in hfi1_pcie_ddinit()
198 		dd_dev_err(dd, "UC mapping of kregbase2 failed\n");  in hfi1_pcie_ddinit()
206 		dd_dev_err(dd, "WC mapping of send buffers failed\n");  in hfi1_pcie_ddinit()
220 		dd_dev_err(dd, "WC mapping of receive array failed\n");  in hfi1_pcie_ddinit()
290 		dd_dev_err(dd, "Unable to read from PCI config\n");  in update_lbus_info()
311 		dd_dev_err(dd, "Can't find PCI Express capability!\n");  in pcie_speeds()
320 		dd_dev_err(dd, "Unable to read from PCI config\n");  in pcie_speeds()
358 		dd_dev_err(dd, "pci_alloc_irq_vectors() failed: %d\n", nvec);  in request_msix()
418 	dd_dev_err(dd, "Unable to write to PCI config\n");  in restore_pci_variables()
473 	dd_dev_err(dd, "Unable to read from PCI config\n");  in save_pci_variables()
819 			dd_dev_err(dd, "Unable to read from PCI config\n");  in load_eq_table()
827 				dd_dev_err(dd,  in load_eq_table()
829 				dd_dev_err(dd, "         prec   attn   post\n");  in load_eq_table()
831 			dd_dev_err(dd, "   p%02d:   %02x     %02x     %02x\n",  in load_eq_table()
834 			dd_dev_err(dd, "            %02x     %02x     %02x\n",  in load_eq_table()
882 		dd_dev_err(dd, "%s: no parent device\n", __func__);  in trigger_sbr()
889 			dd_dev_err(dd,  in trigger_sbr()
1080 		dd_dev_err(dd, "The PCIe link is not Gen3 capable\n");  in do_pcie_gen3_transition()
1088 		dd_dev_err(dd, "%s: unable to acquire SBus resource\n",  in do_pcie_gen3_transition()
1195 		dd_dev_err(dd, "%s: Invalid Eq Pset %u, setting to %d\n",  in do_pcie_gen3_transition()
1275 		dd_dev_err(dd, "Unable to read from PCI config\n");  in do_pcie_gen3_transition()
1291 			dd_dev_err(dd, "Unable to write to PCI config\n");  in do_pcie_gen3_transition()
1302 		dd_dev_err(dd, "Unable to read from PCI config\n");  in do_pcie_gen3_transition()
1315 		dd_dev_err(dd, "Unable to write to PCI config\n");  in do_pcie_gen3_transition()
1370 		dd_dev_err(dd, "%s: Could not restore PCI variables\n",  in do_pcie_gen3_transition()
1392 		dd_dev_err(dd, "SBR failed - unable to read from device\n");  in do_pcie_gen3_transition()
1407 		dd_dev_err(dd, "Unable to read from PCI config\n");  in do_pcie_gen3_transition()
1418 		dd_dev_err(dd,  in do_pcie_gen3_transition()
1429 		dd_dev_err(dd, "%s: gasket error %d\n", __func__, err);  in do_pcie_gen3_transition()
1442 		dd_dev_err(dd, "PCIe link speed did not switch to Gen%d%s\n",  in do_pcie_gen3_transition()
1463 		dd_dev_err(dd, "Proceeding at current speed PCIe speed\n");  in do_pcie_gen3_transition()