158 #define LRH_BTH_QW             0ull
167 #define LRH_SC_QW              0ull
172 #define LRH_SC_VALUE           0ull
182 #define L2_TYPE_QW             0ull
191 #define L4_TYPE_BIT_OFFSET      0ull
660 /* 0*/	FLAG_ENTRY0("Reserved", 0ull),
6539 	write_csr(dd, DC_DC8051_CFG_RST, 0ull);  in _dc_start()
6797 				   freeze ? ALL_FROZE : 0ull);  in wait_for_freeze_status()
9184 		write_csr(dd, DC_LCB_ERR_EN, ~0ull); /* watch LCB errors */  in do_quick_linkup()
10411 	write_csr(dd, DC_LCB_ERR_EN, ~0ull); /* watch LCB errors */  in goto_offline()
13015 			write_csr(dd, CCE_INT_MASK + (8 * i), 0ull);  in set_intr_state()
13654 	write_csr(dd, CCE_ERR_CLEAR, ~0ull);  in reset_cce_csrs()
13667 		write_csr(dd, CCE_MSIX_INT_GRANTED, ~0ull);  in reset_cce_csrs()
13668 		write_csr(dd, CCE_MSIX_VEC_CLR_WITHOUT_INT, ~0ull);  in reset_cce_csrs()
13675 		write_csr(dd, CCE_INT_CLEAR + (8 * i), ~0ull);  in reset_cce_csrs()
13707 	write_csr(dd, MISC_ERR_CLEAR, ~0ull);  in reset_misc_csrs()
13729 	write_csr(dd, SEND_PIO_ERR_CLEAR, ~0ull);  in reset_txe_csrs()
13733 	write_csr(dd, SEND_DMA_ERR_CLEAR, ~0ull);  in reset_txe_csrs()
13737 	write_csr(dd, SEND_EGRESS_ERR_CLEAR, ~0ull);  in reset_txe_csrs()
13749 	write_csr(dd, SEND_ERR_CLEAR, ~0ull);  in reset_txe_csrs()
13776 	write_csr(dd, SEND_EGRESS_ERR_INFO, ~0ull);  in reset_txe_csrs()
13789 		write_kctxt_csr(dd, i, SEND_CTXT_ERR_CLEAR, ~0ull);  in reset_txe_csrs()
13816 		write_kctxt_csr(dd, i, SEND_DMA_ENG_ERR_CLEAR, ~0ull);  in reset_txe_csrs()
13916 	write_csr(dd, RCV_ERR_CLEAR, ~0ull);  in reset_rxe_csrs()
14060 		write_csr(dd, CCE_INT_MASK + (8 * i), 0ull);  in init_chip()
14581 	write_csr(dd, RCV_ERR_MASK, ~0ull);  in init_rxe()
14615 	write_csr(dd, CCE_ERR_MASK, ~0ull);  in init_other()
14619 	write_csr(dd, DCC_ERR_FLG_EN, ~0ull);  in init_other()
14620 	write_csr(dd, DC_DC8051_ERR_EN, ~0ull);  in init_other()
14635 		  0ull << SEND_CM_LOCAL_AU_TABLE0_TO3_LOCAL_AU_TABLE0_SHIFT |  in assign_cm_au_table()
14669 	write_csr(dd, SEND_PIO_ERR_MASK, ~0ull);  in init_txe()
14670 	write_csr(dd, SEND_DMA_ERR_MASK, ~0ull);  in init_txe()
14671 	write_csr(dd, SEND_ERR_MASK, ~0ull);  in init_txe()
14672 	write_csr(dd, SEND_EGRESS_ERR_MASK, ~0ull);  in init_txe()
14676 		write_kctxt_csr(dd, i, SEND_CTXT_ERR_MASK, ~0ull);  in init_txe()
14678 		write_kctxt_csr(dd, i, SEND_DMA_ENG_ERR_MASK, ~0ull);  in init_txe()
14892 	write_csr(dd, CCE_INT_MASK, 0ull);  in check_int_registers()