14278 			 struct rsm_rule_data *rrd)  in add_rsm_rule()  argument
14281 		  (u64)rrd->offset << RCV_RSM_CFG_OFFSET_SHIFT |  in add_rsm_rule()
14283 		  (u64)rrd->pkt_type << RCV_RSM_CFG_PACKET_TYPE_SHIFT);  in add_rsm_rule()
14285 		  (u64)rrd->field1_off << RCV_RSM_SELECT_FIELD1_OFFSET_SHIFT |  in add_rsm_rule()
14286 		  (u64)rrd->field2_off << RCV_RSM_SELECT_FIELD2_OFFSET_SHIFT |  in add_rsm_rule()
14287 		  (u64)rrd->index1_off << RCV_RSM_SELECT_INDEX1_OFFSET_SHIFT |  in add_rsm_rule()
14288 		  (u64)rrd->index1_width << RCV_RSM_SELECT_INDEX1_WIDTH_SHIFT |  in add_rsm_rule()
14289 		  (u64)rrd->index2_off << RCV_RSM_SELECT_INDEX2_OFFSET_SHIFT |  in add_rsm_rule()
14290 		  (u64)rrd->index2_width << RCV_RSM_SELECT_INDEX2_WIDTH_SHIFT);  in add_rsm_rule()
14292 		  (u64)rrd->mask1 << RCV_RSM_MATCH_MASK1_SHIFT |  in add_rsm_rule()
14293 		  (u64)rrd->value1 << RCV_RSM_MATCH_VALUE1_SHIFT |  in add_rsm_rule()
14294 		  (u64)rrd->mask2 << RCV_RSM_MATCH_MASK2_SHIFT |  in add_rsm_rule()
14295 		  (u64)rrd->value2 << RCV_RSM_MATCH_VALUE2_SHIFT);  in add_rsm_rule()
14368 	struct rsm_rule_data rrd;  in init_qos()  local
14409 	rrd.offset = rmt->used;  in init_qos()
14410 	rrd.pkt_type = 2;  in init_qos()
14411 	rrd.field1_off = LRH_BTH_MATCH_OFFSET;  in init_qos()
14412 	rrd.field2_off = LRH_SC_MATCH_OFFSET;  in init_qos()
14413 	rrd.index1_off = LRH_SC_SELECT_OFFSET;  in init_qos()
14414 	rrd.index1_width = n;  in init_qos()
14415 	rrd.index2_off = QPN_SELECT_OFFSET;  in init_qos()
14416 	rrd.index2_width = m + n;  in init_qos()
14417 	rrd.mask1 = LRH_BTH_MASK;  in init_qos()
14418 	rrd.value1 = LRH_BTH_VALUE;  in init_qos()
14419 	rrd.mask2 = LRH_SC_MASK;  in init_qos()
14420 	rrd.value2 = LRH_SC_VALUE;  in init_qos()
14423 	add_rsm_rule(dd, RSM_INS_VERBS, &rrd);  in init_qos()
14439 	struct rsm_rule_data rrd;  in init_user_fecn_handling()  local
14483 	rrd.offset = offset;  in init_user_fecn_handling()
14484 	rrd.pkt_type = 0;  in init_user_fecn_handling()
14485 	rrd.field1_off = 95;  in init_user_fecn_handling()
14486 	rrd.field2_off = 133;  in init_user_fecn_handling()
14487 	rrd.index1_off = 64;  in init_user_fecn_handling()
14488 	rrd.index1_width = 8;  in init_user_fecn_handling()
14489 	rrd.index2_off = 0;  in init_user_fecn_handling()
14490 	rrd.index2_width = 0;  in init_user_fecn_handling()
14491 	rrd.mask1 = 1;  in init_user_fecn_handling()
14492 	rrd.value1 = 1;  in init_user_fecn_handling()
14493 	rrd.mask2 = 1;  in init_user_fecn_handling()
14494 	rrd.value2 = 1;  in init_user_fecn_handling()
14497 	add_rsm_rule(dd, RSM_INS_FECN, &rrd);  in init_user_fecn_handling()
14509 	struct rsm_rule_data rrd;  in hfi1_init_vnic_rsm()  local
14545 	rrd.offset = dd->vnic.rmt_start;  in hfi1_init_vnic_rsm()
14546 	rrd.pkt_type = 4;  in hfi1_init_vnic_rsm()
14548 	rrd.field1_off = L2_TYPE_MATCH_OFFSET;  in hfi1_init_vnic_rsm()
14549 	rrd.mask1 = L2_TYPE_MASK;  in hfi1_init_vnic_rsm()
14550 	rrd.value1 = L2_16B_VALUE;  in hfi1_init_vnic_rsm()
14552 	rrd.field2_off = L4_TYPE_MATCH_OFFSET;  in hfi1_init_vnic_rsm()
14553 	rrd.mask2 = L4_16B_TYPE_MASK;  in hfi1_init_vnic_rsm()
14554 	rrd.value2 = L4_16B_ETH_VALUE;  in hfi1_init_vnic_rsm()
14556 	rrd.index1_off = L4_16B_HDR_VESWID_OFFSET;  in hfi1_init_vnic_rsm()
14557 	rrd.index1_width = ilog2(NUM_VNIC_MAP_ENTRIES);  in hfi1_init_vnic_rsm()
14558 	rrd.index2_off = L2_16B_ENTROPY_OFFSET;  in hfi1_init_vnic_rsm()
14559 	rrd.index2_width = ilog2(NUM_VNIC_MAP_ENTRIES);  in hfi1_init_vnic_rsm()
14560 	add_rsm_rule(dd, RSM_INS_VNIC, &rrd);  in hfi1_init_vnic_rsm()