118 	struct xadc *xadc = iio_priv(indio_dev);  in xadc_read_event_config()  local
120 	return (bool)(xadc->alarm_mask & xadc_get_alarm_mask(chan));  in xadc_read_event_config()
128 	struct xadc *xadc = iio_priv(indio_dev);  in xadc_write_event_config()  local
132 	mutex_lock(&xadc->mutex);  in xadc_write_event_config()
135 		xadc->alarm_mask |= alarm;  in xadc_write_event_config()
137 		xadc->alarm_mask &= ~alarm;  in xadc_write_event_config()
139 	xadc->ops->update_alarm(xadc, xadc->alarm_mask);  in xadc_write_event_config()
141 	ret = _xadc_read_adc_reg(xadc, XADC_REG_CONF1, &cfg);  in xadc_write_event_config()
147 	cfg &= ~((xadc->alarm_mask & 0xf0) << 4); /* bram, pint, paux, ddr */  in xadc_write_event_config()
148 	cfg &= ~((xadc->alarm_mask & 0x08) >> 3); /* ot */  in xadc_write_event_config()
149 	cfg &= ~((xadc->alarm_mask & 0x07) << 1); /* temp, vccint, vccaux */  in xadc_write_event_config()
151 		ret = _xadc_write_adc_reg(xadc, XADC_REG_CONF1, cfg);  in xadc_write_event_config()
154 	mutex_unlock(&xadc->mutex);  in xadc_write_event_config()
168 	struct xadc *xadc = iio_priv(indio_dev);  in xadc_read_event_value()  local
172 		*val = xadc->threshold[offset];  in xadc_read_event_value()
175 		*val = xadc->temp_hysteresis;  in xadc_read_event_value()
192 	struct xadc *xadc = iio_priv(indio_dev);  in xadc_write_event_value()  local
200 	mutex_lock(&xadc->mutex);  in xadc_write_event_value()
204 		xadc->threshold[offset] = val;  in xadc_write_event_value()
207 		xadc->temp_hysteresis = val;  in xadc_write_event_value()
210 		mutex_unlock(&xadc->mutex);  in xadc_write_event_value()
228 		if (xadc->threshold[offset] < xadc->temp_hysteresis)  in xadc_write_event_value()
229 			xadc->threshold[offset + 4] = 0;  in xadc_write_event_value()
231 			xadc->threshold[offset + 4] = xadc->threshold[offset] -  in xadc_write_event_value()
232 					xadc->temp_hysteresis;  in xadc_write_event_value()
233 		ret = _xadc_write_adc_reg(xadc, XADC_REG_THRESHOLD(offset + 4),  in xadc_write_event_value()
234 			xadc->threshold[offset + 4]);  in xadc_write_event_value()
240 		ret = _xadc_write_adc_reg(xadc, XADC_REG_THRESHOLD(offset), val);  in xadc_write_event_value()
243 	mutex_unlock(&xadc->mutex);  in xadc_write_event_value()