213 static void dvc_writel(struct tegra_i2c_dev *i2c_dev, u32 val,  in dvc_writel()  argument
216 	writel(val, i2c_dev->base + reg);  in dvc_writel()
219 static u32 dvc_readl(struct tegra_i2c_dev *i2c_dev, unsigned long reg)  in dvc_readl()  argument
221 	return readl(i2c_dev->base + reg);  in dvc_readl()
228 static unsigned long tegra_i2c_reg_addr(struct tegra_i2c_dev *i2c_dev,  in tegra_i2c_reg_addr()  argument
231 	if (i2c_dev->is_dvc)  in tegra_i2c_reg_addr()
236 static void i2c_writel(struct tegra_i2c_dev *i2c_dev, u32 val,  in i2c_writel()  argument
239 	writel(val, i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));  in i2c_writel()
243 		readl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));  in i2c_writel()
246 static u32 i2c_readl(struct tegra_i2c_dev *i2c_dev, unsigned long reg)  in i2c_readl()  argument
248 	return readl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));  in i2c_readl()
251 static void i2c_writesl(struct tegra_i2c_dev *i2c_dev, void *data,  in i2c_writesl()  argument
254 	writesl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len);  in i2c_writesl()
257 static void i2c_readsl(struct tegra_i2c_dev *i2c_dev, void *data,  in i2c_readsl()  argument
260 	readsl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len);  in i2c_readsl()
263 static void tegra_i2c_mask_irq(struct tegra_i2c_dev *i2c_dev, u32 mask)  in tegra_i2c_mask_irq()  argument
267 	int_mask = i2c_readl(i2c_dev, I2C_INT_MASK) & ~mask;  in tegra_i2c_mask_irq()
268 	i2c_writel(i2c_dev, int_mask, I2C_INT_MASK);  in tegra_i2c_mask_irq()
271 static void tegra_i2c_unmask_irq(struct tegra_i2c_dev *i2c_dev, u32 mask)  in tegra_i2c_unmask_irq()  argument
275 	int_mask = i2c_readl(i2c_dev, I2C_INT_MASK) | mask;  in tegra_i2c_unmask_irq()
276 	i2c_writel(i2c_dev, int_mask, I2C_INT_MASK);  in tegra_i2c_unmask_irq()
279 static int tegra_i2c_flush_fifos(struct tegra_i2c_dev *i2c_dev)  in tegra_i2c_flush_fifos()  argument
285 	if (i2c_dev->hw->has_mst_fifo) {  in tegra_i2c_flush_fifos()
295 	val = i2c_readl(i2c_dev, offset);  in tegra_i2c_flush_fifos()
297 	i2c_writel(i2c_dev, val, offset);  in tegra_i2c_flush_fifos()
299 	while (i2c_readl(i2c_dev, offset) & mask) {  in tegra_i2c_flush_fifos()
301 			dev_warn(i2c_dev->dev, "timeout waiting for fifo flush\n");  in tegra_i2c_flush_fifos()
309 static int tegra_i2c_empty_rx_fifo(struct tegra_i2c_dev *i2c_dev)  in tegra_i2c_empty_rx_fifo()  argument
313 	u8 *buf = i2c_dev->msg_buf;  in tegra_i2c_empty_rx_fifo()
314 	size_t buf_remaining = i2c_dev->msg_buf_remaining;  in tegra_i2c_empty_rx_fifo()
317 	if (i2c_dev->hw->has_mst_fifo) {  in tegra_i2c_empty_rx_fifo()
318 		val = i2c_readl(i2c_dev, I2C_MST_FIFO_STATUS);  in tegra_i2c_empty_rx_fifo()
322 		val = i2c_readl(i2c_dev, I2C_FIFO_STATUS);  in tegra_i2c_empty_rx_fifo()
332 	i2c_readsl(i2c_dev, buf, I2C_RX_FIFO, words_to_transfer);  in tegra_i2c_empty_rx_fifo()
344 		val = i2c_readl(i2c_dev, I2C_RX_FIFO);  in tegra_i2c_empty_rx_fifo()
352 	i2c_dev->msg_buf_remaining = buf_remaining;  in tegra_i2c_empty_rx_fifo()
353 	i2c_dev->msg_buf = buf;  in tegra_i2c_empty_rx_fifo()
358 static int tegra_i2c_fill_tx_fifo(struct tegra_i2c_dev *i2c_dev)  in tegra_i2c_fill_tx_fifo()  argument
362 	u8 *buf = i2c_dev->msg_buf;  in tegra_i2c_fill_tx_fifo()
363 	size_t buf_remaining = i2c_dev->msg_buf_remaining;  in tegra_i2c_fill_tx_fifo()
366 	if (i2c_dev->hw->has_mst_fifo) {  in tegra_i2c_fill_tx_fifo()
367 		val = i2c_readl(i2c_dev, I2C_MST_FIFO_STATUS);  in tegra_i2c_fill_tx_fifo()
371 		val = i2c_readl(i2c_dev, I2C_FIFO_STATUS);  in tegra_i2c_fill_tx_fifo()
393 		i2c_dev->msg_buf_remaining = buf_remaining;  in tegra_i2c_fill_tx_fifo()
394 		i2c_dev->msg_buf = buf +  in tegra_i2c_fill_tx_fifo()
398 		i2c_writesl(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer);  in tegra_i2c_fill_tx_fifo()
414 		i2c_dev->msg_buf_remaining = 0;  in tegra_i2c_fill_tx_fifo()
415 		i2c_dev->msg_buf = NULL;  in tegra_i2c_fill_tx_fifo()
418 		i2c_writel(i2c_dev, val, I2C_TX_FIFO);  in tegra_i2c_fill_tx_fifo()
431 static void tegra_dvc_init(struct tegra_i2c_dev *i2c_dev)  in tegra_dvc_init()  argument
435 	val = dvc_readl(i2c_dev, DVC_CTRL_REG3);  in tegra_dvc_init()
438 	dvc_writel(i2c_dev, val, DVC_CTRL_REG3);  in tegra_dvc_init()
440 	val = dvc_readl(i2c_dev, DVC_CTRL_REG1);  in tegra_dvc_init()
442 	dvc_writel(i2c_dev, val, DVC_CTRL_REG1);  in tegra_dvc_init()
447 	struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev);  in tegra_i2c_runtime_resume()  local
450 	ret = pinctrl_pm_select_default_state(i2c_dev->dev);  in tegra_i2c_runtime_resume()
454 	if (!i2c_dev->hw->has_single_clk_source) {  in tegra_i2c_runtime_resume()
455 		ret = clk_enable(i2c_dev->fast_clk);  in tegra_i2c_runtime_resume()
457 			dev_err(i2c_dev->dev,  in tegra_i2c_runtime_resume()
463 	ret = clk_enable(i2c_dev->div_clk);  in tegra_i2c_runtime_resume()
465 		dev_err(i2c_dev->dev,  in tegra_i2c_runtime_resume()
467 		clk_disable(i2c_dev->fast_clk);  in tegra_i2c_runtime_resume()
476 	struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev);  in tegra_i2c_runtime_suspend()  local
478 	clk_disable(i2c_dev->div_clk);  in tegra_i2c_runtime_suspend()
479 	if (!i2c_dev->hw->has_single_clk_source)  in tegra_i2c_runtime_suspend()
480 		clk_disable(i2c_dev->fast_clk);  in tegra_i2c_runtime_suspend()
482 	return pinctrl_pm_select_idle_state(i2c_dev->dev);  in tegra_i2c_runtime_suspend()
485 static int tegra_i2c_wait_for_config_load(struct tegra_i2c_dev *i2c_dev)  in tegra_i2c_wait_for_config_load()  argument
492 	if (i2c_dev->hw->has_config_load_reg) {  in tegra_i2c_wait_for_config_load()
493 		reg_offset = tegra_i2c_reg_addr(i2c_dev, I2C_CONFIG_LOAD);  in tegra_i2c_wait_for_config_load()
494 		addr = i2c_dev->base + reg_offset;  in tegra_i2c_wait_for_config_load()
495 		i2c_writel(i2c_dev, I2C_MSTR_CONFIG_LOAD, I2C_CONFIG_LOAD);  in tegra_i2c_wait_for_config_load()
504 			dev_warn(i2c_dev->dev,  in tegra_i2c_wait_for_config_load()
513 static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev)  in tegra_i2c_init()  argument
519 	err = pm_runtime_get_sync(i2c_dev->dev);  in tegra_i2c_init()
521 		dev_err(i2c_dev->dev, "runtime resume failed %d\n", err);  in tegra_i2c_init()
525 	reset_control_assert(i2c_dev->rst);  in tegra_i2c_init()
527 	reset_control_deassert(i2c_dev->rst);  in tegra_i2c_init()
529 	if (i2c_dev->is_dvc)  in tegra_i2c_init()
530 		tegra_dvc_init(i2c_dev);  in tegra_i2c_init()
535 	if (i2c_dev->hw->has_multi_master_mode)  in tegra_i2c_init()
538 	i2c_writel(i2c_dev, val, I2C_CNFG);  in tegra_i2c_init()
539 	i2c_writel(i2c_dev, 0, I2C_INT_MASK);  in tegra_i2c_init()
542 	clk_divisor = i2c_dev->hw->clk_divisor_hs_mode;  in tegra_i2c_init()
543 	clk_divisor |= i2c_dev->clk_divisor_non_hs_mode <<  in tegra_i2c_init()
545 	i2c_writel(i2c_dev, clk_divisor, I2C_CLK_DIVISOR);  in tegra_i2c_init()
547 	if (!i2c_dev->is_dvc) {  in tegra_i2c_init()
548 		u32 sl_cfg = i2c_readl(i2c_dev, I2C_SL_CNFG);  in tegra_i2c_init()
551 		i2c_writel(i2c_dev, sl_cfg, I2C_SL_CNFG);  in tegra_i2c_init()
552 		i2c_writel(i2c_dev, 0xfc, I2C_SL_ADDR1);  in tegra_i2c_init()
553 		i2c_writel(i2c_dev, 0x00, I2C_SL_ADDR2);  in tegra_i2c_init()
556 	if (i2c_dev->hw->has_mst_fifo) {  in tegra_i2c_init()
559 		i2c_writel(i2c_dev, val, I2C_MST_FIFO_CONTROL);  in tegra_i2c_init()
563 		i2c_writel(i2c_dev, val, I2C_FIFO_CONTROL);  in tegra_i2c_init()
566 	err = tegra_i2c_flush_fifos(i2c_dev);  in tegra_i2c_init()
570 	if (i2c_dev->is_multimaster_mode && i2c_dev->hw->has_slcg_override_reg)  in tegra_i2c_init()
571 		i2c_writel(i2c_dev, I2C_MST_CORE_CLKEN_OVR, I2C_CLKEN_OVERRIDE);  in tegra_i2c_init()
573 	err = tegra_i2c_wait_for_config_load(i2c_dev);  in tegra_i2c_init()
577 	if (i2c_dev->irq_disabled) {  in tegra_i2c_init()
578 		i2c_dev->irq_disabled = false;  in tegra_i2c_init()
579 		enable_irq(i2c_dev->irq);  in tegra_i2c_init()
583 	pm_runtime_put(i2c_dev->dev);  in tegra_i2c_init()
587 static int tegra_i2c_disable_packet_mode(struct tegra_i2c_dev *i2c_dev)  in tegra_i2c_disable_packet_mode()  argument
597 	udelay(DIV_ROUND_UP(2 * 1000000, i2c_dev->bus_clk_rate));  in tegra_i2c_disable_packet_mode()
599 	cnfg = i2c_readl(i2c_dev, I2C_CNFG);  in tegra_i2c_disable_packet_mode()
601 		i2c_writel(i2c_dev, cnfg & ~I2C_CNFG_PACKET_MODE_EN, I2C_CNFG);  in tegra_i2c_disable_packet_mode()
603 	return tegra_i2c_wait_for_config_load(i2c_dev);  in tegra_i2c_disable_packet_mode()
610 	struct tegra_i2c_dev *i2c_dev = dev_id;  in tegra_i2c_isr()  local
613 	status = i2c_readl(i2c_dev, I2C_INT_STATUS);  in tegra_i2c_isr()
615 	spin_lock_irqsave(&i2c_dev->xfer_lock, flags);  in tegra_i2c_isr()
617 		dev_warn(i2c_dev->dev, "irq status 0 %08x %08x %08x\n",  in tegra_i2c_isr()
618 			 i2c_readl(i2c_dev, I2C_PACKET_TRANSFER_STATUS),  in tegra_i2c_isr()
619 			 i2c_readl(i2c_dev, I2C_STATUS),  in tegra_i2c_isr()
620 			 i2c_readl(i2c_dev, I2C_CNFG));  in tegra_i2c_isr()
621 		i2c_dev->msg_err |= I2C_ERR_UNKNOWN_INTERRUPT;  in tegra_i2c_isr()
623 		if (!i2c_dev->irq_disabled) {  in tegra_i2c_isr()
624 			disable_irq_nosync(i2c_dev->irq);  in tegra_i2c_isr()
625 			i2c_dev->irq_disabled = true;  in tegra_i2c_isr()
631 		tegra_i2c_disable_packet_mode(i2c_dev);  in tegra_i2c_isr()
633 			i2c_dev->msg_err |= I2C_ERR_NO_ACK;  in tegra_i2c_isr()
635 			i2c_dev->msg_err |= I2C_ERR_ARBITRATION_LOST;  in tegra_i2c_isr()
639 	if (i2c_dev->msg_read && (status & I2C_INT_RX_FIFO_DATA_REQ)) {  in tegra_i2c_isr()
640 		if (i2c_dev->msg_buf_remaining)  in tegra_i2c_isr()
641 			tegra_i2c_empty_rx_fifo(i2c_dev);  in tegra_i2c_isr()
646 	if (!i2c_dev->msg_read && (status & I2C_INT_TX_FIFO_DATA_REQ)) {  in tegra_i2c_isr()
647 		if (i2c_dev->msg_buf_remaining)  in tegra_i2c_isr()
648 			tegra_i2c_fill_tx_fifo(i2c_dev);  in tegra_i2c_isr()
650 			tegra_i2c_mask_irq(i2c_dev, I2C_INT_TX_FIFO_DATA_REQ);  in tegra_i2c_isr()
653 	i2c_writel(i2c_dev, status, I2C_INT_STATUS);  in tegra_i2c_isr()
654 	if (i2c_dev->is_dvc)  in tegra_i2c_isr()
655 		dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS);  in tegra_i2c_isr()
658 		BUG_ON(i2c_dev->msg_buf_remaining);  in tegra_i2c_isr()
659 		complete(&i2c_dev->msg_complete);  in tegra_i2c_isr()
664 	tegra_i2c_mask_irq(i2c_dev, I2C_INT_NO_ACK | I2C_INT_ARBITRATION_LOST |  in tegra_i2c_isr()
667 	i2c_writel(i2c_dev, status, I2C_INT_STATUS);  in tegra_i2c_isr()
668 	if (i2c_dev->is_dvc)  in tegra_i2c_isr()
669 		dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS);  in tegra_i2c_isr()
671 	complete(&i2c_dev->msg_complete);  in tegra_i2c_isr()
673 	spin_unlock_irqrestore(&i2c_dev->xfer_lock, flags);  in tegra_i2c_isr()
677 static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,  in tegra_i2c_xfer_msg()  argument
685 	tegra_i2c_flush_fifos(i2c_dev);  in tegra_i2c_xfer_msg()
690 	i2c_dev->msg_buf = msg->buf;  in tegra_i2c_xfer_msg()
691 	i2c_dev->msg_buf_remaining = msg->len;  in tegra_i2c_xfer_msg()
692 	i2c_dev->msg_err = I2C_ERR_NONE;  in tegra_i2c_xfer_msg()
693 	i2c_dev->msg_read = (msg->flags & I2C_M_RD);  in tegra_i2c_xfer_msg()
694 	reinit_completion(&i2c_dev->msg_complete);  in tegra_i2c_xfer_msg()
696 	spin_lock_irqsave(&i2c_dev->xfer_lock, flags);  in tegra_i2c_xfer_msg()
699 	tegra_i2c_unmask_irq(i2c_dev, int_mask);  in tegra_i2c_xfer_msg()
703 			(i2c_dev->cont_id << PACKET_HEADER0_CONT_ID_SHIFT) |  in tegra_i2c_xfer_msg()
705 	i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO);  in tegra_i2c_xfer_msg()
708 	i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO);  in tegra_i2c_xfer_msg()
725 	i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO);  in tegra_i2c_xfer_msg()
728 		tegra_i2c_fill_tx_fifo(i2c_dev);  in tegra_i2c_xfer_msg()
730 	if (i2c_dev->hw->has_per_pkt_xfer_complete_irq)  in tegra_i2c_xfer_msg()
734 	else if (i2c_dev->msg_buf_remaining)  in tegra_i2c_xfer_msg()
737 	tegra_i2c_unmask_irq(i2c_dev, int_mask);  in tegra_i2c_xfer_msg()
738 	spin_unlock_irqrestore(&i2c_dev->xfer_lock, flags);  in tegra_i2c_xfer_msg()
739 	dev_dbg(i2c_dev->dev, "unmasked irq: %02x\n",  in tegra_i2c_xfer_msg()
740 		i2c_readl(i2c_dev, I2C_INT_MASK));  in tegra_i2c_xfer_msg()
742 	time_left = wait_for_completion_timeout(&i2c_dev->msg_complete,  in tegra_i2c_xfer_msg()
744 	tegra_i2c_mask_irq(i2c_dev, int_mask);  in tegra_i2c_xfer_msg()
747 		dev_err(i2c_dev->dev, "i2c transfer timed out\n");  in tegra_i2c_xfer_msg()
749 		tegra_i2c_init(i2c_dev);  in tegra_i2c_xfer_msg()
753 	dev_dbg(i2c_dev->dev, "transfer complete: %lu %d %d\n",  in tegra_i2c_xfer_msg()
754 		time_left, completion_done(&i2c_dev->msg_complete),  in tegra_i2c_xfer_msg()
755 		i2c_dev->msg_err);  in tegra_i2c_xfer_msg()
757 	if (likely(i2c_dev->msg_err == I2C_ERR_NONE))  in tegra_i2c_xfer_msg()
760 	tegra_i2c_init(i2c_dev);  in tegra_i2c_xfer_msg()
761 	if (i2c_dev->msg_err == I2C_ERR_NO_ACK) {  in tegra_i2c_xfer_msg()
773 	struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap);  in tegra_i2c_xfer()  local
777 	ret = pm_runtime_get_sync(i2c_dev->dev);  in tegra_i2c_xfer()
779 		dev_err(i2c_dev->dev, "runtime resume failed %d\n", ret);  in tegra_i2c_xfer()
792 		ret = tegra_i2c_xfer_msg(i2c_dev, &msgs[i], end_type);  in tegra_i2c_xfer()
797 	pm_runtime_put(i2c_dev->dev);  in tegra_i2c_xfer()
804 	struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap);  in tegra_i2c_func()  local
808 	if (i2c_dev->hw->has_continue_xfer_support)  in tegra_i2c_func()
813 static void tegra_i2c_parse_dt(struct tegra_i2c_dev *i2c_dev)  in tegra_i2c_parse_dt()  argument
815 	struct device_node *np = i2c_dev->dev->of_node;  in tegra_i2c_parse_dt()
819 			&i2c_dev->bus_clk_rate);  in tegra_i2c_parse_dt()
821 		i2c_dev->bus_clk_rate = 100000; /* default clock rate */  in tegra_i2c_parse_dt()
823 	i2c_dev->is_multimaster_mode = of_property_read_bool(np,  in tegra_i2c_parse_dt()
931 	struct tegra_i2c_dev *i2c_dev;  in tegra_i2c_probe()  local
958 	i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);  in tegra_i2c_probe()
959 	if (!i2c_dev)  in tegra_i2c_probe()
962 	i2c_dev->base = base;  in tegra_i2c_probe()
963 	i2c_dev->div_clk = div_clk;  in tegra_i2c_probe()
964 	i2c_dev->adapter.algo = &tegra_i2c_algo;  in tegra_i2c_probe()
965 	i2c_dev->adapter.quirks = &tegra_i2c_quirks;  in tegra_i2c_probe()
966 	i2c_dev->irq = irq;  in tegra_i2c_probe()
967 	i2c_dev->cont_id = pdev->id;  in tegra_i2c_probe()
968 	i2c_dev->dev = &pdev->dev;  in tegra_i2c_probe()
970 	i2c_dev->rst = devm_reset_control_get_exclusive(&pdev->dev, "i2c");  in tegra_i2c_probe()
971 	if (IS_ERR(i2c_dev->rst)) {  in tegra_i2c_probe()
973 		return PTR_ERR(i2c_dev->rst);  in tegra_i2c_probe()
976 	tegra_i2c_parse_dt(i2c_dev);  in tegra_i2c_probe()
978 	i2c_dev->hw = of_device_get_match_data(&pdev->dev);  in tegra_i2c_probe()
979 	i2c_dev->is_dvc = of_device_is_compatible(pdev->dev.of_node,  in tegra_i2c_probe()
981 	init_completion(&i2c_dev->msg_complete);  in tegra_i2c_probe()
982 	spin_lock_init(&i2c_dev->xfer_lock);  in tegra_i2c_probe()
984 	if (!i2c_dev->hw->has_single_clk_source) {  in tegra_i2c_probe()
990 		i2c_dev->fast_clk = fast_clk;  in tegra_i2c_probe()
993 	platform_set_drvdata(pdev, i2c_dev);  in tegra_i2c_probe()
995 	if (!i2c_dev->hw->has_single_clk_source) {  in tegra_i2c_probe()
996 		ret = clk_prepare(i2c_dev->fast_clk);  in tegra_i2c_probe()
998 			dev_err(i2c_dev->dev, "Clock prepare failed %d\n", ret);  in tegra_i2c_probe()
1003 	i2c_dev->clk_divisor_non_hs_mode =  in tegra_i2c_probe()
1004 			i2c_dev->hw->clk_divisor_std_fast_mode;  in tegra_i2c_probe()
1005 	if (i2c_dev->hw->clk_divisor_fast_plus_mode &&  in tegra_i2c_probe()
1006 		(i2c_dev->bus_clk_rate == 1000000))  in tegra_i2c_probe()
1007 		i2c_dev->clk_divisor_non_hs_mode =  in tegra_i2c_probe()
1008 			i2c_dev->hw->clk_divisor_fast_plus_mode;  in tegra_i2c_probe()
1010 	clk_multiplier *= (i2c_dev->clk_divisor_non_hs_mode + 1);  in tegra_i2c_probe()
1011 	ret = clk_set_rate(i2c_dev->div_clk,  in tegra_i2c_probe()
1012 			   i2c_dev->bus_clk_rate * clk_multiplier);  in tegra_i2c_probe()
1014 		dev_err(i2c_dev->dev, "Clock rate change failed %d\n", ret);  in tegra_i2c_probe()
1018 	ret = clk_prepare(i2c_dev->div_clk);  in tegra_i2c_probe()
1020 		dev_err(i2c_dev->dev, "Clock prepare failed %d\n", ret);  in tegra_i2c_probe()
1033 	if (i2c_dev->is_multimaster_mode) {  in tegra_i2c_probe()
1034 		ret = clk_enable(i2c_dev->div_clk);  in tegra_i2c_probe()
1036 			dev_err(i2c_dev->dev, "div_clk enable failed %d\n",  in tegra_i2c_probe()
1042 	ret = tegra_i2c_init(i2c_dev);  in tegra_i2c_probe()
1048 	ret = devm_request_irq(&pdev->dev, i2c_dev->irq,  in tegra_i2c_probe()
1049 			tegra_i2c_isr, 0, dev_name(&pdev->dev), i2c_dev);  in tegra_i2c_probe()
1051 		dev_err(&pdev->dev, "Failed to request irq %i\n", i2c_dev->irq);  in tegra_i2c_probe()
1055 	i2c_set_adapdata(&i2c_dev->adapter, i2c_dev);  in tegra_i2c_probe()
1056 	i2c_dev->adapter.owner = THIS_MODULE;  in tegra_i2c_probe()
1057 	i2c_dev->adapter.class = I2C_CLASS_DEPRECATED;  in tegra_i2c_probe()
1058 	strlcpy(i2c_dev->adapter.name, dev_name(&pdev->dev),  in tegra_i2c_probe()
1059 		sizeof(i2c_dev->adapter.name));  in tegra_i2c_probe()
1060 	i2c_dev->adapter.dev.parent = &pdev->dev;  in tegra_i2c_probe()
1061 	i2c_dev->adapter.nr = pdev->id;  in tegra_i2c_probe()
1062 	i2c_dev->adapter.dev.of_node = pdev->dev.of_node;  in tegra_i2c_probe()
1064 	ret = i2c_add_numbered_adapter(&i2c_dev->adapter);  in tegra_i2c_probe()
1071 	if (i2c_dev->is_multimaster_mode)  in tegra_i2c_probe()
1072 		clk_disable(i2c_dev->div_clk);  in tegra_i2c_probe()
1080 	clk_unprepare(i2c_dev->div_clk);  in tegra_i2c_probe()
1083 	if (!i2c_dev->hw->has_single_clk_source)  in tegra_i2c_probe()
1084 		clk_unprepare(i2c_dev->fast_clk);  in tegra_i2c_probe()
1091 	struct tegra_i2c_dev *i2c_dev = platform_get_drvdata(pdev);  in tegra_i2c_remove()  local
1093 	i2c_del_adapter(&i2c_dev->adapter);  in tegra_i2c_remove()
1095 	if (i2c_dev->is_multimaster_mode)  in tegra_i2c_remove()
1096 		clk_disable(i2c_dev->div_clk);  in tegra_i2c_remove()
1102 	clk_unprepare(i2c_dev->div_clk);  in tegra_i2c_remove()
1103 	if (!i2c_dev->hw->has_single_clk_source)  in tegra_i2c_remove()
1104 		clk_unprepare(i2c_dev->fast_clk);  in tegra_i2c_remove()