218 #define _ICR(i2c)	((i2c)->reg_icr)  macro
301 		readl(_ISR(i2c)), readl(_ICR(i2c)), readl(_IBMR(i2c)));  in i2c_pxa_show_state()
316 		readl(_IBMR(i2c)), readl(_IDBR(i2c)), readl(_ICR(i2c)),  in i2c_pxa_scream_blue_murder()
341 	return !(readl(_ICR(i2c)) & ICR_SCLE);  in i2c_pxa_is_slavemode()
354 		unsigned long icr = readl(_ICR(i2c));  in i2c_pxa_abort()
359 		writel(icr, _ICR(i2c));  in i2c_pxa_abort()
367 	writel(readl(_ICR(i2c)) & ~(ICR_MA | ICR_START | ICR_STOP),  in i2c_pxa_abort()
368 	       _ICR(i2c));  in i2c_pxa_abort()
396 				__func__, (long)jiffies, readl(_ISR(i2c)), readl(_ICR(i2c)), readl(_IBMR(i2c)));  in i2c_pxa_wait_master()
436 	writel(readl(_ICR(i2c)) | ICR_SCLE, _ICR(i2c));  in i2c_pxa_set_master()
452 				__func__, (long)jiffies, readl(_ISR(i2c)), readl(_ICR(i2c)), readl(_IBMR(i2c)));  in i2c_pxa_wait_slave()
456 		    (readl(_ICR(i2c)) & ICR_SCLE) == 0) {  in i2c_pxa_wait_slave()
484 		if (readl(_ICR(i2c)) & ICR_STOP) {  in i2c_pxa_set_slave()
486 			writel(readl(_ICR(i2c)) & ~ICR_STOP, _ICR(i2c));  in i2c_pxa_set_slave()
496 	writel(readl(_ICR(i2c)) & ~(ICR_STOP|ICR_ACKNAK|ICR_MA), _ICR(i2c));  in i2c_pxa_set_slave()
497 	writel(readl(_ICR(i2c)) & ~ICR_SCLE, _ICR(i2c));  in i2c_pxa_set_slave()
500 		dev_dbg(&i2c->adap.dev, "ICR now %08x, ISR %08x\n", readl(_ICR(i2c)), readl(_ISR(i2c)));  in i2c_pxa_set_slave()
501 		decode_ICR(readl(_ICR(i2c)));  in i2c_pxa_set_slave()
516 	writel(ICR_UR, _ICR(i2c));  in i2c_pxa_reset()
518 	writel(readl(_ICR(i2c)) & ~ICR_UR, _ICR(i2c));  in i2c_pxa_reset()
524 	writel(I2C_ICR_INIT | (i2c->fast_mode ? i2c->fm_mask : 0), _ICR(i2c));  in i2c_pxa_reset()
525 	writel(readl(_ICR(i2c)) | (i2c->high_mode ? i2c->hs_mask : 0), _ICR(i2c));  in i2c_pxa_reset()
529 	writel(readl(_ICR(i2c)) | ICR_SADIE | ICR_ALDIE | ICR_SSDIE, _ICR(i2c));  in i2c_pxa_reset()
535 	writel(readl(_ICR(i2c)) | ICR_IUE, _ICR(i2c));  in i2c_pxa_reset()
556 		writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));   /* allow next byte */  in i2c_pxa_slave_txempty()
567 	writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));  in i2c_pxa_slave_rxfull()
587 	writel(readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP), _ICR(i2c));  in i2c_pxa_slave_start()
588 	writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));  in i2c_pxa_slave_start()
604 	writel(readl(_ICR(i2c)) & ~ICR_SCLE, _ICR(i2c));  in i2c_pxa_slave_start()
632 		writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));  in i2c_pxa_slave_txempty()
638 	writel(readl(_ICR(i2c)) | ICR_TB | ICR_ACKNAK, _ICR(i2c));  in i2c_pxa_slave_rxfull()
650 	writel(readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP), _ICR(i2c));  in i2c_pxa_slave_start()
651 	writel(readl(_ICR(i2c)) | ICR_TB | ICR_ACKNAK, _ICR(i2c));  in i2c_pxa_slave_start()
667 	writel(readl(_ICR(i2c)) & ~ICR_SCLE, _ICR(i2c));  in i2c_pxa_slave_start()
704 	icr = readl(_ICR(i2c)) & ~(ICR_STOP | ICR_ALDIE);  in i2c_pxa_start_message()
705 	writel(icr | ICR_START | ICR_TB, _ICR(i2c));  in i2c_pxa_start_message()
715 	icr = readl(_ICR(i2c));  in i2c_pxa_stop_message()
717 	writel(icr, _ICR(i2c));  in i2c_pxa_stop_message()
743 	writel(readl(_ICR(i2c)) | ICR_SCLE, _ICR(i2c));  in i2c_pxa_pio_set_master()
763 	icr = readl(_ICR(i2c)) & ~(ICR_STOP | ICR_ALDIE);  in i2c_pxa_send_mastercode()
765 	writel(icr, _ICR(i2c));  in i2c_pxa_send_mastercode()
891 	if (!(readl(_ICR(i2c)) & ICR_IUE))  in i2c_pxa_pio_xfer()
927 	u32 icr = readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP|ICR_ACKNAK|ICR_TB);  in i2c_pxa_irq_txempty()
1034 	writel(icr, _ICR(i2c));  in i2c_pxa_irq_txempty()
1040 	u32 icr = readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP|ICR_ACKNAK|ICR_TB);  in i2c_pxa_irq_rxfull()
1062 	writel(icr, _ICR(i2c));  in i2c_pxa_irq_rxfull()
1077 			__func__, isr, readl(_ICR(i2c)), readl(_IBMR(i2c)));  in i2c_pxa_handler()