33 	struct gth_device	*gth;  member
61 static void gth_output_set(struct gth_device *gth, int port,  in gth_output_set()  argument
68 	val = ioread32(gth->base + reg);  in gth_output_set()
71 	iowrite32(val, gth->base + reg);  in gth_output_set()
74 static unsigned int gth_output_get(struct gth_device *gth, int port)  in gth_output_get()  argument
80 	val = ioread32(gth->base + reg);  in gth_output_get()
87 static void gth_smcfreq_set(struct gth_device *gth, int port,  in gth_smcfreq_set()  argument
94 	val = ioread32(gth->base + reg);  in gth_smcfreq_set()
97 	iowrite32(val, gth->base + reg);  in gth_smcfreq_set()
100 static unsigned int gth_smcfreq_get(struct gth_device *gth, int port)  in gth_smcfreq_get()  argument
106 	val = ioread32(gth->base + reg);  in gth_smcfreq_get()
119 	struct gth_device	*gth;  member
124 gth_master_set(struct gth_device *gth, unsigned int master, int port)  in gth_master_set()  argument
135 	val = ioread32(gth->base + reg);  in gth_master_set()
139 	iowrite32(val, gth->base + reg);  in gth_master_set()
148 	struct gth_device *gth = ma->gth;  in master_attr_show()  local
152 	spin_lock(&gth->gth_lock);  in master_attr_show()
153 	port = gth->master[ma->master];  in master_attr_show()
154 	spin_unlock(&gth->gth_lock);  in master_attr_show()
170 	struct gth_device *gth = ma->gth;  in master_attr_store()  local
179 	spin_lock(&gth->gth_lock);  in master_attr_store()
182 	old_port = gth->master[ma->master];  in master_attr_store()
184 		gth->master[ma->master] = -1;  in master_attr_store()
185 		clear_bit(ma->master, gth->output[old_port].master);  in master_attr_store()
191 		if (gth->output[old_port].output->active)  in master_attr_store()
192 			gth_master_set(gth, ma->master, -1);  in master_attr_store()
198 		if (!gth->output[port].output) {  in master_attr_store()
203 		set_bit(ma->master, gth->output[port].master);  in master_attr_store()
206 		if (gth->output[port].output->active)  in master_attr_store()
207 			gth_master_set(gth, ma->master, port);  in master_attr_store()
210 	gth->master[ma->master] = port;  in master_attr_store()
213 	spin_unlock(&gth->gth_lock);  in master_attr_store()
220 	struct gth_device	*gth;  member
235 	unsigned int	(*get)(struct gth_device *gth, int port);
236 	void		(*set)(struct gth_device *gth, int port,
251 gth_output_parm_set(struct gth_device *gth, int port, unsigned int parm,  in gth_output_parm_set()  argument
254 	unsigned int config = output_parms[parm].get(gth, port);  in gth_output_parm_set()
260 	output_parms[parm].set(gth, port, config);  in gth_output_parm_set()
264 gth_output_parm_get(struct gth_device *gth, int port, unsigned int parm)  in gth_output_parm_get()  argument
266 	unsigned int config = output_parms[parm].get(gth, port);  in gth_output_parm_get()
278 static int intel_th_gth_reset(struct gth_device *gth)  in intel_th_gth_reset()  argument
283 	reg = ioread32(gth->base + REG_GTH_SCRPD0);  in intel_th_gth_reset()
289 	iowrite32(reg, gth->base + REG_GTH_SCRPD0);  in intel_th_gth_reset()
293 		if (gth_output_parm_get(gth, port, TH_OUTPUT_PARM(port)) ==  in intel_th_gth_reset()
297 		gth_output_set(gth, port, 0);  in intel_th_gth_reset()
298 		gth_smcfreq_set(gth, port, 16);  in intel_th_gth_reset()
301 	iowrite32(0, gth->base + REG_GTH_DESTOVR);  in intel_th_gth_reset()
305 		iowrite32(0, gth->base + REG_GTH_SWDEST0 + i * 4);  in intel_th_gth_reset()
308 	iowrite32(0, gth->base + REG_GTH_SCR);  in intel_th_gth_reset()
309 	iowrite32(0xfc, gth->base + REG_GTH_SCR2);  in intel_th_gth_reset()
324 	struct gth_device *gth = oa->gth;  in output_attr_show()  local
329 	spin_lock(&gth->gth_lock);  in output_attr_show()
331 			 gth_output_parm_get(gth, oa->port, oa->parm));  in output_attr_show()
332 	spin_unlock(&gth->gth_lock);  in output_attr_show()
345 	struct gth_device *gth = oa->gth;  in output_attr_store()  local
353 	spin_lock(&gth->gth_lock);  in output_attr_store()
354 	gth_output_parm_set(gth, oa->port, oa->parm, config);  in output_attr_store()
355 	spin_unlock(&gth->gth_lock);  in output_attr_store()
362 static int intel_th_master_attributes(struct gth_device *gth)  in intel_th_master_attributes()  argument
368 	attrs = devm_kcalloc(gth->dev, nattrs, sizeof(void *), GFP_KERNEL);  in intel_th_master_attributes()
372 	master_attrs = devm_kcalloc(gth->dev, nattrs,  in intel_th_master_attributes()
381 		name = devm_kasprintf(gth->dev, GFP_KERNEL, "%d%s", i,  in intel_th_master_attributes()
394 		master_attrs[i].gth = gth;  in intel_th_master_attributes()
398 	gth->master_group.name	= "masters";  in intel_th_master_attributes()
399 	gth->master_group.attrs = attrs;  in intel_th_master_attributes()
401 	return sysfs_create_group(&gth->dev->kobj, &gth->master_group);  in intel_th_master_attributes()
404 static int intel_th_output_attributes(struct gth_device *gth)  in intel_th_output_attributes()  argument
412 	attrs = devm_kcalloc(gth->dev, nattrs, sizeof(void *), GFP_KERNEL);  in intel_th_output_attributes()
416 	out_attrs = devm_kcalloc(gth->dev, nattrs,  in intel_th_output_attributes()
427 			name = devm_kasprintf(gth->dev, GFP_KERNEL, "%d_%s", i,  in intel_th_output_attributes()
447 			out_attrs[idx].gth = gth;  in intel_th_output_attributes()
453 	gth->output_group.name	= "outputs";  in intel_th_output_attributes()
454 	gth->output_group.attrs = attrs;  in intel_th_output_attributes()
456 	return sysfs_create_group(&gth->dev->kobj, &gth->output_group);  in intel_th_output_attributes()
471 	struct gth_device *gth = dev_get_drvdata(&thdev->dev);  in intel_th_gth_disable()  local
476 	spin_lock(&gth->gth_lock);  in intel_th_gth_disable()
479 	for_each_set_bit(master, gth->output[output->port].master,  in intel_th_gth_disable()
481 		gth_master_set(gth, master, -1);  in intel_th_gth_disable()
483 	spin_unlock(&gth->gth_lock);  in intel_th_gth_disable()
485 	iowrite32(0, gth->base + REG_GTH_SCR);  in intel_th_gth_disable()
486 	iowrite32(0xfd, gth->base + REG_GTH_SCR2);  in intel_th_gth_disable()
491 		reg = ioread32(gth->base + REG_GTH_STAT);  in intel_th_gth_disable()
496 	iowrite32(0xfc, gth->base + REG_GTH_SCR2);  in intel_th_gth_disable()
502 	reg = ioread32(gth->base + REG_GTH_SCRPD0);  in intel_th_gth_disable()
504 	iowrite32(reg, gth->base + REG_GTH_SCRPD0);  in intel_th_gth_disable()
507 static void gth_tscu_resync(struct gth_device *gth)  in gth_tscu_resync()  argument
511 	reg = ioread32(gth->base + REG_TSCU_TSUCTRL);  in gth_tscu_resync()
513 	iowrite32(reg, gth->base + REG_TSCU_TSUCTRL);  in gth_tscu_resync()
527 	struct gth_device *gth = dev_get_drvdata(&thdev->dev);  in intel_th_gth_enable()  local
532 	spin_lock(&gth->gth_lock);  in intel_th_gth_enable()
533 	for_each_set_bit(master, gth->output[output->port].master,  in intel_th_gth_enable()
535 		gth_master_set(gth, master, output->port);  in intel_th_gth_enable()
542 	spin_unlock(&gth->gth_lock);  in intel_th_gth_enable()
545 		gth_tscu_resync(gth);  in intel_th_gth_enable()
547 	scrpd = ioread32(gth->base + REG_GTH_SCRPD0);  in intel_th_gth_enable()
549 	iowrite32(scrpd, gth->base + REG_GTH_SCRPD0);  in intel_th_gth_enable()
551 	iowrite32(scr, gth->base + REG_GTH_SCR);  in intel_th_gth_enable()
552 	iowrite32(0, gth->base + REG_GTH_SCR2);  in intel_th_gth_enable()
569 	struct gth_device *gth = dev_get_drvdata(&thdev->dev);  in intel_th_gth_assign()  local
579 		if (gth->output[i].port_type != othdev->output.type)  in intel_th_gth_assign()
591 	spin_lock(&gth->gth_lock);  in intel_th_gth_assign()
594 	gth->output[i].output = &othdev->output;  in intel_th_gth_assign()
595 	spin_unlock(&gth->gth_lock);  in intel_th_gth_assign()
608 	struct gth_device *gth = dev_get_drvdata(&thdev->dev);  in intel_th_gth_unassign()  local
614 	spin_lock(&gth->gth_lock);  in intel_th_gth_unassign()
617 	gth->output[port].output = NULL;  in intel_th_gth_unassign()
618 	spin_unlock(&gth->gth_lock);  in intel_th_gth_unassign()
624 	struct gth_device *gth = dev_get_drvdata(&thdev->dev);  in intel_th_gth_set_output()  local
634 	spin_lock(&gth->gth_lock);  in intel_th_gth_set_output()
635 	if (gth->master[master] == -1) {  in intel_th_gth_set_output()
636 		set_bit(master, gth->output[port].master);  in intel_th_gth_set_output()
637 		gth->master[master] = port;  in intel_th_gth_set_output()
639 	spin_unlock(&gth->gth_lock);  in intel_th_gth_set_output()
648 	struct gth_device *gth;  in intel_th_gth_probe()  local
661 	gth = devm_kzalloc(dev, sizeof(*gth), GFP_KERNEL);  in intel_th_gth_probe()
662 	if (!gth)  in intel_th_gth_probe()
665 	gth->dev = dev;  in intel_th_gth_probe()
666 	gth->base = base;  in intel_th_gth_probe()
667 	spin_lock_init(&gth->gth_lock);  in intel_th_gth_probe()
669 	dev_set_drvdata(dev, gth);  in intel_th_gth_probe()
680 	ret = intel_th_gth_reset(gth);  in intel_th_gth_probe()
691 		gth->master[i] = -1;  in intel_th_gth_probe()
694 		gth->output[i].gth = gth;  in intel_th_gth_probe()
695 		gth->output[i].index = i;  in intel_th_gth_probe()
696 		gth->output[i].port_type =  in intel_th_gth_probe()
697 			gth_output_parm_get(gth, i, TH_OUTPUT_PARM(port));  in intel_th_gth_probe()
698 		if (gth->output[i].port_type == GTH_NONE)  in intel_th_gth_probe()
701 		ret = intel_th_output_enable(th, gth->output[i].port_type);  in intel_th_gth_probe()
707 	if (intel_th_output_attributes(gth) ||  in intel_th_gth_probe()
708 	    intel_th_master_attributes(gth)) {  in intel_th_gth_probe()
711 		if (gth->output_group.attrs)  in intel_th_gth_probe()
712 			sysfs_remove_group(&gth->dev->kobj, &gth->output_group);  in intel_th_gth_probe()
721 	struct gth_device *gth = dev_get_drvdata(&thdev->dev);  in intel_th_gth_remove()  local
723 	sysfs_remove_group(&gth->dev->kobj, &gth->output_group);  in intel_th_gth_remove()
724 	sysfs_remove_group(&gth->dev->kobj, &gth->master_group);  in intel_th_gth_remove()