42 static int etm4_set_event_filters(struct etmv4_drvdata *drvdata,
47 static void etm4_os_unlock(struct etmv4_drvdata *drvdata)  in etm4_os_unlock()  argument
50 	writel_relaxed(0x0, drvdata->base + TRCOSLAR);  in etm4_os_unlock()
51 	drvdata->os_unlock = true;  in etm4_os_unlock()
68 	struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);  in etm4_cpu_id()  local
70 	return drvdata->cpu;  in etm4_cpu_id()
75 	struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);  in etm4_trace_id()  local
77 	return drvdata->trcid;  in etm4_trace_id()
83 	struct etmv4_drvdata *drvdata = info;  in etm4_enable_hw()  local
84 	struct etmv4_config *config = &drvdata->config;  in etm4_enable_hw()
86 	CS_UNLOCK(drvdata->base);  in etm4_enable_hw()
88 	etm4_os_unlock(drvdata);  in etm4_enable_hw()
91 	writel_relaxed(0, drvdata->base + TRCPRGCTLR);  in etm4_enable_hw()
94 	if (coresight_timeout(drvdata->base, TRCSTATR, TRCSTATR_IDLE_BIT, 1))  in etm4_enable_hw()
95 		dev_err(drvdata->dev,  in etm4_enable_hw()
98 	writel_relaxed(config->pe_sel, drvdata->base + TRCPROCSELR);  in etm4_enable_hw()
99 	writel_relaxed(config->cfg, drvdata->base + TRCCONFIGR);  in etm4_enable_hw()
101 	writel_relaxed(0x0, drvdata->base + TRCAUXCTLR);  in etm4_enable_hw()
102 	writel_relaxed(config->eventctrl0, drvdata->base + TRCEVENTCTL0R);  in etm4_enable_hw()
103 	writel_relaxed(config->eventctrl1, drvdata->base + TRCEVENTCTL1R);  in etm4_enable_hw()
104 	writel_relaxed(config->stall_ctrl, drvdata->base + TRCSTALLCTLR);  in etm4_enable_hw()
105 	writel_relaxed(config->ts_ctrl, drvdata->base + TRCTSCTLR);  in etm4_enable_hw()
106 	writel_relaxed(config->syncfreq, drvdata->base + TRCSYNCPR);  in etm4_enable_hw()
107 	writel_relaxed(config->ccctlr, drvdata->base + TRCCCCTLR);  in etm4_enable_hw()
108 	writel_relaxed(config->bb_ctrl, drvdata->base + TRCBBCTLR);  in etm4_enable_hw()
109 	writel_relaxed(drvdata->trcid, drvdata->base + TRCTRACEIDR);  in etm4_enable_hw()
110 	writel_relaxed(config->vinst_ctrl, drvdata->base + TRCVICTLR);  in etm4_enable_hw()
111 	writel_relaxed(config->viiectlr, drvdata->base + TRCVIIECTLR);  in etm4_enable_hw()
113 		       drvdata->base + TRCVISSCTLR);  in etm4_enable_hw()
115 		       drvdata->base + TRCVIPCSSCTLR);  in etm4_enable_hw()
116 	for (i = 0; i < drvdata->nrseqstate - 1; i++)  in etm4_enable_hw()
118 			       drvdata->base + TRCSEQEVRn(i));  in etm4_enable_hw()
119 	writel_relaxed(config->seq_rst, drvdata->base + TRCSEQRSTEVR);  in etm4_enable_hw()
120 	writel_relaxed(config->seq_state, drvdata->base + TRCSEQSTR);  in etm4_enable_hw()
121 	writel_relaxed(config->ext_inp, drvdata->base + TRCEXTINSELR);  in etm4_enable_hw()
122 	for (i = 0; i < drvdata->nr_cntr; i++) {  in etm4_enable_hw()
124 			       drvdata->base + TRCCNTRLDVRn(i));  in etm4_enable_hw()
126 			       drvdata->base + TRCCNTCTLRn(i));  in etm4_enable_hw()
128 			       drvdata->base + TRCCNTVRn(i));  in etm4_enable_hw()
132 	for (i = 0; i < drvdata->nr_resource * 2; i++)  in etm4_enable_hw()
134 			       drvdata->base + TRCRSCTLRn(i));  in etm4_enable_hw()
136 	for (i = 0; i < drvdata->nr_ss_cmp; i++) {  in etm4_enable_hw()
138 			       drvdata->base + TRCSSCCRn(i));  in etm4_enable_hw()
140 			       drvdata->base + TRCSSCSRn(i));  in etm4_enable_hw()
142 			       drvdata->base + TRCSSPCICRn(i));  in etm4_enable_hw()
144 	for (i = 0; i < drvdata->nr_addr_cmp; i++) {  in etm4_enable_hw()
146 			       drvdata->base + TRCACVRn(i));  in etm4_enable_hw()
148 			       drvdata->base + TRCACATRn(i));  in etm4_enable_hw()
150 	for (i = 0; i < drvdata->numcidc; i++)  in etm4_enable_hw()
152 			       drvdata->base + TRCCIDCVRn(i));  in etm4_enable_hw()
153 	writel_relaxed(config->ctxid_mask0, drvdata->base + TRCCIDCCTLR0);  in etm4_enable_hw()
154 	writel_relaxed(config->ctxid_mask1, drvdata->base + TRCCIDCCTLR1);  in etm4_enable_hw()
156 	for (i = 0; i < drvdata->numvmidc; i++)  in etm4_enable_hw()
158 			       drvdata->base + TRCVMIDCVRn(i));  in etm4_enable_hw()
159 	writel_relaxed(config->vmid_mask0, drvdata->base + TRCVMIDCCTLR0);  in etm4_enable_hw()
160 	writel_relaxed(config->vmid_mask1, drvdata->base + TRCVMIDCCTLR1);  in etm4_enable_hw()
166 	writel_relaxed(readl_relaxed(drvdata->base + TRCPDCR) | TRCPDCR_PU,  in etm4_enable_hw()
167 		       drvdata->base + TRCPDCR);  in etm4_enable_hw()
170 	writel_relaxed(1, drvdata->base + TRCPRGCTLR);  in etm4_enable_hw()
173 	if (coresight_timeout(drvdata->base, TRCSTATR, TRCSTATR_IDLE_BIT, 0))  in etm4_enable_hw()
174 		dev_err(drvdata->dev,  in etm4_enable_hw()
177 	CS_LOCK(drvdata->base);  in etm4_enable_hw()
179 	dev_dbg(drvdata->dev, "cpu: %d enable smp call done\n", drvdata->cpu);  in etm4_enable_hw()
182 static int etm4_parse_event_config(struct etmv4_drvdata *drvdata,  in etm4_parse_event_config()  argument
186 	struct etmv4_config *config = &drvdata->config;  in etm4_parse_event_config()
207 	ret = etm4_set_event_filters(drvdata, event);  in etm4_parse_event_config()
221 	if ((attr->config & BIT(ETM_OPT_RETSTK)) && drvdata->retstack)  in etm4_parse_event_config()
233 	struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);  in etm4_enable_perf()  local
235 	if (WARN_ON_ONCE(drvdata->cpu != smp_processor_id())) {  in etm4_enable_perf()
241 	ret = etm4_parse_event_config(drvdata, event);  in etm4_enable_perf()
245 	etm4_enable_hw(drvdata);  in etm4_enable_perf()
253 	struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);  in etm4_enable_sysfs()  local
256 	spin_lock(&drvdata->spinlock);  in etm4_enable_sysfs()
262 	ret = smp_call_function_single(drvdata->cpu,  in etm4_enable_sysfs()
263 				       etm4_enable_hw, drvdata, 1);  in etm4_enable_sysfs()
267 	drvdata->sticky_enable = true;  in etm4_enable_sysfs()
268 	spin_unlock(&drvdata->spinlock);  in etm4_enable_sysfs()
270 	dev_info(drvdata->dev, "ETM tracing enabled\n");  in etm4_enable_sysfs()
274 	spin_unlock(&drvdata->spinlock);  in etm4_enable_sysfs()
283 	struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);  in etm4_enable()  local
285 	val = local_cmpxchg(&drvdata->mode, CS_MODE_DISABLED, mode);  in etm4_enable()
304 		local_set(&drvdata->mode, CS_MODE_DISABLED);  in etm4_enable()
312 	struct etmv4_drvdata *drvdata = info;  in etm4_disable_hw()  local
314 	CS_UNLOCK(drvdata->base);  in etm4_disable_hw()
317 	control = readl_relaxed(drvdata->base + TRCPDCR);  in etm4_disable_hw()
319 	writel_relaxed(control, drvdata->base + TRCPDCR);  in etm4_disable_hw()
321 	control = readl_relaxed(drvdata->base + TRCPRGCTLR);  in etm4_disable_hw()
329 	writel_relaxed(control, drvdata->base + TRCPRGCTLR);  in etm4_disable_hw()
331 	CS_LOCK(drvdata->base);  in etm4_disable_hw()
333 	dev_dbg(drvdata->dev, "cpu: %d disable smp call done\n", drvdata->cpu);  in etm4_disable_hw()
341 	struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);  in etm4_disable_perf()  local
343 	if (WARN_ON_ONCE(drvdata->cpu != smp_processor_id()))  in etm4_disable_perf()
346 	etm4_disable_hw(drvdata);  in etm4_disable_perf()
354 	control = readl_relaxed(drvdata->base + TRCVICTLR);  in etm4_disable_perf()
363 	struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);  in etm4_disable_sysfs()  local
372 	spin_lock(&drvdata->spinlock);  in etm4_disable_sysfs()
378 	smp_call_function_single(drvdata->cpu, etm4_disable_hw, drvdata, 1);  in etm4_disable_sysfs()
380 	spin_unlock(&drvdata->spinlock);  in etm4_disable_sysfs()
383 	dev_info(drvdata->dev, "ETM tracing disabled\n");  in etm4_disable_sysfs()
390 	struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);  in etm4_disable()  local
397 	mode = local_read(&drvdata->mode);  in etm4_disable()
411 		local_set(&drvdata->mode, CS_MODE_DISABLED);  in etm4_disable()
433 	struct etmv4_drvdata *drvdata = info;  in etm4_init_arch_data()  local
436 	etm4_os_unlock(drvdata);  in etm4_init_arch_data()
438 	CS_UNLOCK(drvdata->base);  in etm4_init_arch_data()
441 	etmidr0 = readl_relaxed(drvdata->base + TRCIDR0);  in etm4_init_arch_data()
445 		drvdata->instrp0 = true;  in etm4_init_arch_data()
447 		drvdata->instrp0 = false;  in etm4_init_arch_data()
451 		drvdata->trcbb = true;  in etm4_init_arch_data()
453 		drvdata->trcbb = false;  in etm4_init_arch_data()
457 		drvdata->trccond = true;  in etm4_init_arch_data()
459 		drvdata->trccond = false;  in etm4_init_arch_data()
463 		drvdata->trccci = true;  in etm4_init_arch_data()
465 		drvdata->trccci = false;  in etm4_init_arch_data()
469 		drvdata->retstack = true;  in etm4_init_arch_data()
471 		drvdata->retstack = false;  in etm4_init_arch_data()
474 	drvdata->nr_event = BMVAL(etmidr0, 10, 11);  in etm4_init_arch_data()
476 	drvdata->q_support = BMVAL(etmidr0, 15, 16);  in etm4_init_arch_data()
478 	drvdata->ts_size = BMVAL(etmidr0, 24, 28);  in etm4_init_arch_data()
481 	etmidr1 = readl_relaxed(drvdata->base + TRCIDR1);  in etm4_init_arch_data()
486 	drvdata->arch = BMVAL(etmidr1, 4, 11);  in etm4_init_arch_data()
489 	etmidr2 = readl_relaxed(drvdata->base + TRCIDR2);  in etm4_init_arch_data()
491 	drvdata->ctxid_size = BMVAL(etmidr2, 5, 9);  in etm4_init_arch_data()
493 	drvdata->vmid_size = BMVAL(etmidr2, 10, 14);  in etm4_init_arch_data()
495 	drvdata->ccsize = BMVAL(etmidr2, 25, 28);  in etm4_init_arch_data()
497 	etmidr3 = readl_relaxed(drvdata->base + TRCIDR3);  in etm4_init_arch_data()
499 	drvdata->ccitmin = BMVAL(etmidr3, 0, 11);  in etm4_init_arch_data()
501 	drvdata->s_ex_level = BMVAL(etmidr3, 16, 19);  in etm4_init_arch_data()
503 	drvdata->ns_ex_level = BMVAL(etmidr3, 20, 23);  in etm4_init_arch_data()
510 		drvdata->trc_error = true;  in etm4_init_arch_data()
512 		drvdata->trc_error = false;  in etm4_init_arch_data()
516 		drvdata->syncpr = true;  in etm4_init_arch_data()
518 		drvdata->syncpr = false;  in etm4_init_arch_data()
522 		drvdata->stallctl = true;  in etm4_init_arch_data()
524 		drvdata->stallctl = false;  in etm4_init_arch_data()
528 		drvdata->sysstall = true;  in etm4_init_arch_data()
530 		drvdata->sysstall = false;  in etm4_init_arch_data()
533 	drvdata->nr_pe = BMVAL(etmidr3, 28, 30);  in etm4_init_arch_data()
537 		drvdata->nooverflow = true;  in etm4_init_arch_data()
539 		drvdata->nooverflow = false;  in etm4_init_arch_data()
542 	etmidr4 = readl_relaxed(drvdata->base + TRCIDR4);  in etm4_init_arch_data()
544 	drvdata->nr_addr_cmp = BMVAL(etmidr4, 0, 3);  in etm4_init_arch_data()
546 	drvdata->nr_pe_cmp = BMVAL(etmidr4, 12, 15);  in etm4_init_arch_data()
553 	drvdata->nr_resource = BMVAL(etmidr4, 16, 19) + 1;  in etm4_init_arch_data()
558 	drvdata->nr_ss_cmp = BMVAL(etmidr4, 20, 23);  in etm4_init_arch_data()
560 	drvdata->numcidc = BMVAL(etmidr4, 24, 27);  in etm4_init_arch_data()
562 	drvdata->numvmidc = BMVAL(etmidr4, 28, 31);  in etm4_init_arch_data()
564 	etmidr5 = readl_relaxed(drvdata->base + TRCIDR5);  in etm4_init_arch_data()
566 	drvdata->nr_ext_inp = BMVAL(etmidr5, 0, 8);  in etm4_init_arch_data()
568 	drvdata->trcid_size = BMVAL(etmidr5, 16, 21);  in etm4_init_arch_data()
571 		drvdata->atbtrig = true;  in etm4_init_arch_data()
573 		drvdata->atbtrig = false;  in etm4_init_arch_data()
579 		drvdata->lpoverride = true;  in etm4_init_arch_data()
581 		drvdata->lpoverride = false;  in etm4_init_arch_data()
583 	drvdata->nrseqstate = BMVAL(etmidr5, 25, 27);  in etm4_init_arch_data()
585 	drvdata->nr_cntr = BMVAL(etmidr5, 28, 30);  in etm4_init_arch_data()
586 	CS_LOCK(drvdata->base);  in etm4_init_arch_data()
737 static int etm4_get_next_comparator(struct etmv4_drvdata *drvdata, u32 type)  in etm4_get_next_comparator()  argument
740 	struct etmv4_config *config = &drvdata->config;  in etm4_get_next_comparator()
746 	nr_comparator = drvdata->nr_addr_cmp * 2;  in etm4_get_next_comparator()
776 static int etm4_set_event_filters(struct etmv4_drvdata *drvdata,  in etm4_set_event_filters()  argument
781 	struct etmv4_config *config = &drvdata->config;  in etm4_set_event_filters()
802 		comparator = etm4_get_next_comparator(drvdata, type);  in etm4_set_event_filters()
941 static void etm4_init_trace_id(struct etmv4_drvdata *drvdata)  in etm4_init_trace_id()  argument
943 	drvdata->trcid = coresight_get_trace_id(drvdata->cpu);  in etm4_init_trace_id()
952 	struct etmv4_drvdata *drvdata;  in etm4_probe()  local
957 	drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);  in etm4_probe()
958 	if (!drvdata)  in etm4_probe()
968 	drvdata->dev = &adev->dev;  in etm4_probe()
969 	dev_set_drvdata(dev, drvdata);  in etm4_probe()
976 	drvdata->base = base;  in etm4_probe()
978 	spin_lock_init(&drvdata->spinlock);  in etm4_probe()
980 	drvdata->cpu = pdata ? pdata->cpu : 0;  in etm4_probe()
983 	etmdrvdata[drvdata->cpu] = drvdata;  in etm4_probe()
985 	if (smp_call_function_single(drvdata->cpu,  in etm4_probe()
986 				etm4_init_arch_data,  drvdata, 1))  in etm4_probe()
1003 	if (etm4_arch_supported(drvdata->arch) == false) {  in etm4_probe()
1008 	etm4_init_trace_id(drvdata);  in etm4_probe()
1009 	etm4_set_default(&drvdata->config);  in etm4_probe()
1017 	drvdata->csdev = coresight_register(&desc);  in etm4_probe()
1018 	if (IS_ERR(drvdata->csdev)) {  in etm4_probe()
1019 		ret = PTR_ERR(drvdata->csdev);  in etm4_probe()
1023 	ret = etm_perf_symlink(drvdata->csdev, true);  in etm4_probe()
1025 		coresight_unregister(drvdata->csdev);  in etm4_probe()
1031 		 drvdata->cpu, drvdata->arch >> 4, drvdata->arch & 0xf);  in etm4_probe()
1034 		coresight_enable(drvdata->csdev);  in etm4_probe()
1035 		drvdata->boot_enable = true;  in etm4_probe()