105 #define HD_WRITE(offset, val) writel(val, vc4->hdmi->hd_regs + offset)  macro
482 	HD_WRITE(VC4_HD_VID_CTL,  in vc4_hdmi_encoder_disable()
558 	HD_WRITE(VC4_HD_VID_CTL, 0);  in vc4_hdmi_encoder_enable()
588 	HD_WRITE(VC4_HD_VID_CTL,  in vc4_hdmi_encoder_enable()
613 		HD_WRITE(VC4_HD_CSC_12_11, (0x000 << 16) | 0x000);  in vc4_hdmi_encoder_enable()
614 		HD_WRITE(VC4_HD_CSC_14_13, (0x100 << 16) | 0x6e0);  in vc4_hdmi_encoder_enable()
615 		HD_WRITE(VC4_HD_CSC_22_21, (0x6e0 << 16) | 0x000);  in vc4_hdmi_encoder_enable()
616 		HD_WRITE(VC4_HD_CSC_24_23, (0x100 << 16) | 0x000);  in vc4_hdmi_encoder_enable()
617 		HD_WRITE(VC4_HD_CSC_32_31, (0x000 << 16) | 0x6e0);  in vc4_hdmi_encoder_enable()
618 		HD_WRITE(VC4_HD_CSC_34_33, (0x100 << 16) | 0x000);  in vc4_hdmi_encoder_enable()
625 	HD_WRITE(VC4_HD_CSC_CTL, csc_ctl);  in vc4_hdmi_encoder_enable()
634 	HD_WRITE(VC4_HD_VID_CTL,  in vc4_hdmi_encoder_enable()
732 	HD_WRITE(VC4_HD_MAI_SMP,  in vc4_hdmi_audio_set_mai_clock()
819 	HD_WRITE(VC4_HD_MAI_CTL, VC4_HD_MAI_CTL_RESET);  in vc4_hdmi_audio_reset()
820 	HD_WRITE(VC4_HD_MAI_CTL, VC4_HD_MAI_CTL_ERRORF);  in vc4_hdmi_audio_reset()
821 	HD_WRITE(VC4_HD_MAI_CTL, VC4_HD_MAI_CTL_FLUSH);  in vc4_hdmi_audio_reset()
860 	HD_WRITE(VC4_HD_MAI_CTL,  in vc4_hdmi_audio_hw_params()
880 		HD_WRITE(VC4_HD_MAI_THR,  in vc4_hdmi_audio_hw_params()
884 		HD_WRITE(VC4_HD_MAI_THR,  in vc4_hdmi_audio_hw_params()
888 		HD_WRITE(VC4_HD_MAI_THR,  in vc4_hdmi_audio_hw_params()
926 		HD_WRITE(VC4_HD_MAI_CTL,  in vc4_hdmi_audio_trigger()
932 		HD_WRITE(VC4_HD_MAI_CTL,  in vc4_hdmi_audio_trigger()
1388 		HD_WRITE(VC4_HD_M_CTL, VC4_HD_M_SW_RST);  in vc4_hdmi_bind()
1390 		HD_WRITE(VC4_HD_M_CTL, 0);  in vc4_hdmi_bind()
1392 		HD_WRITE(VC4_HD_M_CTL, VC4_HD_M_ENABLE);  in vc4_hdmi_bind()