Lines Matching refs:afec0
726 u32 afec0 = DSI_PORT_READ(PHY_AFEC0); in vc4_dsi_latch_ulps() local
729 afec0 |= DSI_PORT_BIT(PHY_AFEC0_LATCH_ULPS); in vc4_dsi_latch_ulps()
731 afec0 &= ~DSI_PORT_BIT(PHY_AFEC0_LATCH_ULPS); in vc4_dsi_latch_ulps()
733 DSI_PORT_WRITE(PHY_AFEC0, afec0); in vc4_dsi_latch_ulps()
932 u32 afec0 = (VC4_SET_FIELD(7, DSI_PHY_AFEC0_PTATADJ) | in vc4_dsi_encoder_enable() local
936 afec0 |= DSI0_PHY_AFEC0_PD_DLANE1; in vc4_dsi_encoder_enable()
939 afec0 |= DSI0_PHY_AFEC0_RESET; in vc4_dsi_encoder_enable()
941 DSI_PORT_WRITE(PHY_AFEC0, afec0); in vc4_dsi_encoder_enable()
948 u32 afec0 = (VC4_SET_FIELD(7, DSI_PHY_AFEC0_PTATADJ) | in vc4_dsi_encoder_enable() local
957 afec0 |= DSI1_PHY_AFEC0_PD_DLANE3; in vc4_dsi_encoder_enable()
959 afec0 |= DSI1_PHY_AFEC0_PD_DLANE2; in vc4_dsi_encoder_enable()
961 afec0 |= DSI1_PHY_AFEC0_PD_DLANE1; in vc4_dsi_encoder_enable()
963 afec0 |= DSI1_PHY_AFEC0_RESET; in vc4_dsi_encoder_enable()
965 DSI_PORT_WRITE(PHY_AFEC0, afec0); in vc4_dsi_encoder_enable()