19 v3d_init_core(struct v3d_dev *v3d, int core)  in v3d_init_core()  argument
38 v3d_init_hw_state(struct v3d_dev *v3d)  in v3d_init_hw_state()  argument
40 	v3d_init_core(v3d, 0);  in v3d_init_hw_state()
44 v3d_idle_axi(struct v3d_dev *v3d, int core)  in v3d_idle_axi()  argument
57 v3d_idle_gca(struct v3d_dev *v3d)  in v3d_idle_gca()  argument
59 	if (v3d->ver >= 41)  in v3d_idle_gca()
72 v3d_reset_v3d(struct v3d_dev *v3d)  in v3d_reset_v3d()  argument
93 	v3d_init_hw_state(v3d);  in v3d_reset_v3d()
97 v3d_reset(struct v3d_dev *v3d)  in v3d_reset()  argument
99 	struct drm_device *dev = &v3d->drm;  in v3d_reset()
106 		v3d_idle_axi(v3d, 0);  in v3d_reset()
108 	v3d_idle_gca(v3d);  in v3d_reset()
109 	v3d_reset_v3d(v3d);  in v3d_reset()
111 	v3d_mmu_set_page_table(v3d);  in v3d_reset()
112 	v3d_irq_reset(v3d);  in v3d_reset()
118 v3d_flush_l3(struct v3d_dev *v3d)  in v3d_flush_l3()  argument
120 	if (v3d->ver < 41) {  in v3d_flush_l3()
126 		if (v3d->ver < 33) {  in v3d_flush_l3()
135 v3d_invalidate_l2(struct v3d_dev *v3d, int core)  in v3d_invalidate_l2()  argument
143 v3d_invalidate_l1td(struct v3d_dev *v3d, int core)  in v3d_invalidate_l1td()  argument
154 v3d_flush_l2t(struct v3d_dev *v3d, int core)  in v3d_flush_l2t()  argument
156 	v3d_invalidate_l1td(v3d, core);  in v3d_flush_l2t()
169 v3d_invalidate_slices(struct v3d_dev *v3d, int core)  in v3d_invalidate_slices()  argument
180 v3d_invalidate_l2t(struct v3d_dev *v3d, int core)  in v3d_invalidate_l2t()  argument
193 v3d_invalidate_caches(struct v3d_dev *v3d)  in v3d_invalidate_caches()  argument
195 	v3d_flush_l3(v3d);  in v3d_invalidate_caches()
197 	v3d_invalidate_l2(v3d, 0);  in v3d_invalidate_caches()
198 	v3d_invalidate_slices(v3d, 0);  in v3d_invalidate_caches()
199 	v3d_flush_l2t(v3d, 0);  in v3d_invalidate_caches()
203 v3d_flush_caches(struct v3d_dev *v3d)  in v3d_flush_caches()  argument
205 	v3d_invalidate_l1td(v3d, 0);  in v3d_flush_caches()
206 	v3d_invalidate_l2t(v3d, 0);  in v3d_flush_caches()
401 	struct v3d_dev *v3d = exec->v3d;  in v3d_exec_cleanup()  local
421 	pm_runtime_mark_last_busy(v3d->dev);  in v3d_exec_cleanup()
422 	pm_runtime_put_autosuspend(v3d->dev);  in v3d_exec_cleanup()
498 	struct v3d_dev *v3d = to_v3d_dev(dev);  in v3d_submit_cl_ioctl()  local
515 	ret = pm_runtime_get_sync(v3d->dev);  in v3d_submit_cl_ioctl()
542 	exec->v3d = v3d;  in v3d_submit_cl_ioctl()
553 	mutex_lock(&v3d->sched_lock);  in v3d_submit_cl_ioctl()
578 	mutex_unlock(&v3d->sched_lock);  in v3d_submit_cl_ioctl()
597 	mutex_unlock(&v3d->sched_lock);  in v3d_submit_cl_ioctl()
608 	struct v3d_dev *v3d = to_v3d_dev(dev);  in v3d_gem_init()  local
613 		v3d->queue[i].fence_context = dma_fence_context_alloc(1);  in v3d_gem_init()
615 	spin_lock_init(&v3d->mm_lock);  in v3d_gem_init()
616 	spin_lock_init(&v3d->job_lock);  in v3d_gem_init()
617 	mutex_init(&v3d->bo_lock);  in v3d_gem_init()
618 	mutex_init(&v3d->reset_lock);  in v3d_gem_init()
619 	mutex_init(&v3d->sched_lock);  in v3d_gem_init()
625 	drm_mm_init(&v3d->mm, 1, pt_size / sizeof(u32) - 1);  in v3d_gem_init()
627 	v3d->pt = dma_alloc_wc(v3d->dev, pt_size,  in v3d_gem_init()
628 			       &v3d->pt_paddr,  in v3d_gem_init()
630 	if (!v3d->pt) {  in v3d_gem_init()
631 		drm_mm_takedown(&v3d->mm);  in v3d_gem_init()
632 		dev_err(v3d->dev,  in v3d_gem_init()
638 	v3d_init_hw_state(v3d);  in v3d_gem_init()
639 	v3d_mmu_set_page_table(v3d);  in v3d_gem_init()
641 	ret = v3d_sched_init(v3d);  in v3d_gem_init()
643 		drm_mm_takedown(&v3d->mm);  in v3d_gem_init()
644 		dma_free_coherent(v3d->dev, 4096 * 1024, (void *)v3d->pt,  in v3d_gem_init()
645 				  v3d->pt_paddr);  in v3d_gem_init()
654 	struct v3d_dev *v3d = to_v3d_dev(dev);  in v3d_gem_destroy()  local
656 	v3d_sched_fini(v3d);  in v3d_gem_destroy()
661 	WARN_ON(v3d->bin_job);  in v3d_gem_destroy()
662 	WARN_ON(v3d->render_job);  in v3d_gem_destroy()
664 	drm_mm_takedown(&v3d->mm);  in v3d_gem_destroy()
666 	dma_free_coherent(v3d->dev, 4096 * 1024, (void *)v3d->pt, v3d->pt_paddr);  in v3d_gem_destroy()