Lines Matching refs:tilcdc_clear
140 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE); in tilcdc_crtc_load_palette()
142 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_PL_INT_ENA); in tilcdc_crtc_load_palette()
173 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, in tilcdc_crtc_disable_irqs()
176 tilcdc_clear(dev, LCDC_DMA_CTRL_REG, in tilcdc_crtc_disable_irqs()
196 tilcdc_clear(dev, LCDC_CLK_RESET_REG, LCDC_CLK_MAIN_RESET); in reset()
375 tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, in tilcdc_crtc_set_mode()
412 tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_INVERT_PIXEL_CLOCK); in tilcdc_crtc_set_mode()
417 tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_SYNC_CTRL); in tilcdc_crtc_set_mode()
422 tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_SYNC_EDGE); in tilcdc_crtc_set_mode()
427 tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_INVERT_HSYNC); in tilcdc_crtc_set_mode()
432 tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_INVERT_VSYNC); in tilcdc_crtc_set_mode()
437 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ORDER); in tilcdc_crtc_set_mode()
471 tilcdc_clear(dev, LCDC_DMA_CTRL_REG, LCDC_DUAL_FRAME_BUFFER_ENABLE); in tilcdc_crtc_enable()
513 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE); in tilcdc_crtc_off()
708 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE); in tilcdc_crtc_reset()
935 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, in tilcdc_crtc_irq()
949 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, in tilcdc_crtc_irq()
974 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, in tilcdc_crtc_irq()