Lines Matching refs:sparepll
55 u8 sparepll; member
75 .sparepll = 0x0,
90 .sparepll = 0x0,
105 .sparepll = 0x0,
120 .sparepll = 0x0,
135 .sparepll = 0x0,
154 .sparepll = 0x0,
169 .sparepll = 0x0,
184 .sparepll = 0x0,
199 .sparepll = 0x0,
219 .sparepll = 0x54,
234 .sparepll = 0x44,
249 .sparepll = 0x00, /* 0x34 */
264 .sparepll = 0x34,
279 .sparepll = 0x34,
2473 value |= SOR_DP_PADCTL_SPAREPLL(settings->sparepll); in tegra_sor_hdmi_enable()