Lines Matching defs:n

18 #define SUN6I_DPHY_GCTL_LANE_NUM(n)		((((n) - 1) & 3) << 4)  argument
25 #define SUN6I_DPHY_TX_TIME0_HS_TRAIL(n) (((n) & 0xff) << 24) argument
26 #define SUN6I_DPHY_TX_TIME0_HS_PREPARE(n) (((n) & 0xff) << 16) argument
27 #define SUN6I_DPHY_TX_TIME0_LP_CLK_DIV(n) ((n) & 0xff) argument
30 #define SUN6I_DPHY_TX_TIME1_CLK_POST(n) (((n) & 0xff) << 24) argument
31 #define SUN6I_DPHY_TX_TIME1_CLK_PRE(n) (((n) & 0xff) << 16) argument
32 #define SUN6I_DPHY_TX_TIME1_CLK_ZERO(n) (((n) & 0xff) << 8) argument
33 #define SUN6I_DPHY_TX_TIME1_CLK_PREPARE(n) ((n) & 0xff) argument
36 #define SUN6I_DPHY_TX_TIME2_CLK_TRAIL(n) ((n) & 0xff) argument
41 #define SUN6I_DPHY_TX_TIME4_HS_TX_ANA1(n) (((n) & 0xff) << 8) argument
42 #define SUN6I_DPHY_TX_TIME4_HS_TX_ANA0(n) ((n) & 0xff) argument
47 #define SUN6I_DPHY_ANA0_REG_DMPD(n) (((n) & 0xf) << 24) argument
48 #define SUN6I_DPHY_ANA0_REG_SLV(n) (((n) & 7) << 12) argument
49 #define SUN6I_DPHY_ANA0_REG_DEN(n) (((n) & 0xf) << 8) argument
53 #define SUN6I_DPHY_ANA1_REG_CSMPS(n) (((n) & 3) << 28) argument
54 #define SUN6I_DPHY_ANA1_REG_SVTT(n) (((n) & 0xf) << 24) argument
57 #define SUN6I_DPHY_ANA2_EN_P2S_CPU(n) (((n) & 0xf) << 24) argument
63 #define SUN6I_DPHY_ANA3_EN_VTTD(n) (((n) & 0xf) << 28) argument
73 #define SUN6I_DPHY_ANA4_REG_DMPLVD(n) (((n) & 0xf) << 20) argument
74 #define SUN6I_DPHY_ANA4_REG_CKDV(n) (((n) & 0x1f) << 12) argument
75 #define SUN6I_DPHY_ANA4_REG_TMSC(n) (((n) & 3) << 10) argument
76 #define SUN6I_DPHY_ANA4_REG_TMSD(n) (((n) & 3) << 8) argument
77 #define SUN6I_DPHY_ANA4_REG_TXDNSC(n) (((n) & 3) << 6) argument
78 #define SUN6I_DPHY_ANA4_REG_TXDNSD(n) (((n) & 3) << 4) argument
79 #define SUN6I_DPHY_ANA4_REG_TXPUSC(n) (((n) & 3) << 2) argument
80 #define SUN6I_DPHY_ANA4_REG_TXPUSD(n) ((n) & 3) argument