Lines Matching refs:ldev
47 #define REG_OFS (ldev->caps.reg_ofs)
354 struct ltdc_device *ldev = ddev->dev_private; in ltdc_irq_thread() local
358 if (ldev->irq_status & ISR_LIF) in ltdc_irq_thread()
362 mutex_lock(&ldev->err_lock); in ltdc_irq_thread()
363 if (ldev->irq_status & ISR_FUIF) in ltdc_irq_thread()
364 ldev->error_status |= ISR_FUIF; in ltdc_irq_thread()
365 if (ldev->irq_status & ISR_TERRIF) in ltdc_irq_thread()
366 ldev->error_status |= ISR_TERRIF; in ltdc_irq_thread()
367 mutex_unlock(&ldev->err_lock); in ltdc_irq_thread()
375 struct ltdc_device *ldev = ddev->dev_private; in ltdc_irq() local
378 ldev->irq_status = reg_read(ldev->regs, LTDC_ISR); in ltdc_irq()
379 reg_write(ldev->regs, LTDC_ICR, ldev->irq_status); in ltdc_irq()
390 struct ltdc_device *ldev = crtc_to_ltdc(crtc); in ltdc_crtc_update_clut() local
403 reg_write(ldev->regs, LTDC_L1CLUTWR, val); in ltdc_crtc_update_clut()
410 struct ltdc_device *ldev = crtc_to_ltdc(crtc); in ltdc_crtc_atomic_enable() local
415 reg_write(ldev->regs, LTDC_BCCR, BCCR_BCBLACK); in ltdc_crtc_atomic_enable()
418 reg_set(ldev->regs, LTDC_IER, IER_RRIE | IER_FUIE | IER_TERRIE); in ltdc_crtc_atomic_enable()
421 reg_set(ldev->regs, LTDC_SRCR, SRCR_IMR); in ltdc_crtc_atomic_enable()
424 reg_set(ldev->regs, LTDC_GCR, GCR_LTDCEN); in ltdc_crtc_atomic_enable()
432 struct ltdc_device *ldev = crtc_to_ltdc(crtc); in ltdc_crtc_atomic_disable() local
439 reg_clear(ldev->regs, LTDC_GCR, GCR_LTDCEN); in ltdc_crtc_atomic_disable()
442 reg_clear(ldev->regs, LTDC_IER, IER_RRIE | IER_FUIE | IER_TERRIE); in ltdc_crtc_atomic_disable()
445 reg_set(ldev->regs, LTDC_SRCR, SRCR_IMR); in ltdc_crtc_atomic_disable()
454 struct ltdc_device *ldev = crtc_to_ltdc(crtc); in ltdc_crtc_mode_valid() local
460 result = clk_round_rate(ldev->pixel_clk, target); in ltdc_crtc_mode_valid()
465 if (result > ldev->caps.pad_max_freq_hz) in ltdc_crtc_mode_valid()
493 struct ltdc_device *ldev = crtc_to_ltdc(crtc); in ltdc_crtc_mode_fixup() local
501 clk_disable(ldev->pixel_clk); in ltdc_crtc_mode_fixup()
502 if (clk_set_rate(ldev->pixel_clk, rate) < 0) { in ltdc_crtc_mode_fixup()
506 clk_enable(ldev->pixel_clk); in ltdc_crtc_mode_fixup()
508 adjusted_mode->clock = clk_get_rate(ldev->pixel_clk) / 1000; in ltdc_crtc_mode_fixup()
515 struct ltdc_device *ldev = crtc_to_ltdc(crtc); in ltdc_crtc_mode_set_nofb() local
555 reg_update_bits(ldev->regs, LTDC_GCR, in ltdc_crtc_mode_set_nofb()
560 reg_update_bits(ldev->regs, LTDC_SSCR, SSCR_VSH | SSCR_HSW, val); in ltdc_crtc_mode_set_nofb()
564 reg_update_bits(ldev->regs, LTDC_BPCR, BPCR_AVBP | BPCR_AHBP, val); in ltdc_crtc_mode_set_nofb()
568 reg_update_bits(ldev->regs, LTDC_AWCR, AWCR_AAW | AWCR_AAH, val); in ltdc_crtc_mode_set_nofb()
572 reg_update_bits(ldev->regs, LTDC_TWCR, TWCR_TOTALH | TWCR_TOTALW, val); in ltdc_crtc_mode_set_nofb()
574 reg_write(ldev->regs, LTDC_LIPCR, (accum_act_h + 1)); in ltdc_crtc_mode_set_nofb()
580 struct ltdc_device *ldev = crtc_to_ltdc(crtc); in ltdc_crtc_atomic_flush() local
588 reg_set(ldev->regs, LTDC_SRCR, SRCR_VBR); in ltdc_crtc_atomic_flush()
613 struct ltdc_device *ldev = crtc_to_ltdc(crtc); in ltdc_crtc_enable_vblank() local
616 reg_set(ldev->regs, LTDC_IER, IER_LIE); in ltdc_crtc_enable_vblank()
623 struct ltdc_device *ldev = crtc_to_ltdc(crtc); in ltdc_crtc_disable_vblank() local
626 reg_clear(ldev->regs, LTDC_IER, IER_LIE); in ltdc_crtc_disable_vblank()
674 struct ltdc_device *ldev = plane_to_ltdc(plane); in ltdc_plane_atomic_update() local
703 bpcr = reg_read(ldev->regs, LTDC_BPCR); in ltdc_plane_atomic_update()
709 reg_update_bits(ldev->regs, LTDC_L1WHPCR + lofs, in ltdc_plane_atomic_update()
714 reg_update_bits(ldev->regs, LTDC_L1WVPCR + lofs, in ltdc_plane_atomic_update()
720 if (ldev->caps.pix_fmt_hw[val] == pf) in ltdc_plane_atomic_update()
728 reg_update_bits(ldev->regs, LTDC_L1PFCR + lofs, LXPFCR_PF, val); in ltdc_plane_atomic_update()
733 (x1 - x0 + 1) + (ldev->caps.bus_width >> 3) - 1; in ltdc_plane_atomic_update()
735 reg_update_bits(ldev->regs, LTDC_L1CFBLR + lofs, in ltdc_plane_atomic_update()
740 reg_update_bits(ldev->regs, LTDC_L1CACR + lofs, LXCACR_CONSTA, val); in ltdc_plane_atomic_update()
748 if (ldev->caps.non_alpha_only_l1 && in ltdc_plane_atomic_update()
752 reg_update_bits(ldev->regs, LTDC_L1BFCR + lofs, in ltdc_plane_atomic_update()
757 reg_update_bits(ldev->regs, LTDC_L1CFBLNR + lofs, LXCFBLNR_CFBLN, val); in ltdc_plane_atomic_update()
763 reg_write(ldev->regs, LTDC_L1CFBAR + lofs, paddr); in ltdc_plane_atomic_update()
768 reg_update_bits(ldev->regs, LTDC_L1CR + lofs, in ltdc_plane_atomic_update()
771 ldev->plane_fpsi[plane->index].counter++; in ltdc_plane_atomic_update()
773 mutex_lock(&ldev->err_lock); in ltdc_plane_atomic_update()
774 if (ldev->error_status & ISR_FUIF) { in ltdc_plane_atomic_update()
776 ldev->error_status &= ~ISR_FUIF; in ltdc_plane_atomic_update()
778 if (ldev->error_status & ISR_TERRIF) { in ltdc_plane_atomic_update()
780 ldev->error_status &= ~ISR_TERRIF; in ltdc_plane_atomic_update()
782 mutex_unlock(&ldev->err_lock); in ltdc_plane_atomic_update()
788 struct ltdc_device *ldev = plane_to_ltdc(plane); in ltdc_plane_atomic_disable() local
792 reg_clear(ldev->regs, LTDC_L1CR + lofs, LXCR_LEN); in ltdc_plane_atomic_disable()
802 struct ltdc_device *ldev = plane_to_ltdc(plane); in ltdc_plane_atomic_print_state() local
803 struct fps_info *fpsi = &ldev->plane_fpsi[plane->index]; in ltdc_plane_atomic_print_state()
837 struct ltdc_device *ldev = ddev->dev_private; in ltdc_plane_create() local
847 drm_fmt = to_drm_pixelformat(ldev->caps.pix_fmt_hw[i]); in ltdc_plane_create()
858 if (ldev->caps.non_alpha_only_l1 && in ltdc_plane_create()
893 struct ltdc_device *ldev = ddev->dev_private; in ltdc_crtc_init() local
919 for (i = 1; i < ldev->caps.nb_layers; i++) { in ltdc_crtc_init()
971 struct ltdc_device *ldev = ddev->dev_private; in ltdc_get_caps() local
975 lcr = reg_read(ldev->regs, LTDC_LCR); in ltdc_get_caps()
977 ldev->caps.nb_layers = max_t(int, lcr, 1); in ltdc_get_caps()
980 gc2r = reg_read(ldev->regs, LTDC_GC2R); in ltdc_get_caps()
982 ldev->caps.bus_width = 8 << bus_width_log2; in ltdc_get_caps()
983 ldev->caps.hw_version = reg_read(ldev->regs, LTDC_IDR); in ltdc_get_caps()
985 switch (ldev->caps.hw_version) { in ltdc_get_caps()
988 ldev->caps.reg_ofs = REG_OFS_NONE; in ltdc_get_caps()
989 ldev->caps.pix_fmt_hw = ltdc_pix_fmt_a0; in ltdc_get_caps()
997 ldev->caps.non_alpha_only_l1 = true; in ltdc_get_caps()
998 ldev->caps.pad_max_freq_hz = 90000000; in ltdc_get_caps()
999 if (ldev->caps.hw_version == HWVER_10200) in ltdc_get_caps()
1000 ldev->caps.pad_max_freq_hz = 65000000; in ltdc_get_caps()
1003 ldev->caps.reg_ofs = REG_OFS_4; in ltdc_get_caps()
1004 ldev->caps.pix_fmt_hw = ltdc_pix_fmt_a1; in ltdc_get_caps()
1005 ldev->caps.non_alpha_only_l1 = false; in ltdc_get_caps()
1006 ldev->caps.pad_max_freq_hz = 150000000; in ltdc_get_caps()
1018 struct ltdc_device *ldev = ddev->dev_private; in ltdc_load() local
1050 mutex_init(&ldev->err_lock); in ltdc_load()
1052 ldev->pixel_clk = devm_clk_get(dev, "lcd"); in ltdc_load()
1053 if (IS_ERR(ldev->pixel_clk)) { in ltdc_load()
1058 if (clk_prepare_enable(ldev->pixel_clk)) { in ltdc_load()
1064 ldev->regs = devm_ioremap_resource(dev, res); in ltdc_load()
1065 if (IS_ERR(ldev->regs)) { in ltdc_load()
1067 ret = PTR_ERR(ldev->regs); in ltdc_load()
1092 reg_clear(ldev->regs, LTDC_IER, in ltdc_load()
1098 ldev->caps.hw_version); in ltdc_load()
1102 DRM_INFO("ltdc hw version 0x%08x - ready\n", ldev->caps.hw_version); in ltdc_load()
1153 clk_disable_unprepare(ldev->pixel_clk); in ltdc_load()
1160 struct ltdc_device *ldev = ddev->dev_private; in ltdc_unload() local
1168 clk_disable_unprepare(ldev->pixel_clk); in ltdc_unload()