2289 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_populate_power_containment_values()  local
2348 		ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,  in si_populate_power_containment_values()
2357 		ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,  in si_populate_power_containment_values()
3669 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_program_ds_registers()  local
3672 	if (eg_pi->sclk_deep_sleep) {  in si_program_ds_registers()
3958 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_construct_voltage_tables()  local
3964 						    VOLTAGE_OBJ_GPIO_LUT, &eg_pi->vddc_voltage_table);  in si_construct_voltage_tables()
3968 		if (eg_pi->vddc_voltage_table.count > SISLANDS_MAX_NO_VREG_STEPS)  in si_construct_voltage_tables()
3971 								 &eg_pi->vddc_voltage_table);  in si_construct_voltage_tables()
3975 						&eg_pi->vddc_voltage_table);  in si_construct_voltage_tables()
3982 	if (eg_pi->vddci_control) {  in si_construct_voltage_tables()
3984 						    VOLTAGE_OBJ_GPIO_LUT, &eg_pi->vddci_voltage_table);  in si_construct_voltage_tables()
3988 		if (eg_pi->vddci_voltage_table.count > SISLANDS_MAX_NO_VREG_STEPS)  in si_construct_voltage_tables()
3991 								 &eg_pi->vddci_voltage_table);  in si_construct_voltage_tables()
3996 						&eg_pi->vddci_voltage_table);  in si_construct_voltage_tables()
4049 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_populate_smc_voltage_tables()  local
4061 		if (eg_pi->vddc_voltage_table.count) {  in si_populate_smc_voltage_tables()
4062 			si_populate_smc_voltage_table(rdev, &eg_pi->vddc_voltage_table, table);  in si_populate_smc_voltage_tables()
4064 				cpu_to_be32(eg_pi->vddc_voltage_table.mask_low);  in si_populate_smc_voltage_tables()
4066 			for (i = 0; i < eg_pi->vddc_voltage_table.count; i++) {  in si_populate_smc_voltage_tables()
4067 				if (pi->max_vddc_in_table <= eg_pi->vddc_voltage_table.entries[i].value) {  in si_populate_smc_voltage_tables()
4074 		if (eg_pi->vddci_voltage_table.count) {  in si_populate_smc_voltage_tables()
4075 			si_populate_smc_voltage_table(rdev, &eg_pi->vddci_voltage_table, table);  in si_populate_smc_voltage_tables()
4078 				cpu_to_be32(eg_pi->vddci_voltage_table.mask_low);  in si_populate_smc_voltage_tables()
4369 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_populate_smc_initial_state()  local
4417 	ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,  in si_populate_smc_initial_state()
4433 	if (eg_pi->vddci_control)  in si_populate_smc_initial_state()
4435 					  &eg_pi->vddci_voltage_table,  in si_populate_smc_initial_state()
4490 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_populate_smc_acpi_state()  local
4511 		ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,  in si_populate_smc_acpi_state()
4534 		ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,  in si_populate_smc_acpi_state()
4562 		if (eg_pi->acpi_vddci)  in si_populate_smc_acpi_state()
4563 			si_populate_voltage_value(rdev, &eg_pi->vddci_voltage_table,  in si_populate_smc_acpi_state()
4564 						  eg_pi->acpi_vddci,  in si_populate_smc_acpi_state()
4609 	if (eg_pi->dynamic_ac_timing)  in si_populate_smc_acpi_state()
4630 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_populate_ulv_state()  local
4639 		if (eg_pi->sclk_deep_sleep) {  in si_populate_ulv_state()
4979 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_convert_power_level_to_smc()  local
4986 	if (eg_pi->pcie_performance_request &&  in si_convert_power_level_to_smc()
5000 	    !eg_pi->uvd_enabled &&  in si_convert_power_level_to_smc()
5013 		if (pl->mclk > eg_pi->mclk_edc_wr_enable_threshold)  in si_convert_power_level_to_smc()
5043 					&eg_pi->vddc_voltage_table,  in si_convert_power_level_to_smc()
5058 	if (eg_pi->vddci_control) {  in si_convert_power_level_to_smc()
5059 		ret = si_populate_voltage_value(rdev, &eg_pi->vddci_voltage_table,  in si_convert_power_level_to_smc()
5190 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_convert_power_state_to_smc()  local
5204 		eg_pi->uvd_enabled = true;  in si_convert_power_state_to_smc()
5205 		if (eg_pi->smu_uvd_hs)  in si_convert_power_state_to_smc()
5208 		eg_pi->uvd_enabled = false;  in si_convert_power_state_to_smc()
5216 		if (eg_pi->sclk_deep_sleep) {  in si_convert_power_state_to_smc()
5241 		if (eg_pi->dynamic_ac_timing)  in si_convert_power_state_to_smc()
5809 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
5811 	if (eg_pi->sclk_deep_sleep) {
6347 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_enable()  local
6365 	if (eg_pi->dynamic_ac_timing) {  in si_dpm_enable()
6368 			eg_pi->dynamic_ac_timing = false;  in si_dpm_enable()
6411 	if (eg_pi->dynamic_ac_timing) {  in si_dpm_enable()
6517 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_pre_set_power_state()  local
6523 	si_apply_state_adjust_rules(rdev, &eg_pi->requested_rps);  in si_dpm_pre_set_power_state()
6556 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_set_power_state()  local
6557 	struct radeon_ps *new_ps = &eg_pi->requested_rps;  in si_dpm_set_power_state()
6558 	struct radeon_ps *old_ps = &eg_pi->current_rps;  in si_dpm_set_power_state()
6571 	if (eg_pi->pcie_performance_request)  in si_dpm_set_power_state()
6604 	if (eg_pi->dynamic_ac_timing) {  in si_dpm_set_power_state()
6630 	if (eg_pi->pcie_performance_request)  in si_dpm_set_power_state()
6659 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_post_set_power_state()  local
6660 	struct radeon_ps *new_ps = &eg_pi->requested_rps;  in si_dpm_post_set_power_state()
6732 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_parse_pplib_clock_info()  local
6762 		eg_pi->acpi_vddci = pl->vddci;  in si_parse_pplib_clock_info()
6898 	struct evergreen_power_info *eg_pi;  in si_dpm_init()  local
6911 	eg_pi = &ni_pi->eg;  in si_dpm_init()
6912 	pi = &eg_pi->rv7xx;  in si_dpm_init()
6938 	eg_pi->acpi_vddci = 0;  in si_dpm_init()
6984 	eg_pi->smu_uvd_hs = false;  in si_dpm_init()
6992 	eg_pi->mclk_edc_wr_enable_threshold = 40000;  in si_dpm_init()
6994 	ni_pi->mclk_rtt_mode_threshold = eg_pi->mclk_edc_wr_enable_threshold;  in si_dpm_init()
7012 	eg_pi->vddci_control =  in si_dpm_init()
7015 	if (!eg_pi->vddci_control)  in si_dpm_init()
7032 	eg_pi->sclk_deep_sleep = true;  in si_dpm_init()
7040 	eg_pi->dynamic_ac_timing = true;  in si_dpm_init()
7042 	eg_pi->light_sleep = true;  in si_dpm_init()
7044 	eg_pi->pcie_performance_request =  in si_dpm_init()
7047 	eg_pi->pcie_performance_request = false;  in si_dpm_init()
7089 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_debugfs_print_current_performance_level()  local
7090 	struct radeon_ps *rps = &eg_pi->current_rps;  in si_dpm_debugfs_print_current_performance_level()
7109 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_get_current_sclk()  local
7110 	struct radeon_ps *rps = &eg_pi->current_rps;  in si_dpm_get_current_sclk()
7127 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_get_current_mclk()  local
7128 	struct radeon_ps *rps = &eg_pi->current_rps;  in si_dpm_get_current_mclk()